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Bump X86 Darwin MaxVectorAlign to 64, for AVX512.
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Authored by ab on Jun 24 2015, 6:51 PM.

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Summary

Without this, 64-byte vector types (__m512), specified to be 64-byte aligned in the AVX512 draft SysV ABI, will only be 32-byte aligned.

One might raise a couple valid concerns:

  • this doesn't change alignment of anything other than clang-generated vector code. So malloc() and all will still only be 16-byte aligned.
  • we've gotten to a point where unaligned accesses are good enough, why care about alignment?

To which I pedantically counter:

  • there's precedent: AVX bumped alignment to 32, so vector users are already familiar with the issue.
  • because the spec says so ;)

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Event Timeline

ab updated this revision to Diff 28433.Jun 24 2015, 6:51 PM
ab retitled this revision from to Bump X86 Darwin MaxVectorAlign to 64, for AVX512..
ab updated this object.
ab edited the test plan for this revision. (Show Details)
ab added a reviewer: rjmccall.
ab added a subscriber: Unknown Object (MLST).
rjmccall edited edge metadata.Jun 25 2015, 3:46 PM

Should we conditionalize this on whether AVX (for 32-byte) and AVX-512 (for 64-byte) are enabled? I'm willing to accept that we shouldn't; just want to hear your thoughts.

ab added a comment.Jul 15 2015, 8:30 AM

Should we conditionalize this on whether AVX (for 32-byte) and AVX-512 (for 64-byte) are enabled? I'm willing to accept that we shouldn't; just want to hear your thoughts.

I think that would make sense.

I thought I saw a justification for unconditionally using 256 in the original AVX patch, but now that I look again I don't think there is one, and I can't think of one.

Okay. Go ahead and send a patch to do that, then, please.

This revision was automatically updated to reflect the committed changes.