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Differential D9218

Fix order of b and blx instrction in EmulateInstructionARM
ClosedPublic

Authored by tberghammer on Apr 23 2015, 5:39 AM.

Details

Reviewers
sas
clayborg
Commits
rG0da3ee1ef3bf: Fix order of b and blx instrction in EmulateInstructionARM
rLLDB235714: Fix order of b and blx instrction in EmulateInstructionARM
rL235714: Fix order of b and blx instrction in EmulateInstructionARM
Summary

Fix order of b and blx instruction in EmulateInstructionARM

In the previous ordering some "blx <label>" instruction was recognized
as "b #imm24" instructions causing a failure in the instruction
emulator.

Diff Detail

Repository
rL LLVM

Event Timeline

tberghammer updated this revision to Diff 24290.Apr 23 2015, 5:39 AM
tberghammer retitled this revision from to Fix order of b and blx instrction in EmulateInstructionARM.
tberghammer updated this object.
tberghammer edited the test plan for this revision. (Show Details)
tberghammer added reviewers: clayborg, sas.
tberghammer added a subscriber: Unknown Object (MLST).
Herald added subscribers: aemerson, rengolin. · View Herald TranscriptApr 23 2015, 5:39 AM
clayborg accepted this revision.Apr 23 2015, 9:42 AM
clayborg edited edge metadata.

Looks fine.

This revision is now accepted and ready to land.Apr 23 2015, 9:42 AM
Closed by commit rL235714: Fix order of b and blx instrction in EmulateInstructionARM (authored by tberghammer). · Explain WhyApr 24 2015, 5:17 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lldb/
trunk/
source/
Plugins/
Instruction/
ARM/
4 lines

Diff 24379

lldb/trunk/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp

  • This file uses an unknown character encoding.
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Show First 20 Lines • Show All 12,343 Lines • ▼ Show 20 Lines g_arm_opcodes[] =
//---------------------------------------------------------------------- //----------------------------------------------------------------------
// Supervisor Call (previously Software Interrupt) // Supervisor Call (previously Software Interrupt)
//---------------------------------------------------------------------- //----------------------------------------------------------------------
{ 0x0f000000, 0x0f000000, ARMvAll, eEncodingA1, No_VFP, eSize32, &EmulateInstructionARM::EmulateSVC, "svc #imm24"}, { 0x0f000000, 0x0f000000, ARMvAll, eEncodingA1, No_VFP, eSize32, &EmulateInstructionARM::EmulateSVC, "svc #imm24"},
//---------------------------------------------------------------------- //----------------------------------------------------------------------
// Branch instructions // Branch instructions
//---------------------------------------------------------------------- //----------------------------------------------------------------------
{ 0x0f000000, 0x0a000000, ARMvAll, eEncodingA1, No_VFP, eSize32, &EmulateInstructionARM::EmulateB, "b #imm24"}, // To resolve ambiguity, "blx <label>" should come before "b #imm24" and "bl <label>".
// To resolve ambiguity, "blx <label>" should come before "bl <label>".
{ 0xfe000000, 0xfa000000, ARMV5_ABOVE, eEncodingA2, No_VFP, eSize32, &EmulateInstructionARM::EmulateBLXImmediate, "blx <label>"}, { 0xfe000000, 0xfa000000, ARMV5_ABOVE, eEncodingA2, No_VFP, eSize32, &EmulateInstructionARM::EmulateBLXImmediate, "blx <label>"},
{ 0x0f000000, 0x0a000000, ARMvAll, eEncodingA1, No_VFP, eSize32, &EmulateInstructionARM::EmulateB, "b #imm24"},
{ 0x0f000000, 0x0b000000, ARMvAll, eEncodingA1, No_VFP, eSize32, &EmulateInstructionARM::EmulateBLXImmediate, "bl <label>"}, { 0x0f000000, 0x0b000000, ARMvAll, eEncodingA1, No_VFP, eSize32, &EmulateInstructionARM::EmulateBLXImmediate, "bl <label>"},
{ 0x0ffffff0, 0x012fff30, ARMV5_ABOVE, eEncodingA1, No_VFP, eSize32, &EmulateInstructionARM::EmulateBLXRm, "blx <Rm>"}, { 0x0ffffff0, 0x012fff30, ARMV5_ABOVE, eEncodingA1, No_VFP, eSize32, &EmulateInstructionARM::EmulateBLXRm, "blx <Rm>"},
// for example, "bx lr" // for example, "bx lr"
{ 0x0ffffff0, 0x012fff10, ARMvAll, eEncodingA1, No_VFP, eSize32, &EmulateInstructionARM::EmulateBXRm, "bx <Rm>"}, { 0x0ffffff0, 0x012fff10, ARMvAll, eEncodingA1, No_VFP, eSize32, &EmulateInstructionARM::EmulateBXRm, "bx <Rm>"},
// bxj // bxj
{ 0x0ffffff0, 0x012fff20, ARMvAll, eEncodingA1, No_VFP, eSize32, &EmulateInstructionARM::EmulateBXJRm, "bxj <Rm>"}, { 0x0ffffff0, 0x012fff20, ARMvAll, eEncodingA1, No_VFP, eSize32, &EmulateInstructionARM::EmulateBXJRm, "bxj <Rm>"},
//---------------------------------------------------------------------- //----------------------------------------------------------------------
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