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[PATCH v4] [PowerPC] Add Hardware Transaction Memory builtins support

Authored by zatrazz on Mar 11 2015, 4:59 AM.



This patch adds Hardware Transaction Memory (HTM) support supported by
ISA 2.07 (POWER8). The intrinsic support is based on GCC one [1], with
both 'PowerPC HTM Low Level Built-in Functions' and 'PowerPC HTM High
Level Inline Functions' implemented.

Along with builtins a new driver switch is added to enable/disable HTM
instruction support (-mhtm) and a header with common definitions (mostly
to parse the TFHAR register value). The HTM switch also sets a
preprocessor builtin HTM.

The HTM usage requires a recently newer kernel with PPC HTM enabled.
Tested on powerpc64 and powerpc64le.

This is send along a llvm patch to enabled the builtins and option


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zatrazz updated this revision to Diff 21687.Mar 11 2015, 4:59 AM
zatrazz retitled this revision from to [PATCH v4] [PowerPC] Add Hardware Transaction Memory builtins support.
zatrazz updated this object.
zatrazz edited the test plan for this revision. (Show Details)
zatrazz added reviewers: hfinkel, kbarton, nemanjai, wschmidt.
zatrazz added a subscriber: Unknown Object (MLST).
wschmidt accepted this revision.Mar 19 2015, 1:03 PM
wschmidt edited edge metadata.

This patch LGTM with one minor nit. Hal, any concerns?


This will say "(should be 0 or 7)" for the BI__builtin_tsr case. Please be consistent with the other cases and say "(should be 0-" so this will come out "(should be 0-1)" or "(should be 0-7)".

This revision is now accepted and ready to land.Mar 19 2015, 1:03 PM
kbarton closed this revision.Mar 25 2015, 12:44 PM
kbarton edited edge metadata.

Committed revision 233205.