Support Bitrig/arm in compiler-rt

[Bluerise]

Summary

This is the only patch Bitrig uses for compiler-rt. It adds support for Bitrig/arm in the clear cache code.

[rengolin]

LGTM.

[rengolin]

r231012

lib/builtins/clear_cache.c

 /* ===-- clear_cache.c - Implement __clear_cache ---------------------------===
  *
  *                     The LLVM Compiler Infrastructure
  *
  * This file is dual licensed under the MIT and the University of Illinois Open
  * Source Licenses. See LICENSE.TXT for details.
  *
  * ===----------------------------------------------------------------------===
  */
 
 #include "int_lib.h"
 
 #if __APPLE__
   #include <libkern/OSCacheControl.h>
 #endif
-#if defined(__FreeBSD__) && defined(__arm__)
+#if (defined(__FreeBSD__) || defined(__Bitrig__)) && defined(__arm__)
   #include <sys/types.h>
   #include <machine/sysarch.h>
 #endif
 
 #if defined(__NetBSD__) && defined(__arm__)
   #include <machine/sysarch.h>
 #endif
 

 
 void __clear_cache(void *start, void *end) {
 #if __i386__ || __x86_64__
 /*
  * Intel processors have a unified instruction and data cache
  * so there is nothing to do
  */
 #elif defined(__arm__) && !defined(__APPLE__)
-    #if defined(__FreeBSD__) || defined(__NetBSD__)
+    #if defined(__FreeBSD__) || defined(__NetBSD__) || defined(__Bitrig__)
         struct arm_sync_icache_args arg;
 
         arg.addr = (uintptr_t)start;
         arg.len = (uintptr_t)end - (uintptr_t)start;
 
         sysarch(ARM_SYNC_ICACHE, &arg);
     #elif defined(__ANDROID__)
          register int start_reg __asm("r0") = (int) (intptr_t) start;