This patch generates cmn instruction when comparing a short int with minus
ldrh w8, [x0]
orr w9, wzr, #0xffff
cmp w8, w9
to
ldrsh w8, [x0]
cmn w8, #1
This patch fixes the issue by signed extending the operand.The performance test shows there are some improvements:
spec.cpu2000.ref.253_perlbmk -2.15%,
spec.cpu2006.ref.482_sphinx3 -1.59%.
As to why this patch just deals with short int, please look at the comments in the patch.
Please have a look.
David
Wording improvements:
The imm operand of ADDS is an unsigned immediate, in the range 0 to 4095. For the i8 operand, the largest immediate is 255, so this can be easily encoded in the compare instruction. For i16 operand, however, the largest immediate cannot be encoded in the compare.
Therefore, use a sign extending load and cmn to avoid materializing the -1 constant. For example,
movz w1, #65535
ldrh w0, [x0, #0]
cmp w0, w1
>
ldrsh w0, [x0, #0]
cmn w0, #1
Fundamental, we're relying on the property that (zext LHS) == (zext RHS) if and only if (sext LHS) == (sext RHS). The checks are in place to ensure both the LHS and RHS are truely zero extended and to make sure the transformation is profitable.