Add hooks for emitLeading/TrailingFence in TargetLowering

[morisset]

Summary

These hooks will be used in a later patch by AtomicExpandPass.
They will replace the current "target-independent"
AtomicExpandLoadLinkedPass::insertLeading/TrailingFence which are incorrect, but happen
to work on ARM where they are used.

[jfb]

include/llvm/Target/TargetLowering.h

962

I'm not sure if LLVM uses CAS in comments? It would be better to stay consistent can say CmpXchg.

963

Does this mean that the base implementation below can:

assert(!getInsertFencesForAtomic());

?

The comment should also s/insertFencesForAtomic/getInsertFencesForAtomic/

[morisset]

Apply jfb suggestions.

[jfb]

lgtm

[morisset]

commited in r216232

include/llvm/Target/TargetLowering.h

public:
 
   /// Perform a store-conditional operation to Addr. Return the status of the
   /// store. This should be 0 if the store succeeded, non-zero otherwise.
   virtual Value *emitStoreConditional(IRBuilder<> &Builder, Value *Val,
                                       Value *Addr, AtomicOrdering Ord) const {
     llvm_unreachable("Store conditional unimplemented on this target");
   }
 
+  /// Inserts in the IR a target-specific intrinsic specifying a fence.
+  /// It is called by AtomicExpandPass before expanding an
+  ///   AtomicRMW/AtomicCmpXchg/AtomicStore/AtomicLoad.
+  /// RMW and CmpXchg set both IsStore and IsLoad to true.
+  /// Backends with !getInsertFencesForAtomic() should keep a no-op here
+  virtual void emitLeadingFence(IRBuilder<> &Builder, AtomicOrdering Ord,
+          bool IsStore, bool IsLoad) const {
+    assert(!getInsertFencesForAtomic());
+  }
+
+  /// Inserts in the IR a target-specific intrinsic specifying a fence.
+  /// It is called by AtomicExpandPass after expanding an
+  ///   AtomicRMW/AtomicCmpXchg/AtomicStore/AtomicLoad.
+  /// RMW and CmpXchg set both IsStore and IsLoad to true.
+  /// Backends with !getInsertFencesForAtomic() should keep a no-op here
+  virtual void emitTrailingFence(IRBuilder<> &Builder, AtomicOrdering Ord,
+          bool IsStore, bool IsLoad) const {
+    assert(!getInsertFencesForAtomic());
+  }
+
   /// Return true if the given (atomic) instruction should be expanded by the
   /// IR-level AtomicExpand pass into a loop involving
   /// load-linked/store-conditional pairs. Atomic stores will be expanded in the
   /// same way as "atomic xchg" operations which ignore their output if needed.
   virtual bool shouldExpandAtomicInIR(Instruction *Inst) const {
     return false;
   }