Hi,
This patch makes use of the isRegSequence property in the advance copy optimization of the peephole optimizer.
Note that the advance copy optimization is still disabled by default.
Thanks for your feedbacks.
- Context **
This is a follow-up of r215394 and r215404, which respectively introduces the isRegSequence property and uses it for ARM.
This patch is the last of a series of three patches (see http://reviews.llvm.org/D4734 for the initial thread), it uses the property introduced by the previous two patches to improve the coalescing of target-specific instruction performing cross-register files copies.
Thanks to the property introduced in by the previous commits, this patch is able to optimize the following sequence:
_simpleVectorDiv: @ @simpleVectorDiv
@ BB#0: @ %entry
vmov d0, r2, r3
vmov d1, r0, r1
vmov r0, s0
vmov r1, s2
udiv r0, r1, r0
vmov r1, s1
vmov r2, s3
udiv r1, r2, r1
vmov.32 d16[0], r0
vmov.32 d16[1], r1
vmov r0, r1, d16
bx lr
into:
udiv r0, r0, r2
udiv r1, r1, r3
vmov.32 d16[0], r0
vmov.32 d16[1], r1
vmov r0, r1, d16
bx lr
- Proposed Patch **
The proposed patch refactors how the copy optimizations are done in the peephole optimizer are done.
Prior to this patch, we had one copy-related optimization that replaced a copy or bitcast by a generic, more suitable (in terms of register file), copy.
With this patch, the peephole optimizer features two copy-related optimization:
- One for rewriting generic copies to generic copies: PeepholeOptimizer::optimizeCoalescableCopy.
- One for replacing non-generic copies with generic copies: PeepholeOptimizer::optimizeUncoalescableCopy.
The goals of these two optimizations are slightly different: one rewrite the operand of the instruction (#1), the other kills off the non-generic instruction and replace it by a (sequence of) generic instruction(s).
Both optimizations rely on the ValueTracker introduced in r212100.
The ValueTracker has been refactored to use the information from the TargetInstrInfo for non-generic instruction. As part of the refactoring we switch the tracking from the index of the definition to the actual register (virtual or physical). This one change is to provide a greater consistency with register related APIs and to ease the use of the TargetInstrInfo.
Moreover, this patch introduces a new helper class CopyRewriter used to ease the rewriting of generic copy (i.e., #1).
Finally, this patch adds a dead code elimination pass right after the peephole optimizer to get rid of dead code that may appear after rewriting.
Thanks,
-Quentin
I would really like a more-verbose comment here (maybe with an example) to explain what this means. And, perhaps, why you might want to find an alternative source for a physical register or not.