Port memory barriers intrinsics to AArch64 (Part 2)

[kongyi]

Summary

This is the Clang part patch for D4520.

Memory barrier __builtin_arm_[dmb, dsb, isb] intrinsics are required to implement their corresponding ACLE and MSVC intrinsics.

This patch ports ARM dmb, dsb, isb intrinsic to AArch64.

[t.p.northover]

Hi Yi,

This looks good to me.

Cheers.

Tim.

[kongyi]

Closed by commit rL213250 (authored by @kongyi).

cfe/trunk/include/clang/Basic/BuiltinsAArch64.def

 BUILTIN(__builtin_arm_crc32cb, "UiUiUc", "nc")
 BUILTIN(__builtin_arm_crc32h, "UiUiUs", "nc")
 BUILTIN(__builtin_arm_crc32ch, "UiUiUs", "nc")
 BUILTIN(__builtin_arm_crc32w, "UiUiUi", "nc")
 BUILTIN(__builtin_arm_crc32cw, "UiUiUi", "nc")
 BUILTIN(__builtin_arm_crc32d, "UiUiLUi", "nc")
 BUILTIN(__builtin_arm_crc32cd, "UiUiLUi", "nc")
 
+// Memory barrier
+BUILTIN(__builtin_arm_dmb, "vUi", "nc")
+BUILTIN(__builtin_arm_dsb, "vUi", "nc")
+BUILTIN(__builtin_arm_isb, "vUi", "nc")
+
 #undef BUILTIN

cfe/trunk/lib/Sema/SemaChecking.cpp

if (BuiltinID == AArch64::BI__builtin_arm_ldrex ||
       BuiltinID == AArch64::BI__builtin_arm_strex ||
       BuiltinID == AArch64::BI__builtin_arm_stlex) {
     return CheckARMBuiltinExclusiveCall(BuiltinID, TheCall, 128);
   }
 
   if (CheckNeonBuiltinFunctionCall(BuiltinID, TheCall))
     return true;
 
-  return false;
+  // For intrinsics which take an immediate value as part of the instruction,
+  // range check them here.
+  unsigned i = 0, l = 0, u = 0;
+  switch (BuiltinID) {
+  default: return false;
+  case AArch64::BI__builtin_arm_dmb:
+  case AArch64::BI__builtin_arm_dsb:
+  case AArch64::BI__builtin_arm_isb: l = 0; u = 15; break;
+  }
+
+  // FIXME: VFP Intrinsics should error if VFP not present.
+  return SemaBuiltinConstantArgRange(TheCall, i, l, u + l);
 }
 
 bool Sema::CheckMipsBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
   unsigned i = 0, l = 0, u = 0;
   switch (BuiltinID) {
   default: return false;
   case Mips::BI__builtin_mips_wrdsp: i = 1; l = 0; u = 63; break;
   case Mips::BI__builtin_mips_rddsp: i = 0; l = 0; u = 63; break;

cfe/trunk/test/CodeGen/builtins-arm64.c

 void hints() {
   __builtin_arm_nop();    //CHECK: call {{.*}} @llvm.aarch64.hint(i32 0)
   __builtin_arm_yield();  //CHECK: call {{.*}} @llvm.aarch64.hint(i32 1)
   __builtin_arm_wfe();    //CHECK: call {{.*}} @llvm.aarch64.hint(i32 2)
   __builtin_arm_wfi();    //CHECK: call {{.*}} @llvm.aarch64.hint(i32 3)
   __builtin_arm_sev();    //CHECK: call {{.*}} @llvm.aarch64.hint(i32 4)
   __builtin_arm_sevl();   //CHECK: call {{.*}} @llvm.aarch64.hint(i32 5)
 }
+
+void barriers() {
+  __builtin_arm_dmb(1);  //CHECK: call {{.*}} @llvm.aarch64.dmb(i32 1)
+  __builtin_arm_dsb(2);  //CHECK: call {{.*}} @llvm.aarch64.dsb(i32 2)
+  __builtin_arm_isb(3);  //CHECK: call {{.*}} @llvm.aarch64.isb(i32 3)
+}

cfe/trunk/test/Sema/builtins-arm64.c

 
 void test_clear_cache_voids(void *start, void *end) {
   __clear_cache(start, end);
 }
 
 void test_clear_cache_no_args() {
   __clear_cache(); // expected-error {{too few arguments to function call}}
 }
+
+void test_memory_barriers() {
+  __builtin_arm_dmb(16); // expected-error {{argument should be a value from 0 to 15}}
+  __builtin_arm_dsb(17); // expected-error {{argument should be a value from 0 to 15}}
+  __builtin_arm_isb(18); // expected-error {{argument should be a value from 0 to 15}}
+}