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Port memory barriers intrinsics to AArch64 (Part 2)
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Authored by kongyi on Jul 15 2014, 9:39 AM.

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Summary

This is the Clang part patch for D4520.

Memory barrier __builtin_arm_[dmb, dsb, isb] intrinsics are required to implement their corresponding ACLE and MSVC intrinsics.

This patch ports ARM dmb, dsb, isb intrinsic to AArch64.

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rL LLVM

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kongyi updated this revision to Diff 11448.Jul 15 2014, 9:39 AM
kongyi retitled this revision from to Port memory barriers intrinsics to AArch64 (Part 2).
kongyi updated this object.
kongyi edited the test plan for this revision. (Show Details)
kongyi added a reviewer: t.p.northover.
kongyi set the repository for this revision to rL LLVM.
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t.p.northover accepted this revision.Jul 17 2014, 3:26 AM
t.p.northover edited edge metadata.

Hi Yi,

This looks good to me.

Cheers.

Tim.

This revision is now accepted and ready to land.Jul 17 2014, 3:26 AM
kongyi closed this revision.Jul 17 2014, 4:00 AM
kongyi updated this revision to Diff 11566.

Closed by commit rL213250 (authored by @kongyi).