MC: support different sized constants in constant pools

[jannau]

Summary

The pseudo instruction ldr <reg>, =... supports on AArch64 32- and 64-bit
constants. Add support for 64 bit constants for the pools to support the pseudo instruction fully.

Changes the AArch64 ldr-pseudo tests to use 32-bit registers and adds tests with 64-bit registers.

[jannau]

adds error when a constant expression is too large for an 32-bit register

[dpeixott]

Thanks for the patch. Overall I like the direction you are going. Please see specific comments below.

include/llvm/MC/ConstantPools.h

29 ↗

(On Diff #11364)

This type is getting a little hard to read. I suggest creating a small struct to represent the constant pool entries and name each field with something meaningful (e.g. Expr, Size, etc).

41 ↗

(On Diff #11364)

I think we should not use default parameters here so that it is clear that in the API that size is important.

75 ↗

(On Diff #11364)

Ditto for this default. We can modify the ARMTargetStreamer to always pass 4 to this call since it only ever emits 4-byte constants.

lib/MC/ConstantPools.cpp

34 ↗

(On Diff #11364)

I think you can simplify the code here by just always emitting the alignment before each entry (EmitCodeAlignment(Size)). You may end up with some redundant alignment directives in the .s file, but it should not cause any code bloat in the final binary because the assembler already keeps track of the alignment as it goes.

This will simplify the logic and remove the need to keep track of MaxAlignment.

lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

3114 ↗

(On Diff #11364)

Why int64_t here instead of uint64_t? It looks like the code above uses unsigned. Consider using the APInt to make it clear what condition you are checking (e.g. something like APint(Simm, 64).countActiveBits() >= 33)

[jannau]

all review comments addressed.

APInt makes the range check for negative int32_t to uint32_t clearer.

[dpeixott]

Thanks, this is looking much better. I had one minor suggestion and a question about the APInt usage.

Also, for future patches it would be best to include more context in the patch as described here: http://llvm.org/docs/Phabricator.html. It makes it easier to review.

Thanks for all your work.

include/llvm/MC/ConstantPools.h

44 ↗

(On Diff #11424)

Add comment for Size param (size in bytes)

lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

3120 ↗

(On Diff #11424)

This test still looks a bit hard to understand for me. Are you just checking if the value fits into 32 bits? If so I think APInt::isIntN(32) would be more readable.

[jannau]

updated patch adding the \param comment

[dpeixott]

For completeness I would add one more test for loading a smaller constant to an x register to show that we generate a 64-bit entry in the constant pool even if the value does not require the full 64-bits. You don't need another review for that change.

Thanks for all the good work.

[jannau]

new patch with added since someone needs to commit it for me

added tests for:

• constant pools, x register and small constants,
• x register and the constant expressions which are rejected for w registers
• test to make sure that the size is considered if the todo of merging the same constant to single pool entry is implemented

[weimingz]

This patch looks good to me. Thanks for the fix

[dpeixott]

Closed by commit rL213387 (authored by @dpeixott).

llvm/trunk/include/llvm/MC/ConstantPools.h

 
 #include "llvm/ADT/SmallVector.h"
 namespace llvm {
 class MCContext;
 class MCExpr;
 class MCSection;
 class MCStreamer;
 class MCSymbol;
+
+struct ConstantPoolEntry {
+  MCSymbol *Label;
+  const MCExpr *Value;
+  unsigned Size;
+};
+
 // A class to keep track of assembler-generated constant pools that are use to
 // implement the ldr-pseudo.
 class ConstantPool {
-  typedef SmallVector<std::pair<MCSymbol *, const MCExpr *>, 4> EntryVecTy;
+  typedef SmallVector<ConstantPoolEntry, 4> EntryVecTy;
   EntryVecTy Entries;
 
 public:
   // Initialize a new empty constant pool
   ConstantPool() {}
 
   // Add a new entry to the constant pool in the next slot.
   // \param Value is the new entry to put in the constant pool.
+  // \param Size is the size in bytes of the entry
   //
   // \returns a MCExpr that references the newly inserted value
-  const MCExpr *addEntry(const MCExpr *Value, MCContext &Context);
+  const MCExpr *addEntry(const MCExpr *Value, MCContext &Context,
+                         unsigned Size);
 
   // Emit the contents of the constant pool using the provided streamer.
   void emitEntries(MCStreamer &Streamer);
 
   // Return true if the constant pool is empty
   bool empty();
 };
 
class AssemblerConstantPools {
   ConstantPoolMapTy ConstantPools;
 
 public:
   AssemblerConstantPools() {}
   ~AssemblerConstantPools() {}
 
   void emitAll(MCStreamer &Streamer);
   void emitForCurrentSection(MCStreamer &Streamer);
-  const MCExpr *addEntry(MCStreamer &Streamer, const MCExpr *Expr);
+  const MCExpr *addEntry(MCStreamer &Streamer, const MCExpr *Expr,
+                         unsigned Size);
 
 private:
   ConstantPool *getConstantPool(const MCSection *Section);
   ConstantPool &getOrCreateConstantPool(const MCSection *Section);
 };
 } // end namespace llvm
 
 #endif

llvm/trunk/include/llvm/MC/MCStreamer.h

public:
   ~AArch64TargetStreamer();
 
 
   void finish() override;
 
   /// Callback used to implement the ldr= pseudo.
   /// Add a new entry to the constant pool for the current section and return an
   /// MCExpr that can be used to refer to the constant pool location.
-  const MCExpr *addConstantPoolEntry(const MCExpr *);
+  const MCExpr *addConstantPoolEntry(const MCExpr *, unsigned Size);
 
   /// Callback used to implemnt the .ltorg directive.
   /// Emit contents of constant pool for the current section.
   void emitCurrentConstantPool();
 
 private:
   std::unique_ptr<AssemblerConstantPools> ConstantPools;
 };

llvm/trunk/lib/MC/ConstantPools.cpp

 using namespace llvm;
 //
 // ConstantPool implementation
 //
 // Emit the contents of the constant pool using the provided streamer.
 void ConstantPool::emitEntries(MCStreamer &Streamer) {
   if (Entries.empty())
     return;
-  Streamer.EmitCodeAlignment(4); // align to 4-byte address
   Streamer.EmitDataRegion(MCDR_DataRegion);
   for (EntryVecTy::const_iterator I = Entries.begin(), E = Entries.end();
        I != E; ++I) {
-    Streamer.EmitLabel(I->first);
-    Streamer.EmitValue(I->second, 4);
+    Streamer.EmitCodeAlignment(I->Size); // align naturally
+    Streamer.EmitLabel(I->Label);
+    Streamer.EmitValue(I->Value, I->Size);
   }
   Streamer.EmitDataRegion(MCDR_DataRegionEnd);
   Entries.clear();
 }
 
-const MCExpr *ConstantPool::addEntry(const MCExpr *Value, MCContext &Context) {
+const MCExpr *ConstantPool::addEntry(const MCExpr *Value, MCContext &Context,
+                                     unsigned Size) {
   MCSymbol *CPEntryLabel = Context.CreateTempSymbol();
 
-  Entries.push_back(std::make_pair(CPEntryLabel, Value));
+  Entries.push_back( { CPEntryLabel, Value, Size } );
   return MCSymbolRefExpr::Create(CPEntryLabel, Context);
 }
 
 bool ConstantPool::empty() { return Entries.empty(); }
 
 //
 // AssemblerConstantPools implementation
 //

 void AssemblerConstantPools::emitForCurrentSection(MCStreamer &Streamer) {
   const MCSection *Section = Streamer.getCurrentSection().first;
   if (ConstantPool *CP = getConstantPool(Section)) {
     emitConstantPool(Streamer, Section, *CP);
   }
 }
 
 const MCExpr *AssemblerConstantPools::addEntry(MCStreamer &Streamer,
-                                               const MCExpr *Expr) {
+                                               const MCExpr *Expr,
+                                               unsigned Size) {
   const MCSection *Section = Streamer.getCurrentSection().first;
-  return getOrCreateConstantPool(Section).addEntry(Expr, Streamer.getContext());
+  return getOrCreateConstantPool(Section).addEntry(Expr, Streamer.getContext(),
+                                                   Size);
 }

llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

 #include "llvm/MC/MCStreamer.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/MCSymbol.h"
 #include "llvm/MC/MCTargetAsmParser.h"
 #include "llvm/Support/SourceMgr.h"
 #include "llvm/Support/TargetRegistry.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/ADT/APInt.h"
 #include "llvm/ADT/SmallString.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/ADT/Twine.h"
 #include <cstdio>
 using namespace llvm;
 
case AsmToken::Equal: {
     SMLoc Loc = Parser.getTok().getLoc();
     if (Mnemonic != "ldr") // only parse for ldr pseudo (e.g. ldr r0, =val)
       return Error(Loc, "unexpected token in operand");
     Parser.Lex(); // Eat '='
     const MCExpr *SubExprVal;
     if (getParser().parseExpression(SubExprVal))
       return true;
 
+    if (Operands.size() < 2 ||
+        !static_cast<AArch64Operand &>(*Operands[1]).isReg())
+      return true;
+
+    bool IsXReg =
+        AArch64MCRegisterClasses[AArch64::GPR64allRegClassID].contains(
+            Operands[1]->getReg());
+
     MCContext& Ctx = getContext();
     E = SMLoc::getFromPointer(Loc.getPointer() - 1);
     // If the op is an imm and can be fit into a mov, then replace ldr with mov.
-    if (isa<MCConstantExpr>(SubExprVal) && Operands.size() >= 2 &&
-        static_cast<AArch64Operand &>(*Operands[1]).isReg()) {
-      bool IsXReg =  AArch64MCRegisterClasses[AArch64::GPR64allRegClassID].contains(
-            Operands[1]->getReg());
+    if (isa<MCConstantExpr>(SubExprVal)) {
       uint64_t Imm = (cast<MCConstantExpr>(SubExprVal))->getValue();
       uint32_t ShiftAmt = 0, MaxShiftAmt = IsXReg ? 48 : 16;
       while(Imm > 0xFFFF && countTrailingZeros(Imm) >= 16) {
         ShiftAmt += 16;
         Imm >>= 16;
       }
       if (ShiftAmt <= MaxShiftAmt && Imm <= 0xFFFF) {
           Operands[0] = AArch64Operand::CreateToken("movz", false, Loc, Ctx);
           Operands.push_back(AArch64Operand::CreateImm(
                      MCConstantExpr::Create(Imm, Ctx), S, E, Ctx));
         if (ShiftAmt)
           Operands.push_back(AArch64Operand::CreateShiftExtend(AArch64_AM::LSL,
                      ShiftAmt, true, S, E, Ctx));
         return false;
       }
+      APInt Simm = APInt(64, Imm << ShiftAmt);
+      // check if the immediate is an unsigned or signed 32-bit int for W regs
+      if (!IsXReg && !(Simm.isIntN(32) || Simm.isSignedIntN(32)))
+        return Error(Loc, "Immediate too large for register");
     }
     // If it is a label or an imm that cannot fit in a movz, put it into CP.
-    const MCExpr *CPLoc = getTargetStreamer().addConstantPoolEntry(SubExprVal);
+    const MCExpr *CPLoc =
+        getTargetStreamer().addConstantPoolEntry(SubExprVal, IsXReg ? 8 : 4);
     Operands.push_back(AArch64Operand::CreateImm(CPLoc, S, E, Ctx));
     return false;
   }
   }
 }
 
 /// ParseInstruction - Parse an AArch64 instruction mnemonic followed by its
 /// operands.

llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp

 //
 AArch64TargetStreamer::AArch64TargetStreamer(MCStreamer &S)
     : MCTargetStreamer(S), ConstantPools(new AssemblerConstantPools()) {}
 
 AArch64TargetStreamer::~AArch64TargetStreamer() {}
 
 // The constant pool handling is shared by all AArch64TargetStreamer
 // implementations.
-const MCExpr *AArch64TargetStreamer::addConstantPoolEntry(const MCExpr *Expr) {
-  return ConstantPools->addEntry(Streamer, Expr);
+const MCExpr *AArch64TargetStreamer::addConstantPoolEntry(const MCExpr *Expr,
+                                                          unsigned Size) {
+  return ConstantPools->addEntry(Streamer, Expr, Size);
 }
 
 void AArch64TargetStreamer::emitCurrentConstantPool() {
   ConstantPools->emitForCurrentSection(Streamer);
 }
 
 // finish() - write out any non-empty assembler constant pools.
 void AArch64TargetStreamer::finish() { ConstantPools->emitAll(Streamer); }

llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp

 ARMTargetStreamer::ARMTargetStreamer(MCStreamer &S)
     : MCTargetStreamer(S), ConstantPools(new AssemblerConstantPools()) {}
 
 ARMTargetStreamer::~ARMTargetStreamer() {}
 
 // The constant pool handling is shared by all ARMTargetStreamer
 // implementations.
 const MCExpr *ARMTargetStreamer::addConstantPoolEntry(const MCExpr *Expr) {
-  return ConstantPools->addEntry(Streamer, Expr);
+  return ConstantPools->addEntry(Streamer, Expr, 4);
 }
 
 void ARMTargetStreamer::emitCurrentConstantPool() {
   ConstantPools->emitForCurrentSection(Streamer);
 }
 
 // finish() - write out any non-empty assembler constant pools.
 void ARMTargetStreamer::finish() { ConstantPools->emitAll(Streamer); }

llvm/trunk/test/MC/AArch64/ldr-pseudo-diagnostics.s

+//RUN: not llvm-mc -triple=aarch64-linux-gnu - < %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
+
+// simple test
+.section a, "ax", @progbits
+f1:
+  ldr w0, =0x100000001
+// CHECK-ERROR: error: Immediate too large for register
+// CHECK-ERROR:   ldr w0, =0x100000001
+// CHECK-ERROR:           ^
+f2:
+  ldr w0, =-0x80000001
+// CHECK-ERROR: error: Immediate too large for register
+// CHECK-ERROR:  ldr w0, =-0x80000001
+// CHECK-ERROR:          ^

llvm/trunk/test/MC/AArch64/ldr-pseudo.s

// CHECK: movz    w1, #0x4567, lsl #16
   ldr x0, =0xabc00000000
 // CHECK: movz    x0, #0xabc, lsl #32
   ldr x0, =0xbeef000000000000
 // CHECK: movz    x0, #0xbeef, lsl #48
 
 .section b,"ax",@progbits
 // CHECK-LABEL: f3:
 f3:
-  ldr x0, =0x10001
-// CHECK: ldr x0, .Ltmp[[TMP0:[0-9]+]]
+  ldr w0, =0x10001
+// CHECK: ldr w0, .Ltmp[[TMP0:[0-9]+]]
 
 // loading multiple constants
 .section c,"ax",@progbits
 // CHECK-LABEL: f4:
 f4:
-  ldr x0, =0x10002
-// CHECK: ldr x0, .Ltmp[[TMP1:[0-9]+]]
+  ldr w0, =0x10002
+// CHECK: ldr w0, .Ltmp[[TMP1:[0-9]+]]
   adds x0, x0, #1
   adds x0, x0, #1
   adds x0, x0, #1
   adds x0, x0, #1
-  ldr x0, =0x10003
-// CHECK: ldr x0, .Ltmp[[TMP2:[0-9]+]]
+  ldr w0, =0x10003
+// CHECK: ldr w0, .Ltmp[[TMP2:[0-9]+]]
   adds x0, x0, #1
   adds x0, x0, #1
 
 // TODO: the same constants should have the same constant pool location
 .section d,"ax",@progbits
 // CHECK-LABEL: f5:
 f5:
-  ldr x0, =0x10004
-// CHECK: ldr x0, .Ltmp[[TMP3:[0-9]+]]
+  ldr w0, =0x10004
+// CHECK: ldr w0, .Ltmp[[TMP3:[0-9]+]]
   adds x0, x0, #1
   adds x0, x0, #1
   adds x0, x0, #1
   adds x0, x0, #1
   adds x0, x0, #1
   adds x0, x0, #1
   adds x0, x0, #1
-  ldr x0, =0x10004
-// CHECK: ldr x0, .Ltmp[[TMP4:[0-9]+]]
+  ldr w0, =0x10004
+// CHECK: ldr w0, .Ltmp[[TMP4:[0-9]+]]
   adds x0, x0, #1
   adds x0, x0, #1
   adds x0, x0, #1
   adds x0, x0, #1
   adds x0, x0, #1
   adds x0, x0, #1
 
 // a section defined in multiple pieces should be merged and use a single constant pool
 .section e,"ax",@progbits
 // CHECK-LABEL: f6:
 f6:
-  ldr x0, =0x10006
-// CHECK: ldr x0, .Ltmp[[TMP5:[0-9]+]]
+  ldr w0, =0x10006
+// CHECK: ldr w0, .Ltmp[[TMP5:[0-9]+]]
   adds x0, x0, #1
   adds x0, x0, #1
   adds x0, x0, #1
 
 .section f, "ax", @progbits
 // CHECK-LABEL: f7:
 f7:
   adds x0, x0, #1
   adds x0, x0, #1
   adds x0, x0, #1
 
 .section e, "ax", @progbits
 // CHECK-LABEL: f8:
 f8:
   adds x0, x0, #1
-  ldr x0, =0x10007
-// CHECK: ldr x0, .Ltmp[[TMP6:[0-9]+]]
+  ldr w0, =0x10007
+// CHECK: ldr w0, .Ltmp[[TMP6:[0-9]+]]
   adds x0, x0, #1
   adds x0, x0, #1
 
 //
 // Check that symbols can be loaded using ldr pseudo
 //
 
 // load an undefined symbol
 .section g,"ax",@progbits
 // CHECK-LABEL: f9:
 f9:
-  ldr x0, =foo
-// CHECK: ldr x0, .Ltmp[[TMP7:[0-9]+]]
+  ldr w0, =foo
+// CHECK: ldr w0, .Ltmp[[TMP7:[0-9]+]]
 
 // load a symbol from another section
 .section h,"ax",@progbits
 // CHECK-LABEL: f10:
 f10:
-  ldr x0, =f5
-// CHECK: ldr x0, .Ltmp[[TMP8:[0-9]+]]
+  ldr w0, =f5
+// CHECK: ldr w0, .Ltmp[[TMP8:[0-9]+]]
 
 // load a symbol from the same section
 .section i,"ax",@progbits
 // CHECK-LABEL: f11:
 f11:
-  ldr x0, =f12
-// CHECK: ldr x0, .Ltmp[[TMP9:[0-9]+]]
+  ldr w0, =f12
+// CHECK: ldr w0, .Ltmp[[TMP9:[0-9]+]]
   ldr w0,=0x3C000
 // CHECK: ldr     w0, .Ltmp[[TMP10:[0-9]+]]
 
 // CHECK-LABEL: f12:
 f12:
   adds x0, x0, #1
   adds x0, x0, #1
 
 .section j,"ax",@progbits
 // mix of symbols and constants
 // CHECK-LABEL: f13:
 f13:
   adds x0, x0, #1
   adds x0, x0, #1
-  ldr x0, =0x101
-// CHECK: movz x0, #0x101
+  ldr w0, =0x101
+// CHECK: movz w0, #0x101
   adds x0, x0, #1
   adds x0, x0, #1
-  ldr x0, =bar
-// CHECK: ldr x0, .Ltmp[[TMP11:[0-9]+]]
+  ldr w0, =bar
+// CHECK: ldr w0, .Ltmp[[TMP11:[0-9]+]]
   adds x0, x0, #1
   adds x0, x0, #1
 //
 // Check for correct usage in other contexts
 //
 
 // usage in macro
 .macro useit_in_a_macro
-  ldr x0, =0x10008
-  ldr x0, =baz
+  ldr w0, =0x10008
+  ldr w0, =baz
 .endm
 .section k,"ax",@progbits
 // CHECK-LABEL: f14:
 f14:
   useit_in_a_macro
-// CHECK: ldr x0, .Ltmp[[TMP12:[0-9]+]]
-// CHECK: ldr x0, .Ltmp[[TMP13:[0-9]+]]
+// CHECK: ldr w0, .Ltmp[[TMP12:[0-9]+]]
+// CHECK: ldr w0, .Ltmp[[TMP13:[0-9]+]]
 
 // usage with expressions
 .section l, "ax", @progbits
 // CHECK-LABEL: f15:
 f15:
-  ldr x0, =0x10001+8
-// CHECK: ldr x0, .Ltmp[[TMP14:[0-9]+]]
+  ldr w0, =0x10001+8
+// CHECK: ldr w0, .Ltmp[[TMP14:[0-9]+]]
   adds x0, x0, #1
-  ldr x0, =bar+4
-// CHECK: ldr x0, .Ltmp[[TMP15:[0-9]+]]
+  ldr w0, =bar+4
+// CHECK: ldr w0, .Ltmp[[TMP15:[0-9]+]]
   adds x0, x0, #1
 
+// usage with 64-bit regs
+.section m, "ax", @progbits
+// CHECK-LABEL: f16:
+f16:
+  ldr x0, =0x0102030405060708
+// CHECK: ldr x0, .Ltmp[[TMP16:[0-9]+]]
+  add x0, x0, #1
+  ldr w0, =bar
+// CHECK: ldr w0, .Ltmp[[TMP17:[0-9]+]]
+  ldr x0, =bar+16
+// CHECK: ldr x0, .Ltmp[[TMP18:[0-9]+]]
+  add x0, x0, #1
+  ldr x0, =0x100000001
+// CHECK: ldr x0, .Ltmp[[TMP19:[0-9]+]]
+  ldr x1, =-0x80000001
+// CHECK: ldr x1, .Ltmp[[TMP20:[0-9]+]]
+  ldr x2, =0x10001
+// CHECK: ldr x2, .Ltmp[[TMP21:[0-9]+]]
+
+// check range for 32-bit regs
+.section n, "ax", @progbits
+// CHECK-LABEL: f17:
+f17:
+  ldr w0, =0xFFFFFFFF
+// CHECK: ldr w0, .Ltmp[[TMP22:[0-9]+]]
+  add w0, w0, #1
+  ldr w1, =-0x7FFFFFFF
+// CHECK: ldr w1, .Ltmp[[TMP23:[0-9]+]]
+  add w0, w0, #1
+  ldr w0, =-1
+// CHECK: ldr w0, .Ltmp[[TMP24:[0-9]+]]
+  add w0, w0, #1
+
+// make sure the same contant uses different pools for 32- and 64-bit registers
+.section o, "ax", @progbits
+// CHECK-LABEL: f18:
+f18:
+  ldr w0, =0x320064
+// CHECK: ldr w0, .Ltmp[[TMP25:[0-9]+]]
+  add w0, w0, #1
+  ldr x1, =0x320064
+// CHECK: ldr x1, .Ltmp[[TMP26:[0-9]+]]
+
 //
 // Constant Pools
 //
 // CHECK: .section b,"ax",@progbits
 // CHECK: .align 2
 // CHECK: .Ltmp[[TMP0]]
 // CHECK: .word 65537
 
 // CHECK: .section c,"ax",@progbits
 // CHECK: .align 2
 // CHECK: .Ltmp[[TMP1]]
 // CHECK: .word 65538
+// CHECK: .align 2
 // CHECK: .Ltmp[[TMP2]]
 // CHECK: .word 65539
 
 // CHECK: .section d,"ax",@progbits
 // CHECK: .align 2
 // CHECK: .Ltmp[[TMP3]]
 // CHECK: .word 65540
+// CHECK: .align 2
 // CHECK: .Ltmp[[TMP4]]
 // CHECK: .word 65540
 
 // CHECK: .section e,"ax",@progbits
 // CHECK: .align 2
 // CHECK: .Ltmp[[TMP5]]
 // CHECK: .word 65542
+// CHECK: .align 2
 // CHECK: .Ltmp[[TMP6]]
 // CHECK: .word 65543
 
 // Should not switch to section because it has no constant pool
 // CHECK-NOT: .section f,"ax",@progbits
 
 // CHECK: .section g,"ax",@progbits
 // CHECK: .align 2
 // CHECK: .Ltmp[[TMP7]]
 // CHECK: .word foo
 
 // CHECK: .section h,"ax",@progbits
 // CHECK: .align 2
 // CHECK: .Ltmp[[TMP8]]
 // CHECK: .word f5
 
 // CHECK: .section i,"ax",@progbits
 // CHECK: .align 2
 // CHECK: .Ltmp[[TMP9]]
 // CHECK: .word f12
+// CHECK: .align 2
 // CHECK: .Ltmp[[TMP10]]
 // CHECK: .word 245760
 
 // CHECK: .section j,"ax",@progbits
 // CHECK: .align 2
 // CHECK: .Ltmp[[TMP11]]
 // CHECK: .word bar
 
 // CHECK: .section k,"ax",@progbits
 // CHECK: .align 2
 // CHECK: .Ltmp[[TMP12]]
 // CHECK: .word 65544
+// CHECK: .align 2
 // CHECK: .Ltmp[[TMP13]]
 // CHECK: .word baz
 
 // CHECK: .section l,"ax",@progbits
 // CHECK: .align 2
 // CHECK: .Ltmp[[TMP14]]
 // CHECK: .word 65545
+// CHECK: .align 2
 // CHECK: .Ltmp[[TMP15]]
 // CHECK: .word bar+4
+
+// CHECK: .section m,"ax",@progbits
+// CHECK: .align 3
+// CHECK: .Ltmp[[TMP16]]
+// CHECK: .xword 72623859790382856
+// CHECK: .align 2
+// CHECK: .Ltmp[[TMP17]]
+// CHECK: .word bar
+// CHECK: .align 3
+// CHECK: .Ltmp[[TMP18]]
+// CHECK: .xword bar+16
+// CHECK: .align 3
+// CHECK: .Ltmp[[TMP19]]
+// CHECK: .xword 4294967297
+// CHECK: .align 3
+// CHECK: .Ltmp[[TMP20]]
+// CHECK: .xword -2147483649
+// CHECK: .align 3
+// CHECK: .Ltmp[[TMP21]]
+// CHECK: .xword 65537
+
+// CHECK: .section n,"ax",@progbits
+// CHECK: .align 2
+// CHECK: .Ltmp[[TMP22]]
+// CHECK: .word 4294967295
+// CHECK: .align 2
+// CHECK: .Ltmp[[TMP23]]
+// CHECK: .word -2147483647
+// CHECK: .align 2
+// CHECK: .Ltmp[[TMP24]]
+// CHECK: .word -1
+
+// CHECK: .section o,"ax",@progbits
+// CHECK: .align 2
+// CHECK: .Ltmp[[TMP25]]
+// CHECK: .word 3276900
+// CHECK: .align 3
+// CHECK: .Ltmp[[TMP26]]
+// CHECK: .xword 3276900

llvm/trunk/test/MC/ARM/ldr-pseudo-darwin.s

@ CHECK: ldr r0, Ltmp14
   ldr r0, =bar+4
 @ CHECK: ldr r0, Ltmp15
   adds r0, r0, #1
 
 @
 @ Constant Pools
 @
 @ CHECK: .section __TEXT,b,regular,pure_instructions
-@ CHECK: .align 2
 @ CHECK: .data_region
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp0:
 @ CHECK: .long 65537
 @ CHECK: .end_data_region
 
 @ CHECK: .section __TEXT,c,regular,pure_instructions
-@ CHECK: .align 2
 @ CHECK: .data_region
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp1:
 @ CHECK: .long 65538
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp2:
 @ CHECK: .long 65539
 @ CHECK: .end_data_region
 
 @ CHECK: .section __TEXT,d,regular,pure_instructions
-@ CHECK: .align 2
 @ CHECK: .data_region
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp3:
 @ CHECK: .long 65540
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp4:
 @ CHECK: .long 65540
 @ CHECK: .end_data_region
 
 @ CHECK: .section __TEXT,e,regular,pure_instructions
-@ CHECK: .align 2
 @ CHECK: .data_region
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp5:
 @ CHECK: .long 65542
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp6:
 @ CHECK: .long 65543
 @ CHECK: .end_data_region
 
 @ Should not switch to section because it has no constant pool
 @ CHECK-NOT: .section __TEXT,f,regular,pure_instructions
 
 @ CHECK: .section __TEXT,g,regular,pure_instructions
-@ CHECK: .align 2
 @ CHECK: .data_region
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp7:
 @ CHECK: .long foo
 @ CHECK: .end_data_region
 
 @ CHECK: .section __TEXT,h,regular,pure_instructions
-@ CHECK: .align 2
 @ CHECK: .data_region
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp8:
 @ CHECK: .long f5
 @ CHECK: .end_data_region
 
 @ CHECK: .section __TEXT,i,regular,pure_instructions
-@ CHECK: .align 2
 @ CHECK: .data_region
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp9:
 @ CHECK: .long f12
 @ CHECK: .end_data_region
 
 @ CHECK: .section __TEXT,j,regular,pure_instructions
-@ CHECK: .align 2
 @ CHECK: .data_region
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp10:
 @ CHECK: .long 257
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp11:
 @ CHECK: .long bar
 @ CHECK: .end_data_region
 
 @ CHECK: .section __TEXT,k,regular,pure_instructions
-@ CHECK: .align 2
 @ CHECK: .data_region
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp12:
 @ CHECK: .long 65544
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp13:
 @ CHECK: .long baz
 @ CHECK: .end_data_region
 
 @ CHECK: .section __TEXT,l,regular,pure_instructions
-@ CHECK: .align 2
 @ CHECK: .data_region
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp14:
 @ CHECK: .long 65545
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp15:
 @ CHECK: .long bar+4
 @ CHECK: .end_data_region

llvm/trunk/test/MC/ARM/ltorg-darwin.s

 f2:
   ldr r0, =0x10001
 @ CHECK: ldr r0, Ltmp0
   adds r0, r0, #1
   adds r0, r0, #1
   b f3
 .ltorg
 @ constant pool
-@ CHECK: .align 2
 @ CHECK: .data_region
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp0:
 @ CHECK: .long 65537
 @ CHECK: .end_data_region
 
 @ CHECK-LABEL: f3:
 f3:
   adds r0, r0, #1
   adds r0, r0, #1
 
 @ check that ltorg clears the constant pool after dumping it
 .section __TEXT,b,regular,pure_instructions
 @ CHECK-LABEL: f4:
 f4:
   ldr r0, =0x10002
 @ CHECK: ldr r0, Ltmp1
   adds r0, r0, #1
   adds r0, r0, #1
   b f5
 .ltorg
 @ constant pool
-@ CHECK: .align 2
 @ CHECK: .data_region
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp1:
 @ CHECK: .long 65538
 @ CHECK: .end_data_region
 
 @ CHECK-LABEL: f5:
 f5:
   adds r0, r0, #1
   adds r0, r0, #1
   ldr r0, =0x10003
 @ CHECK: ldr r0, Ltmp2
   adds r0, r0, #1
   b f6
 .ltorg
 @ constant pool
-@ CHECK: .align 2
 @ CHECK: .data_region
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp2:
 @ CHECK: .long 65539
 @ CHECK: .end_data_region
 
 @ CHECK-LABEL: f6:
 f6:
   adds r0, r0, #1
   adds r0, r0, #1
f9:
   ldr r0, =bar
 @ CHECK: ldr r0, Ltmp3
   adds r0, r0, #1
   adds r0, r0, #1
   adds r0, r0, #1
   b f10
 .ltorg
 @ constant pool
-@ CHECK: .align 2
 @ CHECK: .data_region
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp3:
 @ CHECK: .long bar
 @ CHECK: .end_data_region
 
 @ CHECK-LABEL: f10:
 f10:
   adds r0, r0, #1
   adds r0, r0, #1
 
 @ check that use of ltorg does not prevent dumping non-empty constant pools at end of section
 .section __TEXT,e,regular,pure_instructions
 @ CHECK-LABEL: f11:
 f11:
   adds r0, r0, #1
   adds r0, r0, #1
   ldr r0, =0x10004
 @ CHECK: ldr r0, Ltmp4
   b f12
   .ltorg
 @ constant pool
-@ CHECK: .align 2
 @ CHECK: .data_region
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp4:
 @ CHECK: .long 65540
 @ CHECK: .end_data_region
 
 @ CHECK-LABEL: f12:
 f12:
   adds r0, r0, #1
   ldr r0, =0x10005

 @ CHECK-NOT: .section __TEXT,a,regular,pure_instructions
 @ CHECK-NOT: .section __TEXT,b,regular,pure_instructions
 @ CHECK-NOT: .section __TEXT,c,regular,pure_instructions
 @ CHECK-NOT: .section __TEXT,d,regular,pure_instructions
 
 @ should have a non-empty constant pool at end of this section
 @ CHECK: .section __TEXT,e,regular,pure_instructions
 @ constant pool
-@ CHECK: .align 2
 @ CHECK: .data_region
+@ CHECK: .align 2
 @ CHECK-LABEL: Ltmp5:
 @ CHECK: .long 65541
 @ CHECK: .end_data_region
 
 @ should not have a constant pool at end of section with empty constant pools
 @ CHECK-NOT: .section __TEXT,f,regular,pure_instructions