[ARM64] Add/Fixup diagnostics for floating point immediates

[bsmith]

Summary

This patch adds more diagnostics and cleans up some existing ones for floating point immediates.

As with my previous patches, there is no testcase for this as it is part of the merge of MC/AArch64/basic-a64-diagnostics.s.

[t.p.northover]

Hi Bradley,

This looks good too.

Cheers.

Tim.

lib/Target/ARM64/ARM64InstrFormats.td

def ExtendOperandLSL64 : AsmOperandClass {
   let RenderMethod = "addExtend64Operands";
   let DiagnosticType = "AddSubRegExtendLarge";
 }
 
 // 8-bit floating-point immediate encodings.
 def FPImmOperand : AsmOperandClass {
   let Name = "FPImm";
   let ParserMethod = "tryParseFPImm";
+  let DiagnosticType = "InvalidFPImm";
 }
 
 def CondCode : AsmOperandClass {
   let Name = "CondCode";
   let DiagnosticType = "InvalidCondCode";
 }
 
 // 8-bit immediate for AdvSIMD where 64-bit values of the form:

lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp

if (Tok.is(AsmToken::Real)) {
     // If we had a '-' in front, toggle the sign bit.
     IntVal ^= (uint64_t)isNegative << 63;
     int Val = ARM64_AM::getFP64Imm(APInt(64, IntVal));
     Parser.Lex(); // Eat the token.
     // Check for out of range values. As an exception, we let Zero through,
     // as we handle that special case in post-processing before matching in
     // order to use the zero register for it.
     if (Val == -1 && !RealVal.isZero()) {
-      TokError("floating point value out of range");
+      TokError("expected compatible register or floating-point constant");
       return MatchOperand_ParseFail;
     }
     Operands.push_back(ARM64Operand::CreateFPImm(Val, S, getContext()));
     return MatchOperand_Success;
   }
   if (Tok.is(AsmToken::Integer)) {
     int64_t Val;
     if (!isNegative && Tok.getString().startswith("0x")) {
bool ARM64AsmParser::parseOperand(OperandVector &Operands, bool isCondCode,
   case AsmToken::Integer:
   case AsmToken::Real:
   case AsmToken::Hash: {
     // #42 -> immediate.
     S = getLoc();
     if (getLexer().is(AsmToken::Hash))
       Parser.Lex();
 
+    // Parse a negative sign
+    bool isNegative = false;
+    if (Parser.getTok().is(AsmToken::Minus)) {
+      isNegative = true;
+      // We need to consume this token only when we have a Real, otherwise
+      // we let parseSymbolicImmVal take care of it
+      if (Parser.getLexer().peekTok().is(AsmToken::Real))
+        Parser.Lex();
+    }
+
     // The only Real that should come through here is a literal #0.0 for
     // the fcmp[e] r, #0.0 instructions. They expect raw token operands,
     // so convert the value.
     const AsmToken &Tok = Parser.getTok();
     if (Tok.is(AsmToken::Real)) {
       APFloat RealVal(APFloat::IEEEdouble, Tok.getString());
       uint64_t IntVal = RealVal.bitcastToAPInt().getZExtValue();
       if (Mnemonic != "fcmp" && Mnemonic != "fcmpe" && Mnemonic != "fcmeq" &&
           Mnemonic != "fcmge" && Mnemonic != "fcmgt" && Mnemonic != "fcmle" &&
           Mnemonic != "fcmlt")
         return TokError("unexpected floating point literal");
-      else if (IntVal != 0)
-        return TokError("only valid floating-point immediate is #0.0");
+      else if (IntVal != 0 || isNegative)
+        return TokError("expected floating-point constant #0.0");
       Parser.Lex(); // Eat the token.
 
       Operands.push_back(
           ARM64Operand::CreateToken("#0", false, S, getContext()));
       Operands.push_back(
           ARM64Operand::CreateToken(".0", false, S, getContext()));
       return false;
     }
bool ARM64AsmParser::showMatchError(SMLoc Loc, unsigned ErrCode) {
   case Match_InvalidMovImm64Shift:
     return Error(Loc, "expected 'lsl' with optional integer 0, 16, 32 or 48");
   case Match_AddSubRegShift32:
     return Error(Loc,
        "expected 'lsl', 'lsr' or 'asr' with optional integer in range [0, 31]");
   case Match_AddSubRegShift64:
     return Error(Loc,
        "expected 'lsl', 'lsr' or 'asr' with optional integer in range [0, 63]");
+  case Match_InvalidFPImm:
+    return Error(Loc,
+                 "expected compatible register or floating-point constant");
   case Match_InvalidMemoryIndexedSImm9:
     return Error(Loc, "index must be an integer in range [-256, 255].");
   case Match_InvalidMemoryIndexed32SImm7:
     return Error(Loc, "index must be a multiple of 4 in range [-256, 252].");
   case Match_InvalidMemoryIndexed64SImm7:
     return Error(Loc, "index must be a multiple of 8 in range [-512, 504].");
   case Match_InvalidMemoryIndexed128SImm7:
     return Error(Loc, "index must be a multiple of 16 in range [-1024, 1008].");
bool ARM64AsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
   case Match_AddSubRegExtendSmall:
   case Match_AddSubRegExtendLarge:
   case Match_AddSubSecondSource:
   case Match_LogicalSecondSource:
   case Match_AddSubRegShift32:
   case Match_AddSubRegShift64:
   case Match_InvalidMovImm32Shift:
   case Match_InvalidMovImm64Shift:
+  case Match_InvalidFPImm:
   case Match_InvalidMemoryIndexed8:
   case Match_InvalidMemoryIndexed16:
   case Match_InvalidMemoryIndexed32SImm7:
   case Match_InvalidMemoryIndexed64SImm7:
   case Match_InvalidMemoryIndexed128SImm7:
   case Match_InvalidImm0_7:
   case Match_InvalidImm0_15:
   case Match_InvalidImm0_31:

test/MC/AArch64/neon-diagnostics.s

 
 // CHECK-AARCH64-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-AARCH64-ERROR:        fcmeq v0.8b, v1.4h, #1.0
 // CHECK-AARCH64-ERROR:                             ^
 // CHECK-AARCH64-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-AARCH64-ERROR:        fcmeq v0.8b, v1.4h, #1
 // CHECK-AARCH64-ERROR:                             ^
 
-// CHECK-ARM64-ERROR: error: only valid floating-point immediate is #0.0
+// CHECK-ARM64-ERROR: error: expected floating-point constant #0.0
 // CHECK-ARM64-ERROR:        fcmeq v0.8b, v1.4h, #1.0
 // CHECK-ARM64-ERROR:                             ^
 // CHECK-ARM64-ERROR: error: invalid operand for instruction
 // CHECK-ARM64-ERROR:        fcmeq v0.8b, v1.4h, #1
 // CHECK-ARM64-ERROR:                             ^
 
 //----------------------------------------------------------------------
 // Vector Compare Mask Greater Than or Equal to Zero (Floating Point)

 
 // CHECK-AARCH64-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-AARCH64-ERROR:        fcmle v17.8h, v15.2d, #-1.0
 // CHECK-AARCH64-ERROR:                               ^
 // CHECK-AARCH64-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-AARCH64-ERROR:        fcmle v17.8h, v15.2d, #2
 // CHECK-AARCH64-ERROR:                               ^
 
-// CHECK-ARM64-ERROR: error: invalid operand for instruction
+// CHECK-ARM64-ERROR: error: expected floating-point constant #0.0
 // CHECK-ARM64-ERROR:        fcmle v17.8h, v15.2d, #-1.0
 // CHECK-ARM64-ERROR:                               ^
 // CHECK-ARM64-ERROR: error: invalid operand for instruction
 // CHECK-ARM64-ERROR:        fcmle v17.8h, v15.2d, #2
 // CHECK-ARM64-ERROR:                               ^
 
 //----------------------------------------------------------------------
 // Vector Compare Mask Greater Than Zero (Floating Point)

 
 // CHECK-AARCH64-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-AARCH64-ERROR:        fcmlt v29.2d, v5.2d, #255.0
 // CHECK-AARCH64-ERROR:                              ^
 // CHECK-AARCH64-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-AARCH64-ERROR:        fcmlt v29.2d, v5.2d, #255
 // CHECK-AARCH64-ERROR:                              ^
 
-// CHECK-ARM64-ERROR: error: only valid floating-point immediate is #0.0
+// CHECK-ARM64-ERROR: error: expected floating-point constant #0.0
 // CHECK-ARM64-ERROR:        fcmlt v29.2d, v5.2d, #255.0
 // CHECK-ARM64-ERROR:                              ^
 // CHECK-ARM64-ERROR: error: invalid operand for instruction
 // CHECK-ARM64-ERROR:        fcmlt v29.2d, v5.2d, #255
 // CHECK-ARM64-ERROR:                              ^
 
 //----------------------------------------------------------------------
 // Vector Compare Mask Less Than or Equal To Zero (Floating Point)

 
 // CHECK-AARCH64-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-AARCH64-ERROR:        fcmle v17.2d, v15.2d, #15.0
 // CHECK-AARCH64-ERROR:                               ^
 // CHECK-AARCH64-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-AARCH64-ERROR:        fcmle v17.2d, v15.2d, #15
 // CHECK-AARCH64-ERROR:                              ^
 
-// CHECK-ARM64-ERROR: error: only valid floating-point immediate is #0.0
+// CHECK-ARM64-ERROR: error: expected floating-point constant #0.0
 // CHECK-ARM64-ERROR:        fcmle v17.2d, v15.2d, #15.0
 // CHECK-ARM64-ERROR:                               ^
 // CHECK-ARM64-ERROR: error: invalid operand for instruction
 // CHECK-ARM64-ERROR:        fcmle v17.2d, v15.2d, #15
 // CHECK-ARM64-ERROR:                              ^
 
 //----------------------------------------------------------------------
 // Vector Compare Mask Less Than Zero (Floating Point)

 
 // CHECK-AARCH64-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-AARCH64-ERROR:        fcmlt v29.2d, v5.2d, #16.0
 // CHECK-AARCH64-ERROR:                              ^
 // CHECK-AARCH64-ERROR: error: only #0.0 is acceptable as immediate
 // CHECK-AARCH64-ERROR:        fcmlt v29.2d, v5.2d, #2
 // CHECK-AARCH64-ERROR:                              ^
 
-// CHECK-ARM64-ERROR: error: only valid floating-point immediate is #0.0
+// CHECK-ARM64-ERROR: error: expected floating-point constant #0.0
 // CHECK-ARM64-ERROR:        fcmlt v29.2d, v5.2d, #16.0
 // CHECK-ARM64-ERROR:                              ^
 // CHECK-ARM64-ERROR: error: invalid operand for instruction
 // CHECK-ARM64-ERROR:        fcmlt v29.2d, v5.2d, #2
 // CHECK-ARM64-ERROR:                              ^
 
 /-----------------------------------------------------------------------
 // Vector Integer Halving Add (Signed)