Teach FastISel about address spaces.

[arsenm]

Summary

No test since R600 doesn't implement it yet. This mostly is just removing default arguments for the address space.

[arsenm]

Ping

[echristo]

Adding myself as a reviewer. Not happy with some of the changes, but I'll think about some of it.

include/llvm/CodeGen/FastISel.h

 
   /// This is a wrapper around getRegForValue that also takes care of truncating
   /// or sign-extending the given getelementptr index value.
-  std::pair<unsigned, bool> getRegForGEPIndex(const Value *V);
+  std::pair<unsigned, bool> getRegForGEPIndex(MVT PtrVT, const Value *V);
 
   /// \brief We're checking to see if we can fold \p LI into \p FoldInst. Note
   /// that we could have a sequence where multiple LLVM IR instructions are

lib/CodeGen/SelectionDAG/FastISel.cpp

     if (!Reg) {
       // Try to emit the constant by using an integer constant with a cast.
       const APFloat &Flt = CF->getValueAPF();
-      EVT IntVT = TLI.getPointerTy();
+      EVT IntVT = TLI.getPointerTy(0);
 
       uint64_t x[2];
       uint32_t IntBitWidth = IntVT.getSizeInBits();

   }
 }
 
-std::pair<unsigned, bool> FastISel::getRegForGEPIndex(const Value *Idx) {
+std::pair<unsigned, bool> FastISel::getRegForGEPIndex(MVT PtrVT,
+                                                      const Value *Idx) {
   unsigned IdxN = getRegForValue(Idx);
   if (IdxN == 0)
     // Unhandled operand. Halt "fast" selection and bail.

   bool IdxNIsKill = hasTrivialKill(Idx);
 
   // If the index is smaller or larger than intptr_t, truncate or extend it.
-  MVT PtrVT = TLI.getPointerTy();
   EVT IdxVT = EVT::getEVT(Idx->getType(), /*HandleUnknown=*/false);
   if (IdxVT.bitsLT(PtrVT)) {
     IdxN = FastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND,

   // FIXME: What's a good SWAG number for MaxOffs?
   uint64_t MaxOffs = 2048;
   Type *Ty = I->getOperand(0)->getType();
-  MVT VT = TLI.getPointerTy();
+  MVT VT = TLI.getPointerTy(Ty->getPointerAddressSpace());
   for (GetElementPtrInst::const_op_iterator OI = I->op_begin()+1,
        E = I->op_end(); OI != E; ++OI) {
     const Value *Idx = *OI;

 
       // N = N + Idx * ElementSize;
       uint64_t ElementSize = DL.getTypeAllocSize(Ty);
-      std::pair<unsigned, bool> Pair = getRegForGEPIndex(Idx);
+      std::pair<unsigned, bool> Pair = getRegForGEPIndex(VT, Idx);
       unsigned IdxN = Pair.first;
       bool IdxNIsKill = Pair.second;
       if (IdxN == 0)

lib/Target/X86/X86FastISel.cpp

         // Prepare for inserting code in the local-value area.
         SavePoint SaveInsertPt = enterLocalValueArea();
 
-        if (TLI.getPointerTy() == MVT::i64) {
+        unsigned AS = GV->getType()->getPointerAddressSpace();
+        if (TLI.getPointerTy(AS) == MVT::i64) {
           Opc = X86::MOV64rm;
           RC  = &X86::GR64RegClass;
 

     // Look past bitcasts.
     return X86SelectAddress(U->getOperand(0), AM);
 
-  case Instruction::IntToPtr:
+  case Instruction::IntToPtr: {
     // Look past no-op inttoptrs.
-    if (TLI.getValueType(U->getOperand(0)->getType()) == TLI.getPointerTy())
+    unsigned AS = U->getType()->getPointerAddressSpace();
+    if (TLI.getValueType(U->getOperand(0)->getType()) == TLI.getPointerTy(AS))
       return X86SelectAddress(U->getOperand(0), AM);
     break;
-
-  case Instruction::PtrToInt:
+  }
+  case Instruction::PtrToInt: {
     // Look past no-op ptrtoints.
-    if (TLI.getValueType(U->getType()) == TLI.getPointerTy())
+    unsigned AS = U->getOperand(0)->getType()->getPointerAddressSpace();
+    if (TLI.getValueType(U->getType()) == TLI.getPointerTy(AS))
       return X86SelectAddress(U->getOperand(0), AM);
     break;
-
+  }
   case Instruction::Alloca: {
     // Do static allocas.
     const AllocaInst *A = cast<AllocaInst>(V);

     unsigned IndexReg = AM.IndexReg;
     unsigned Scale = AM.Scale;
     gep_type_iterator GTI = gep_type_begin(U);
+    MVT PtrTy = TLI.getPointerTy(U->getType()->getPointerAddressSpace());
     // Iterate through the indices, folding what we can. Constants can be
     // folded, and one dynamic index can be handled, if the scale is supported.
     for (User::const_op_iterator i = U->op_begin() + 1, e = U->op_end();

             (S == 1 || S == 2 || S == 4 || S == 8)) {
           // Scaled-index addressing.
           Scale = S;
-          IndexReg = getRegForGEPIndex(Op).first;
+          IndexReg = getRegForGEPIndex(PtrTy, Op).first;
           if (IndexReg == 0)
             return false;
           break;

       return X86SelectCallAddress(U->getOperand(0), AM);
     break;
 
-  case Instruction::IntToPtr:
+  case Instruction::IntToPtr: {
     // Look past no-op inttoptrs if its operand is in the same BB.
-    if (InMBB &&
-        TLI.getValueType(U->getOperand(0)->getType()) == TLI.getPointerTy())
+    if (!InMBB)
+      break;
+
+    unsigned AS = U->getType()->getPointerAddressSpace();
+    if (TLI.getValueType(U->getOperand(0)->getType()) == TLI.getPointerTy(AS))
       return X86SelectCallAddress(U->getOperand(0), AM);
     break;
-
-  case Instruction::PtrToInt:
+  }
+  case Instruction::PtrToInt: {
     // Look past no-op ptrtoints if its operand is in the same BB.
-    if (InMBB &&
-        TLI.getValueType(U->getType()) == TLI.getPointerTy())
+    if (!InMBB)
+      break;
+
+    unsigned AS = U->getOperand(0)->getType()->getPointerAddressSpace();
+    if (TLI.getValueType(U->getType()) == TLI.getPointerTy(AS))
       return X86SelectCallAddress(U->getOperand(0), AM);
     break;
   }
+  }
 
   // Handle constant address.
   if (const GlobalValue *GV = dyn_cast<GlobalValue>(V)) {

           AM.IndexReg == 0 && AM.Disp == 0 && AM.GV == 0)
         return AM.Base.Reg;
 
-      Opc = TLI.getPointerTy() == MVT::i32 ? X86::LEA32r : X86::LEA64r;
+      unsigned AS = C->getType()->getPointerAddressSpace();
+      Opc = TLI.getPointerTy(AS) == MVT::i32 ? X86::LEA32r : X86::LEA64r;
       unsigned ResultReg = createResultReg(RC);
       addFullAddress(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
                              TII.get(Opc), ResultReg), AM);

   if (!X86SelectAddress(C, AM))
     return 0;
   unsigned Opc = Subtarget->is64Bit() ? X86::LEA64r : X86::LEA32r;
-  const TargetRegisterClass* RC = TLI.getRegClassFor(TLI.getPointerTy());
+  unsigned AS = C->getType()->getPointerAddressSpace();
+  const TargetRegisterClass *RC = TLI.getRegClassFor(TLI.getPointerTy(AS));
   unsigned ResultReg = createResultReg(RC);
   addFullAddress(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
                          TII.get(Opc), ResultReg), AM);