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[AMDGPU][llvm-mc] Disassembler: support for TTMP/TBA/TMA registers.
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Authored by artem.tamazov on May 20 2016, 10:07 AM.

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artem.tamazov retitled this revision from to [AMDGPU][llvm-mc] Disassembler: support for TTMP/TBA/TMA registers..
artem.tamazov updated this object.
artem.tamazov added reviewers: vpykhtin, SamWot.
artem.tamazov set the repository for this revision to rL LLVM.
artem.tamazov added a project: Restricted Project.
artem.tamazov added subscribers: Restricted Project, nhaustov, tstellarAMD, arsenm.
arsenm added inline comments.May 20 2016, 7:12 PM
lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
198

line breaks

316

Space before (

318–320

Can you factor these switches into functions with returns

324

These should be in some named constant. MinSGPRVal etc?

lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
72

Separate lines for each item

SamWot added inline comments.May 23 2016, 5:53 AM
lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
196

Why did you removed SReg_32RegClassID? Does TTMP_32RegClassID contains SReg_32RegClassID?

artem.tamazov marked an inline comment as done.May 23 2016, 8:47 AM
artem.tamazov added inline comments.
lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
196

"case SReg_32RegClassID:" was dead code and thus removed.
TTMP_32-related case added for the new/fixed functionality.

SamWot accepted this revision.May 23 2016, 8:48 AM
SamWot edited edge metadata.

LGTM

This revision is now accepted and ready to land.May 23 2016, 8:48 AM
artem.tamazov edited edge metadata.
artem.tamazov marked an inline comment as done.

Review fixes.

artem.tamazov marked 4 inline comments as done.May 23 2016, 9:28 AM
artem.tamazov marked 2 inline comments as done.May 23 2016, 9:28 AM
This revision was automatically updated to reflect the committed changes.