Power9 - Support for -mcpu=pwr9 in the front end

[nemanjai]

Summary

This patch simply adds support for the new CPU in anticipation of Power9. There isn't really any functionality added so there are no associated test cases at this time.

[nemanjai]

lib/Basic/Targets.cpp

1239

Come to think of it - I should add a test case for this macro. It will be on the next revision if one is required or in the actual commit otherwise.

[kbarton]

LGTM

[echristo]

Please do add tests before committing. Otherwise ok.

Thanks.

-eric

lib/Basic/Targets.cpp

1239

Please add a test for everything you just added, yes. :)

[nemanjai]

Committed revision 268951.

lib/Basic/Targets.cpp

typedef enum {
     ArchDefine604   = 1 << 5,
     ArchDefinePwr4  = 1 << 6,
     ArchDefinePwr5  = 1 << 7,
     ArchDefinePwr5x = 1 << 8,
     ArchDefinePwr6  = 1 << 9,
     ArchDefinePwr6x = 1 << 10,
     ArchDefinePwr7  = 1 << 11,
     ArchDefinePwr8  = 1 << 12,
-    ArchDefineA2    = 1 << 13,
-    ArchDefineA2q   = 1 << 14
+    ArchDefinePwr9  = 1 << 13,
+    ArchDefineA2    = 1 << 14,
+    ArchDefineA2q   = 1 << 15
   } ArchDefineTypes;
 
   // Note: GCC recognizes the following additional cpus:
   //  401, 403, 405, 405fp, 440fp, 464, 464fp, 476, 476fp, 505, 740, 801,
   //  821, 823, 8540, 8548, e300c2, e300c3, e500mc64, e6500, 860, cell,
   //  titan, rs64.
   bool setCPU(const std::string &Name) override {
     bool CPUKnown = llvm::StringSwitch<bool>(Name)
bool CPUKnown = llvm::StringSwitch<bool>(Name)
       .Case("power6", true)
       .Case("pwr6", true)
       .Case("power6x", true)
       .Case("pwr6x", true)
       .Case("power7", true)
       .Case("pwr7", true)
       .Case("power8", true)
       .Case("pwr8", true)
+      .Case("power9", true)
+      .Case("pwr9", true)
       .Case("powerpc", true)
       .Case("ppc", true)
       .Case("powerpc64", true)
       .Case("ppc64", true)
       .Case("powerpc64le", true)
       .Case("ppc64le", true)
       .Default(false);
 
.Case("pwr6x", ArchDefineName | ArchDefinePwr6 | ArchDefinePwr5x
                      | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
                      | ArchDefinePpcsq)
     .Case("pwr7",  ArchDefineName | ArchDefinePwr6x | ArchDefinePwr6
                      | ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4
                      | ArchDefinePpcgr | ArchDefinePpcsq)
     .Case("pwr8",  ArchDefineName | ArchDefinePwr7 | ArchDefinePwr6x
                      | ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5
                      | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
+    .Case("pwr9",  ArchDefineName | ArchDefinePwr8 | ArchDefinePwr7
+                     | ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x
+                     | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
+                     | ArchDefinePpcsq)
     .Case("power3",  ArchDefinePpcgr)
     .Case("power4",  ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
     .Case("power5",  ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
                        | ArchDefinePpcsq)
     .Case("power5x", ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4
                        | ArchDefinePpcgr | ArchDefinePpcsq)
     .Case("power6",  ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5
                        | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
     .Case("power6x", ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x
                        | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
                        | ArchDefinePpcsq)
     .Case("power7",  ArchDefinePwr7 | ArchDefinePwr6x | ArchDefinePwr6
                        | ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4
                        | ArchDefinePpcgr | ArchDefinePpcsq)
     .Case("power8",  ArchDefinePwr8 | ArchDefinePwr7 | ArchDefinePwr6x
                        | ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5
                        | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
+    .Case("power9",  ArchDefinePwr9 | ArchDefinePwr8 | ArchDefinePwr7
+                       | ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x
+                       | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
+                       | ArchDefinePpcsq)
     .Default(ArchDefineNone);
 
   if (defs & ArchDefineName)
     Builder.defineMacro(Twine("_ARCH_", StringRef(CPU).upper()));
   if (defs & ArchDefinePpcgr)
     Builder.defineMacro("_ARCH_PPCGR");
   if (defs & ArchDefinePpcsq)
     Builder.defineMacro("_ARCH_PPCSQ");
void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
   if (defs & ArchDefinePwr6)
     Builder.defineMacro("_ARCH_PWR6");
   if (defs & ArchDefinePwr6x)
     Builder.defineMacro("_ARCH_PWR6X");
   if (defs & ArchDefinePwr7)
     Builder.defineMacro("_ARCH_PWR7");
   if (defs & ArchDefinePwr8)
     Builder.defineMacro("_ARCH_PWR8");
+  if (defs & ArchDefinePwr9)
+    Builder.defineMacro("_ARCH_PWR9");
   if (defs & ArchDefineA2)
     Builder.defineMacro("_ARCH_A2");
   if (defs & ArchDefineA2q) {
     Builder.defineMacro("_ARCH_A2Q");
     Builder.defineMacro("_ARCH_QP");
   }
 
   if (getTriple().getVendor() == llvm::Triple::BGQ) {
Features["altivec"] = llvm::StringSwitch<bool>(CPU)
     .Case("g4", true)
     .Case("7450", true)
     .Case("g4+", true)
     .Case("970", true)
     .Case("g5", true)
     .Case("pwr6", true)
     .Case("pwr7", true)
     .Case("pwr8", true)
+    .Case("pwr9", true)
     .Case("ppc64", true)
     .Case("ppc64le", true)
     .Default(false);
 
   Features["qpx"] = (CPU == "a2q");
   Features["crypto"] = llvm::StringSwitch<bool>(CPU)
     .Case("ppc64le", true)
+    .Case("pwr9", true)
     .Case("pwr8", true)
     .Default(false);
   Features["power8-vector"] = llvm::StringSwitch<bool>(CPU)
     .Case("ppc64le", true)
+    .Case("pwr9", true)
     .Case("pwr8", true)
     .Default(false);
   Features["bpermd"] = llvm::StringSwitch<bool>(CPU)
     .Case("ppc64le", true)
+    .Case("pwr9", true)
     .Case("pwr8", true)
     .Case("pwr7", true)
     .Default(false);
   Features["extdiv"] = llvm::StringSwitch<bool>(CPU)
     .Case("ppc64le", true)
+    .Case("pwr9", true)
     .Case("pwr8", true)
     .Case("pwr7", true)
     .Default(false);
   Features["direct-move"] = llvm::StringSwitch<bool>(CPU)
     .Case("ppc64le", true)
+    .Case("pwr9", true)
     .Case("pwr8", true)
     .Default(false);
   Features["vsx"] = llvm::StringSwitch<bool>(CPU)
     .Case("ppc64le", true)
+    .Case("pwr9", true)
     .Case("pwr8", true)
     .Case("pwr7", true)
     .Default(false);
 
   if (!ppcUserFeaturesCheck(Diags, FeaturesVec))
     return false;
 
   return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);

lib/Driver/Tools.cpp

return llvm::StringSwitch<const char *>(CPUName)
         .Case("power3", "pwr3")
         .Case("power4", "pwr4")
         .Case("power5", "pwr5")
         .Case("power5x", "pwr5x")
         .Case("power6", "pwr6")
         .Case("power6x", "pwr6x")
         .Case("power7", "pwr7")
         .Case("power8", "pwr8")
+        .Case("power9", "pwr9")
         .Case("pwr3", "pwr3")
         .Case("pwr4", "pwr4")
         .Case("pwr5", "pwr5")
         .Case("pwr5x", "pwr5x")
         .Case("pwr6", "pwr6")
         .Case("pwr6x", "pwr6x")
         .Case("pwr7", "pwr7")
         .Case("pwr8", "pwr8")
+        .Case("pwr9", "pwr9")
         .Case("powerpc", "ppc")
         .Case("powerpc64", "ppc64")
         .Case("powerpc64le", "ppc64le")
         .Default("");
   }
 
   return "";
 }