Split IntrReadArgMem into IntrReadMem and IntrArgMemOnly

[nhaehnle]

Summary

IntrReadWriteArgMem simply becomes IntrArgMemOnly.

So there are fewer intrinsic properties that express their orthogonality
better, and correspond more closely to the corresponding IR attributes.

Suggested by: Philip Reames

[arsenm]

Are autoupgrader patches needed?

[mehdi_amini]

In D19291#405857, @arsenm wrote:

Are autoupgrader patches needed?

Not totally sure but I thought we don't store intrinsic attributes in the bitcode and instead apply the one defined in table-gen any time you create a function for which the name matches the intrinsic?

[nhaehnle]

This change should be totally unrelated to IR bitcode. The Intr* properties are only ever seen by TableGen. TableGen maps the Intr* properties to IR attributes in IntrinsicEmitter::EmitAttributes, but that mapping is unaffected by the change at hand. The attribute emission code could be cleaned up as well, but I'd rather do that separately, see also D18714.

[reames]

LGTM. I have tried to review all the changes, but it's possible I missed something in the mechanical parts. I'm assuming author did this via find/replace or other tooling so that chances of typos are low.

The naming and style comments would be best addressed in a separate commit.

include/llvm/IR/Intrinsics.td

34 ↗

(On Diff #54282)

The (unless also...) part is confusing. Possibly, "it cannot be moved across aliasing potentially stores"?

utils/TableGen/CodeGenTarget.cpp

451 ↗

(On Diff #54282)

For clarify, should this become ReadWriteAllMem?

577 ↗

(On Diff #54282)

This appears to be correct, but slightly confusing. I don't see an obvious way to make it better other than possibly switching from using ModRefBehavior names to explicitly ORd bits. Eg.

Start with ModRef = RWA;
...
else if (Property->getName() == "IntrWriteMem")

ModRef = ModRefBehavior(ModRef & ~MR_Ref);

[nhaehnle]

Yes, the bulk of changes was done by a simple sed script after skimming a grep result to look for outliers.

I'm going to commit with your other suggestions except the ReadWriteAllMem (perhaps AnyMem?), because that seems a bit much in one change.

llvm/trunk/include/llvm/Analysis/AliasAnalysis.h

enum FunctionModRefBehavior {
   ///
   /// This property corresponds to the IntrReadArgMem LLVM intrinsic flag.
   FMRB_OnlyReadsArgumentPointees = FMRL_ArgumentPointees | MRI_Ref,
 
   /// The only memory references in this function (if it has any) are
   /// non-volatile loads and stores from objects pointed to by its
   /// pointer-typed arguments, with arbitrary offsets.
   ///
-  /// This property corresponds to the IntrReadWriteArgMem LLVM intrinsic flag.
+  /// This property corresponds to the IntrArgMemOnly LLVM intrinsic flag.
   FMRB_OnlyAccessesArgumentPointees = FMRL_ArgumentPointees | MRI_ModRef,
 
   /// This function does not perform any non-local stores or volatile loads,
   /// but may read from any memory location.
   ///
   /// This property corresponds to the GCC 'pure' attribute.
   /// This property corresponds to the LLVM IR 'readonly' attribute.
   /// This property corresponds to the IntrReadMem LLVM intrinsic flag.

llvm/trunk/include/llvm/IR/Intrinsics.td

 // if correct) to the least aggressive.  If no property is set, the worst case
 // is assumed (it may read and write any memory it can get access to and it may
 // have other side effects).
 
 // IntrNoMem - The intrinsic does not access memory or have any other side
 // effects.  It may be CSE'd deleted if dead, etc.
 def IntrNoMem : IntrinsicProperty;
 
-// IntrReadArgMem - This intrinsic reads only from memory that one of its
-// pointer-typed arguments points to, but may read an unspecified amount.
-def IntrReadArgMem : IntrinsicProperty;
-
-// IntrReadMem - This intrinsic reads from unspecified memory, so it cannot be
-// moved across stores.  However, it can be reordered otherwise and can be
-// deleted if dead.
+// IntrReadMem - This intrinsic only reads from memory. It does not write to
+// memory and has no other side effects. Therefore, it cannot be moved across
+// potentially aliasing stores. However, it can be reordered otherwise and can
+// be deleted if dead.
 def IntrReadMem : IntrinsicProperty;
 
-// IntrWriteMem - This intrinsic writes to unspecified memory, but does not
-// read from memory, and has no other side effects. This means dead stores
-// before calls to this intrinsics may be removed.
+// IntrWriteMem - This intrinsic only writes to memory, but does not read from
+// memory, and has no other side effects. This means dead stores before calls
+// to this intrinsics may be removed.
 def IntrWriteMem : IntrinsicProperty;
 
-// IntrWriteArgMem - This intrinsic writes only to memory that one of its
-// arguments points to, but may access an unspecified amount. The intrinsic
-// does not read from memory and has no other side effects. This means that
-// dead stores before calls to this intrinsics may be removed.
-def IntrWriteArgMem : IntrinsicProperty;
-
-// IntrReadWriteArgMem - This intrinsic reads and writes only from memory that
-// one of its arguments points to, but may access an unspecified amount.  The
-// reads and writes may be volatile, but except for this it has no other side
-// effects.
-def IntrReadWriteArgMem : IntrinsicProperty;
+// IntrArgMemOnly - This intrinsic only accesses memory that its pointer-typed
+// argument(s) points to, but may access an unspecified amount. Other than
+// reads from and (possibly volatile) writes to memory, it has no side effects.
+def IntrArgMemOnly : IntrinsicProperty;
 
 // Commutative - This intrinsic is commutative: X op Y == Y op X.
 def Commutative : IntrinsicProperty;
 
 // Throws - This intrinsic can throw.
 def Throws : IntrinsicProperty;
 
 // NoCapture - The specified argument pointer is not captured by the intrinsic.

 def int_vaend   : Intrinsic<[], [llvm_ptr_ty], [], "llvm.va_end">;
 
 //===------------------- Garbage Collection Intrinsics --------------------===//
 //
 def int_gcroot  : Intrinsic<[],
                             [llvm_ptrptr_ty, llvm_ptr_ty]>;
 def int_gcread  : Intrinsic<[llvm_ptr_ty],
                             [llvm_ptr_ty, llvm_ptrptr_ty],
-                            [IntrReadArgMem]>;
+                            [IntrReadMem, IntrArgMemOnly]>;
 def int_gcwrite : Intrinsic<[],
                             [llvm_ptr_ty, llvm_ptr_ty, llvm_ptrptr_ty],
-                            [IntrReadWriteArgMem, NoCapture<1>, NoCapture<2>]>;
+                            [IntrArgMemOnly, NoCapture<1>, NoCapture<2>]>;
 
 //===--------------------- Code Generator Intrinsics ----------------------===//
 //
 def int_returnaddress : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty], [IntrNoMem]>;
 def int_frameaddress  : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty], [IntrNoMem]>;
 def int_read_register  : Intrinsic<[llvm_anyint_ty], [llvm_metadata_ty],
                                    [IntrReadMem], "llvm.read_register">;
 def int_write_register : Intrinsic<[], [llvm_metadata_ty, llvm_anyint_ty],

 def int_stackrestore  : Intrinsic<[], [llvm_ptr_ty]>,
                         GCCBuiltin<"__builtin_stack_restore">;
 
 def int_get_dynamic_area_offset : Intrinsic<[llvm_anyint_ty]>;
 
 def int_thread_pointer : Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>,
                          GCCBuiltin<"__builtin_thread_pointer">;
 
-// IntrReadWriteArgMem is more pessimistic than strictly necessary for prefetch,
+// IntrArgMemOnly is more pessimistic than strictly necessary for prefetch,
 // however it does conveniently prevent the prefetch from being reordered
 // with respect to nearby accesses to the same memory.
 def int_prefetch      : Intrinsic<[],
                                   [llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty,
                                    llvm_i32_ty],
-                                  [IntrReadWriteArgMem, NoCapture<0>]>;
+                                  [IntrArgMemOnly, NoCapture<0>]>;
 def int_pcmarker      : Intrinsic<[], [llvm_i32_ty]>;
 
 def int_readcyclecounter : Intrinsic<[llvm_i64_ty]>;
 
 // The assume intrinsic is marked as arbitrarily writing so that proper
 // control dependencies will be maintained.
 def int_assume        : Intrinsic<[], [llvm_i1_ty], []>;
 
def int_instrprof_value_profile : Intrinsic<[],
                                             []>;
 
 //===------------------- Standard C Library Intrinsics --------------------===//
 //
 
 def int_memcpy  : Intrinsic<[],
                              [llvm_anyptr_ty, llvm_anyptr_ty, llvm_anyint_ty,
                               llvm_i32_ty, llvm_i1_ty],
-                            [IntrReadWriteArgMem, NoCapture<0>, NoCapture<1>,
+                            [IntrArgMemOnly, NoCapture<0>, NoCapture<1>,
                              ReadOnly<1>]>;
 def int_memmove : Intrinsic<[],
                             [llvm_anyptr_ty, llvm_anyptr_ty, llvm_anyint_ty,
                              llvm_i32_ty, llvm_i1_ty],
-                            [IntrReadWriteArgMem, NoCapture<0>, NoCapture<1>,
+                            [IntrArgMemOnly, NoCapture<0>, NoCapture<1>,
                              ReadOnly<1>]>;
 def int_memset  : Intrinsic<[],
                             [llvm_anyptr_ty, llvm_i8_ty, llvm_anyint_ty,
                              llvm_i32_ty, llvm_i1_ty],
-                            [IntrReadWriteArgMem, NoCapture<0>]>;
+                            [IntrArgMemOnly, NoCapture<0>]>;
 
 let IntrProperties = [IntrNoMem] in {
   def int_fma  : Intrinsic<[llvm_anyfloat_ty],
                            [LLVMMatchType<0>, LLVMMatchType<0>,
                             LLVMMatchType<0>]>;
   def int_fmuladd : Intrinsic<[llvm_anyfloat_ty],
                               [LLVMMatchType<0>, LLVMMatchType<0>,
                                LLVMMatchType<0>]>;
def int_annotation : Intrinsic<[llvm_anyint_ty],
                                [LLVMMatchType<0>, llvm_ptr_ty,
                                 llvm_ptr_ty, llvm_i32_ty],
                                [], "llvm.annotation">;
 
 //===------------------------ Trampoline Intrinsics -----------------------===//
 //
 def int_init_trampoline : Intrinsic<[],
                                     [llvm_ptr_ty, llvm_ptr_ty, llvm_ptr_ty],
-                                    [IntrReadWriteArgMem, NoCapture<0>]>,
+                                    [IntrArgMemOnly, NoCapture<0>]>,
                                    GCCBuiltin<"__builtin_init_trampoline">;
 
 def int_adjust_trampoline : Intrinsic<[llvm_ptr_ty], [llvm_ptr_ty],
-                                      [IntrReadArgMem]>,
+                                      [IntrReadMem, IntrArgMemOnly]>,
                                      GCCBuiltin<"__builtin_adjust_trampoline">;
 
 //===------------------------ Overflow Intrinsics -------------------------===//
 //
 
 // Expose the carry flag from add operations on two integrals.
 def int_sadd_with_overflow : Intrinsic<[llvm_anyint_ty, llvm_i1_ty],
                                        [LLVMMatchType<0>, LLVMMatchType<0>],

 def int_umul_with_overflow : Intrinsic<[llvm_anyint_ty, llvm_i1_ty],
                                        [LLVMMatchType<0>, LLVMMatchType<0>],
                                        [IntrNoMem]>;
 
 //===------------------------- Memory Use Markers -------------------------===//
 //
 def int_lifetime_start  : Intrinsic<[],
                                     [llvm_i64_ty, llvm_ptr_ty],
-                                    [IntrReadWriteArgMem, NoCapture<1>]>;
+                                    [IntrArgMemOnly, NoCapture<1>]>;
 def int_lifetime_end    : Intrinsic<[],
                                     [llvm_i64_ty, llvm_ptr_ty],
-                                    [IntrReadWriteArgMem, NoCapture<1>]>;
+                                    [IntrArgMemOnly, NoCapture<1>]>;
 def int_invariant_start : Intrinsic<[llvm_descriptor_ty],
                                     [llvm_i64_ty, llvm_ptr_ty],
-                                    [IntrReadWriteArgMem, NoCapture<1>]>;
+                                    [IntrArgMemOnly, NoCapture<1>]>;
 def int_invariant_end   : Intrinsic<[],
                                     [llvm_descriptor_ty, llvm_i64_ty,
                                      llvm_ptr_ty],
-                                    [IntrReadWriteArgMem, NoCapture<2>]>;
+                                    [IntrArgMemOnly, NoCapture<2>]>;
 
 def int_invariant_group_barrier : Intrinsic<[llvm_ptr_ty], 
                                             [llvm_ptr_ty], 
                                             [IntrNoMem]>;
 
 //===------------------------ Stackmap Intrinsics -------------------------===//
 //
 def int_experimental_stackmap : Intrinsic<[],

 def int_clear_cache : Intrinsic<[], [llvm_ptr_ty, llvm_ptr_ty],
                                 [], "llvm.clear_cache">;
 
 //===-------------------------- Masked Intrinsics -------------------------===//
 //
 def int_masked_store : Intrinsic<[], [llvm_anyvector_ty, LLVMPointerTo<0>,
                                       llvm_i32_ty,
                                       LLVMVectorSameWidth<0, llvm_i1_ty>],
-                                 [IntrReadWriteArgMem]>;
+                                 [IntrArgMemOnly]>;
 
 def int_masked_load  : Intrinsic<[llvm_anyvector_ty],
                                  [LLVMPointerTo<0>, llvm_i32_ty,
                                   LLVMVectorSameWidth<0, llvm_i1_ty>, LLVMMatchType<0>],
-                                 [IntrReadArgMem]>;
+                                 [IntrReadMem, IntrArgMemOnly]>;
 
 def int_masked_gather: Intrinsic<[llvm_anyvector_ty],
                                  [LLVMVectorOfPointersToElt<0>, llvm_i32_ty,
                                   LLVMVectorSameWidth<0, llvm_i1_ty>,
                                   LLVMMatchType<0>],
-                                 [IntrReadArgMem]>;
+                                 [IntrReadMem, IntrArgMemOnly]>;
 
 def int_masked_scatter: Intrinsic<[],
                                   [llvm_anyvector_ty,
                                    LLVMVectorOfPointersToElt<0>, llvm_i32_ty,
                                    LLVMVectorSameWidth<0, llvm_i1_ty>],
-                                  [IntrReadWriteArgMem]>;
+                                  [IntrArgMemOnly]>;
 
 // Intrinsics to support bit sets.
 def int_bitset_test : Intrinsic<[llvm_i1_ty], [llvm_ptr_ty, llvm_metadata_ty],
                                 [IntrNoMem]>;
 
 //===----------------------------------------------------------------------===//
 // Target-specific intrinsics
 //===----------------------------------------------------------------------===//

llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td

 }
 
 // Vector element to element moves
 def int_aarch64_neon_vcopy_lane: AdvSIMD_2Vector2Index_Intrinsic;
 
 let TargetPrefix = "aarch64" in {  // All intrinsics start with "llvm.aarch64.".
   class AdvSIMD_1Vec_Load_Intrinsic
       : Intrinsic<[llvm_anyvector_ty], [LLVMAnyPointerType<LLVMMatchType<0>>],
-                  [IntrReadArgMem]>;
+                  [IntrReadMem, IntrArgMemOnly]>;
   class AdvSIMD_1Vec_Store_Lane_Intrinsic
     : Intrinsic<[], [llvm_anyvector_ty, llvm_i64_ty, llvm_anyptr_ty],
-                [IntrReadWriteArgMem, NoCapture<2>]>;
+                [IntrArgMemOnly, NoCapture<2>]>;
 
   class AdvSIMD_2Vec_Load_Intrinsic
     : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>],
                 [LLVMAnyPointerType<LLVMMatchType<0>>],
-                [IntrReadArgMem]>;
+                [IntrReadMem, IntrArgMemOnly]>;
   class AdvSIMD_2Vec_Load_Lane_Intrinsic
     : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>],
                 [LLVMMatchType<0>, LLVMMatchType<0>,
                  llvm_i64_ty, llvm_anyptr_ty],
-                [IntrReadArgMem]>;
+                [IntrReadMem, IntrArgMemOnly]>;
   class AdvSIMD_2Vec_Store_Intrinsic
     : Intrinsic<[], [llvm_anyvector_ty, LLVMMatchType<0>,
                      LLVMAnyPointerType<LLVMMatchType<0>>],
-                [IntrReadWriteArgMem, NoCapture<2>]>;
+                [IntrArgMemOnly, NoCapture<2>]>;
   class AdvSIMD_2Vec_Store_Lane_Intrinsic
     : Intrinsic<[], [llvm_anyvector_ty, LLVMMatchType<0>,
                  llvm_i64_ty, llvm_anyptr_ty],
-                [IntrReadWriteArgMem, NoCapture<3>]>;
+                [IntrArgMemOnly, NoCapture<3>]>;
 
   class AdvSIMD_3Vec_Load_Intrinsic
     : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>],
                 [LLVMAnyPointerType<LLVMMatchType<0>>],
-                [IntrReadArgMem]>;
+                [IntrReadMem, IntrArgMemOnly]>;
   class AdvSIMD_3Vec_Load_Lane_Intrinsic
     : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>],
                 [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>,
                  llvm_i64_ty, llvm_anyptr_ty],
-                [IntrReadArgMem]>;
+                [IntrReadMem, IntrArgMemOnly]>;
   class AdvSIMD_3Vec_Store_Intrinsic
     : Intrinsic<[], [llvm_anyvector_ty, LLVMMatchType<0>,
                      LLVMMatchType<0>, LLVMAnyPointerType<LLVMMatchType<0>>],
-                [IntrReadWriteArgMem, NoCapture<3>]>;
+                [IntrArgMemOnly, NoCapture<3>]>;
   class AdvSIMD_3Vec_Store_Lane_Intrinsic
     : Intrinsic<[], [llvm_anyvector_ty,
                  LLVMMatchType<0>, LLVMMatchType<0>,
                  llvm_i64_ty, llvm_anyptr_ty],
-                [IntrReadWriteArgMem, NoCapture<4>]>;
+                [IntrArgMemOnly, NoCapture<4>]>;
 
   class AdvSIMD_4Vec_Load_Intrinsic
     : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
                  LLVMMatchType<0>, LLVMMatchType<0>],
                 [LLVMAnyPointerType<LLVMMatchType<0>>],
-                [IntrReadArgMem]>;
+                [IntrReadMem, IntrArgMemOnly]>;
   class AdvSIMD_4Vec_Load_Lane_Intrinsic
     : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
                  LLVMMatchType<0>, LLVMMatchType<0>],
                 [LLVMMatchType<0>, LLVMMatchType<0>,
                  LLVMMatchType<0>, LLVMMatchType<0>,
                  llvm_i64_ty, llvm_anyptr_ty],
-                [IntrReadArgMem]>;
+                [IntrReadMem, IntrArgMemOnly]>;
   class AdvSIMD_4Vec_Store_Intrinsic
     : Intrinsic<[], [llvm_anyvector_ty, LLVMMatchType<0>,
                  LLVMMatchType<0>, LLVMMatchType<0>,
                  LLVMAnyPointerType<LLVMMatchType<0>>],
-                [IntrReadWriteArgMem, NoCapture<4>]>;
+                [IntrArgMemOnly, NoCapture<4>]>;
   class AdvSIMD_4Vec_Store_Lane_Intrinsic
     : Intrinsic<[], [llvm_anyvector_ty, LLVMMatchType<0>,
                  LLVMMatchType<0>, LLVMMatchType<0>,
                  llvm_i64_ty, llvm_anyptr_ty],
-                [IntrReadWriteArgMem, NoCapture<5>]>;
+                [IntrArgMemOnly, NoCapture<5>]>;
 }
 
 // Memory ops
 
 def int_aarch64_neon_ld1x2 : AdvSIMD_2Vec_Load_Intrinsic;
 def int_aarch64_neon_ld1x3 : AdvSIMD_3Vec_Load_Intrinsic;
 def int_aarch64_neon_ld1x4 : AdvSIMD_4Vec_Load_Intrinsic;
 

llvm/trunk/include/llvm/IR/IntrinsicsAMDGPU.td

 def int_amdgcn_cubetc : GCCBuiltin<"__builtin_amdgcn_cubetc">,
   Intrinsic<[llvm_float_ty],
     [llvm_float_ty, llvm_float_ty, llvm_float_ty], [IntrNoMem]
 >;
 
 // TODO: Do we want an ordering for these?
 def int_amdgcn_atomic_inc : Intrinsic<[llvm_anyint_ty],
   [llvm_anyptr_ty, LLVMMatchType<0>],
-  [IntrReadWriteArgMem, NoCapture<0>]
+  [IntrArgMemOnly, NoCapture<0>]
 >;
 
 def int_amdgcn_atomic_dec : Intrinsic<[llvm_anyint_ty],
   [llvm_anyptr_ty, LLVMMatchType<0>],
-  [IntrReadWriteArgMem, NoCapture<0>]
+  [IntrArgMemOnly, NoCapture<0>]
 >;
 
 class AMDGPUImageLoad : Intrinsic <
   [llvm_v4f32_ty],    // vdata(VGPR)
   [llvm_anyint_ty,    // vaddr(VGPR)
    llvm_v8i32_ty,     // rsrc(SGPR)
    llvm_i32_ty,       // dmask(imm)
    llvm_i1_ty,        // r128(imm)

llvm/trunk/include/llvm/IR/IntrinsicsARM.td

 def int_arm_neon_vrintz : Neon_1Arg_Intrinsic;
 def int_arm_neon_vrintm : Neon_1Arg_Intrinsic;
 def int_arm_neon_vrintp : Neon_1Arg_Intrinsic;
 
 // De-interleaving vector loads from N-element structures.
 // Source operands are the address and alignment.
 def int_arm_neon_vld1 : Intrinsic<[llvm_anyvector_ty],
                                   [llvm_anyptr_ty, llvm_i32_ty],
-                                  [IntrReadArgMem]>;
+                                  [IntrReadMem, IntrArgMemOnly]>;
 def int_arm_neon_vld2 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>],
                                   [llvm_anyptr_ty, llvm_i32_ty],
-                                  [IntrReadArgMem]>;
+                                  [IntrReadMem, IntrArgMemOnly]>;
 def int_arm_neon_vld3 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
                                    LLVMMatchType<0>],
                                   [llvm_anyptr_ty, llvm_i32_ty],
-                                  [IntrReadArgMem]>;
+                                  [IntrReadMem, IntrArgMemOnly]>;
 def int_arm_neon_vld4 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
                                    LLVMMatchType<0>, LLVMMatchType<0>],
                                   [llvm_anyptr_ty, llvm_i32_ty],
-                                  [IntrReadArgMem]>;
+                                  [IntrReadMem, IntrArgMemOnly]>;
 
 // Vector load N-element structure to one lane.
 // Source operands are: the address, the N input vectors (since only one
 // lane is assigned), the lane number, and the alignment.
 def int_arm_neon_vld2lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>],
                                       [llvm_anyptr_ty, LLVMMatchType<0>,
                                        LLVMMatchType<0>, llvm_i32_ty,
-                                       llvm_i32_ty], [IntrReadArgMem]>;
+                                       llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
 def int_arm_neon_vld3lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
                                        LLVMMatchType<0>],
                                       [llvm_anyptr_ty, LLVMMatchType<0>,
                                        LLVMMatchType<0>, LLVMMatchType<0>,
                                        llvm_i32_ty, llvm_i32_ty],
-                                      [IntrReadArgMem]>;
+                                      [IntrReadMem, IntrArgMemOnly]>;
 def int_arm_neon_vld4lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
                                        LLVMMatchType<0>, LLVMMatchType<0>],
                                       [llvm_anyptr_ty, LLVMMatchType<0>,
                                        LLVMMatchType<0>, LLVMMatchType<0>,
                                        LLVMMatchType<0>, llvm_i32_ty,
-                                       llvm_i32_ty], [IntrReadArgMem]>;
+                                       llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
 
 // Interleaving vector stores from N-element structures.
 // Source operands are: the address, the N vectors, and the alignment.
 def int_arm_neon_vst1 : Intrinsic<[],
                                   [llvm_anyptr_ty, llvm_anyvector_ty,
-                                   llvm_i32_ty], [IntrReadWriteArgMem]>;
+                                   llvm_i32_ty], [IntrArgMemOnly]>;
 def int_arm_neon_vst2 : Intrinsic<[],
                                   [llvm_anyptr_ty, llvm_anyvector_ty,
                                    LLVMMatchType<1>, llvm_i32_ty],
-                                  [IntrReadWriteArgMem]>;
+                                  [IntrArgMemOnly]>;
 def int_arm_neon_vst3 : Intrinsic<[],
                                   [llvm_anyptr_ty, llvm_anyvector_ty,
                                    LLVMMatchType<1>, LLVMMatchType<1>,
-                                   llvm_i32_ty], [IntrReadWriteArgMem]>;
+                                   llvm_i32_ty], [IntrArgMemOnly]>;
 def int_arm_neon_vst4 : Intrinsic<[],
                                   [llvm_anyptr_ty, llvm_anyvector_ty,
                                    LLVMMatchType<1>, LLVMMatchType<1>,
                                    LLVMMatchType<1>, llvm_i32_ty],
-                                  [IntrReadWriteArgMem]>;
+                                  [IntrArgMemOnly]>;
 
 // Vector store N-element structure from one lane.
 // Source operands are: the address, the N vectors, the lane number, and
 // the alignment.
 def int_arm_neon_vst2lane : Intrinsic<[],
                                       [llvm_anyptr_ty, llvm_anyvector_ty,
                                        LLVMMatchType<1>, llvm_i32_ty,
-                                       llvm_i32_ty], [IntrReadWriteArgMem]>;
+                                       llvm_i32_ty], [IntrArgMemOnly]>;
 def int_arm_neon_vst3lane : Intrinsic<[],
                                       [llvm_anyptr_ty, llvm_anyvector_ty,
                                        LLVMMatchType<1>, LLVMMatchType<1>,
                                        llvm_i32_ty, llvm_i32_ty],
-                                      [IntrReadWriteArgMem]>;
+                                      [IntrArgMemOnly]>;
 def int_arm_neon_vst4lane : Intrinsic<[],
                                       [llvm_anyptr_ty, llvm_anyvector_ty,
                                        LLVMMatchType<1>, LLVMMatchType<1>,
                                        LLVMMatchType<1>, llvm_i32_ty,
-                                       llvm_i32_ty], [IntrReadWriteArgMem]>;
+                                       llvm_i32_ty], [IntrArgMemOnly]>;
 
 // Vector bitwise select.
 def int_arm_neon_vbsl : Intrinsic<[llvm_anyvector_ty],
                         [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
                         [IntrNoMem]>;
 
 
 // Crypto instructions

llvm/trunk/include/llvm/IR/IntrinsicsHexagon.td

: Hexagon_Intrinsic<GCCIntSuffix,
                           [llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty,
                            llvm_i32_ty, llvm_i32_ty],
                           [IntrNoMem]>;
 
 class Hexagon_mem_memmemsi_Intrinsic<string GCCIntSuffix>
   : Hexagon_Intrinsic<GCCIntSuffix,
                           [llvm_ptr_ty], [llvm_ptr_ty, llvm_ptr_ty,
                            llvm_i32_ty],
-                          [IntrReadWriteArgMem]>;
+                          [IntrArgMemOnly]>;
 
 class Hexagon_mem_memsisi_Intrinsic<string GCCIntSuffix>
   : Hexagon_Intrinsic<GCCIntSuffix,
                           [llvm_ptr_ty], [llvm_ptr_ty, llvm_i32_ty,
                            llvm_i32_ty],
-                          [IntrReadWriteArgMem]>;
+                          [IntrArgMemOnly]>;
 
 class Hexagon_mem_memdisi_Intrinsic<string GCCIntSuffix>
   : Hexagon_Intrinsic<GCCIntSuffix,
                           [llvm_ptr_ty], [llvm_ptr_ty, llvm_i64_ty,
                            llvm_i32_ty],
-                          [IntrReadWriteArgMem]>;
+                          [IntrArgMemOnly]>;
 
 class Hexagon_mem_memmemsisi_Intrinsic<string GCCIntSuffix>
   : Hexagon_Intrinsic<GCCIntSuffix,
                           [llvm_ptr_ty], [llvm_ptr_ty, llvm_ptr_ty,
                            llvm_i32_ty, llvm_i32_ty],
-                          [IntrReadWriteArgMem]>;
+                          [IntrArgMemOnly]>;
 
 class Hexagon_mem_memsisisi_Intrinsic<string GCCIntSuffix>
   : Hexagon_Intrinsic<GCCIntSuffix,
                           [llvm_ptr_ty], [llvm_ptr_ty, llvm_i32_ty,
                            llvm_i32_ty, llvm_i32_ty],
-                          [IntrReadWriteArgMem]>;
+                          [IntrArgMemOnly]>;
 
 class Hexagon_mem_memdisisi_Intrinsic<string GCCIntSuffix>
   : Hexagon_Intrinsic<GCCIntSuffix,
                           [llvm_ptr_ty], [llvm_ptr_ty, llvm_i64_ty,
                            llvm_i32_ty, llvm_i32_ty],
-                          [IntrReadWriteArgMem]>;
+                          [IntrArgMemOnly]>;
 
 class Hexagon_v256_v256v256_Intrinsic<string GCCIntSuffix>
   : Hexagon_Intrinsic<GCCIntSuffix,
                           [llvm_v8i32_ty], [llvm_v8i32_ty, llvm_v8i32_ty],
-                          [IntrReadWriteArgMem]>;
+                          [IntrArgMemOnly]>;
 
 //
 // Hexagon_sf_df_Intrinsic<string GCCIntSuffix>
 //
 class Hexagon_sf_si_Intrinsic<string GCCIntSuffix>
   : Hexagon_Intrinsic<GCCIntSuffix,
                           [llvm_float_ty], [llvm_i32_ty],
                           [IntrNoMem, Throws]>;

 Hexagon_void_si_Intrinsic<"HEXAGON_prefetch">;
 
 def llvm_ptr32_ty : LLVMPointerType<llvm_i32_ty>;
 def llvm_ptr64_ty : LLVMPointerType<llvm_i64_ty>;
 
 // Mark locked loads as read/write to prevent any accidental reordering.
 def int_hexagon_L2_loadw_locked :
 Hexagon_Intrinsic<"HEXAGON_L2_loadw_locked", [llvm_i32_ty], [llvm_ptr32_ty],
-      [IntrReadWriteArgMem, NoCapture<0>]>;
+      [IntrArgMemOnly, NoCapture<0>]>;
 def int_hexagon_L4_loadd_locked :
 Hexagon_Intrinsic<"HEXAGON_L4_loadd_locked", [llvm_i64_ty], [llvm_ptr64_ty],
-      [IntrReadWriteArgMem, NoCapture<0>]>;
+      [IntrArgMemOnly, NoCapture<0>]>;
 
 def int_hexagon_S2_storew_locked :
 Hexagon_Intrinsic<"HEXAGON_S2_storew_locked", [llvm_i32_ty],
-      [llvm_ptr32_ty, llvm_i32_ty], [IntrReadWriteArgMem, NoCapture<0>]>;
+      [llvm_ptr32_ty, llvm_i32_ty], [IntrArgMemOnly, NoCapture<0>]>;
 def int_hexagon_S4_stored_locked :
 Hexagon_Intrinsic<"HEXAGON_S4_stored_locked", [llvm_i32_ty],
-      [llvm_ptr64_ty, llvm_i64_ty], [IntrReadWriteArgMem, NoCapture<0>]>;
+      [llvm_ptr64_ty, llvm_i64_ty], [IntrArgMemOnly, NoCapture<0>]>;
 
 // V60
 
 class Hexagon_v2048v2048_Intrinsic_T<string GCCIntSuffix>
  : Hexagon_Intrinsic<GCCIntSuffix,
                           [llvm_v64i32_ty], [llvm_v64i32_ty],
                           [IntrNoMem]>;
 

llvm/trunk/include/llvm/IR/IntrinsicsMips.td

 
 def int_mips_mthlip: GCCBuiltin<"__builtin_mips_mthlip">,
   Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty], []>;
 
 def int_mips_bposge32: GCCBuiltin<"__builtin_mips_bposge32">,
   Intrinsic<[llvm_i32_ty], [], [IntrReadMem]>;
 
 def int_mips_lbux: GCCBuiltin<"__builtin_mips_lbux">,
-  Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrReadArgMem]>;
+  Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
 def int_mips_lhx: GCCBuiltin<"__builtin_mips_lhx">,
-  Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrReadArgMem]>;
+  Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
 def int_mips_lwx: GCCBuiltin<"__builtin_mips_lwx">,
-  Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrReadArgMem]>;
+  Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
 
 //===----------------------------------------------------------------------===//
 // MIPS DSP Rev 2
 
 def int_mips_absq_s_qb: GCCBuiltin<"__builtin_mips_absq_s_qb">,
   Intrinsic<[mips_v4q7_ty], [mips_v4q7_ty], []>;
 
 def int_mips_addqh_ph: GCCBuiltin<"__builtin_mips_addqh_ph">,
Intrinsic<[llvm_v4i32_ty],
             [IntrNoMem]>;
 def int_mips_insve_d : GCCBuiltin<"__builtin_msa_insve_d">,
   Intrinsic<[llvm_v2i64_ty],
             [llvm_v2i64_ty, llvm_i32_ty, llvm_v2i64_ty],
             [IntrNoMem]>;
 
 def int_mips_ld_b : GCCBuiltin<"__builtin_msa_ld_b">,
   Intrinsic<[llvm_v16i8_ty], [llvm_ptr_ty, llvm_i32_ty],
-  [IntrReadArgMem]>;
+  [IntrReadMem, IntrArgMemOnly]>;
 def int_mips_ld_h : GCCBuiltin<"__builtin_msa_ld_h">,
   Intrinsic<[llvm_v8i16_ty], [llvm_ptr_ty, llvm_i32_ty],
-  [IntrReadArgMem]>;
+  [IntrReadMem, IntrArgMemOnly]>;
 def int_mips_ld_w : GCCBuiltin<"__builtin_msa_ld_w">,
   Intrinsic<[llvm_v4i32_ty], [llvm_ptr_ty, llvm_i32_ty],
-  [IntrReadArgMem]>;
+  [IntrReadMem, IntrArgMemOnly]>;
 def int_mips_ld_d : GCCBuiltin<"__builtin_msa_ld_d">,
   Intrinsic<[llvm_v2i64_ty], [llvm_ptr_ty, llvm_i32_ty],
-  [IntrReadArgMem]>;
+  [IntrReadMem, IntrArgMemOnly]>;
 
 def int_mips_ldi_b : GCCBuiltin<"__builtin_msa_ldi_b">,
   Intrinsic<[llvm_v16i8_ty], [llvm_i32_ty], [IntrNoMem]>;
 def int_mips_ldi_h : GCCBuiltin<"__builtin_msa_ldi_h">,
   Intrinsic<[llvm_v8i16_ty], [llvm_i32_ty], [IntrNoMem]>;
 def int_mips_ldi_w : GCCBuiltin<"__builtin_msa_ldi_w">,
   Intrinsic<[llvm_v4i32_ty], [llvm_i32_ty], [IntrNoMem]>;
 def int_mips_ldi_d : GCCBuiltin<"__builtin_msa_ldi_d">,
def int_mips_srlri_h : GCCBuiltin<"__builtin_msa_srlri_h">,
   Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_i32_ty], [IntrNoMem]>;
 def int_mips_srlri_w : GCCBuiltin<"__builtin_msa_srlri_w">,
   Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_i32_ty], [IntrNoMem]>;
 def int_mips_srlri_d : GCCBuiltin<"__builtin_msa_srlri_d">,
   Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_i32_ty], [IntrNoMem]>;
 
 def int_mips_st_b : GCCBuiltin<"__builtin_msa_st_b">,
   Intrinsic<[], [llvm_v16i8_ty, llvm_ptr_ty, llvm_i32_ty],
-  [IntrReadWriteArgMem]>;
+  [IntrArgMemOnly]>;
 def int_mips_st_h : GCCBuiltin<"__builtin_msa_st_h">,
   Intrinsic<[], [llvm_v8i16_ty, llvm_ptr_ty, llvm_i32_ty],
-  [IntrReadWriteArgMem]>;
+  [IntrArgMemOnly]>;
 def int_mips_st_w : GCCBuiltin<"__builtin_msa_st_w">,
   Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty, llvm_i32_ty],
-  [IntrReadWriteArgMem]>;
+  [IntrArgMemOnly]>;
 def int_mips_st_d : GCCBuiltin<"__builtin_msa_st_d">,
   Intrinsic<[], [llvm_v2i64_ty, llvm_ptr_ty, llvm_i32_ty],
-  [IntrReadWriteArgMem]>;
+  [IntrArgMemOnly]>;
 
 def int_mips_subs_s_b : GCCBuiltin<"__builtin_msa_subs_s_b">,
   Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty], [IntrNoMem]>;
 def int_mips_subs_s_h : GCCBuiltin<"__builtin_msa_subs_s_h">,
   Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>;
 def int_mips_subs_s_w : GCCBuiltin<"__builtin_msa_subs_s_w">,
   Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 def int_mips_subs_s_d : GCCBuiltin<"__builtin_msa_subs_s_d">,

llvm/trunk/include/llvm/IR/IntrinsicsNVVM.td

def int_nvvm_bitcast_ll2d : GCCBuiltin<"__nvvm_bitcast_ll2d">,
       Intrinsic<[llvm_double_ty], [llvm_i64_ty], [IntrNoMem]>;
   def int_nvvm_bitcast_d2ll : GCCBuiltin<"__nvvm_bitcast_d2ll">,
       Intrinsic<[llvm_i64_ty], [llvm_double_ty], [IntrNoMem]>;
 
 
 // Atomic not available as an llvm intrinsic.
   def int_nvvm_atomic_load_add_f32 : Intrinsic<[llvm_float_ty],
           [LLVMAnyPointerType<llvm_float_ty>, llvm_float_ty],
-                                      [IntrReadWriteArgMem, NoCapture<0>]>;
+                                      [IntrArgMemOnly, NoCapture<0>]>;
   def int_nvvm_atomic_load_inc_32 : Intrinsic<[llvm_i32_ty],
           [LLVMAnyPointerType<llvm_i32_ty>, llvm_i32_ty],
-                                      [IntrReadWriteArgMem, NoCapture<0>]>;
+                                      [IntrArgMemOnly, NoCapture<0>]>;
   def int_nvvm_atomic_load_dec_32 : Intrinsic<[llvm_i32_ty],
           [LLVMAnyPointerType<llvm_i32_ty>, llvm_i32_ty],
-                                      [IntrReadWriteArgMem, NoCapture<0>]>;
+                                      [IntrArgMemOnly, NoCapture<0>]>;
 
 // Bar.Sync
   def int_cuda_syncthreads : GCCBuiltin<"__syncthreads">,
       Intrinsic<[], [], [IntrConvergent]>;
   def int_nvvm_barrier0 : GCCBuiltin<"__nvvm_bar0">,
       Intrinsic<[], [], [IntrConvergent]>;
   def int_nvvm_barrier0_popc : GCCBuiltin<"__nvvm_bar0_popc">,
       Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrConvergent]>;

llvm/trunk/include/llvm/IR/IntrinsicsPowerPC.td

 // Non-altivec intrinsics.
 let TargetPrefix = "ppc" in {  // All intrinsics start with "llvm.ppc.".
   // dcba/dcbf/dcbi/dcbst/dcbt/dcbz/dcbzl(PPC970) instructions.
   def int_ppc_dcba  : Intrinsic<[], [llvm_ptr_ty], []>;
   def int_ppc_dcbf  : Intrinsic<[], [llvm_ptr_ty], []>;
   def int_ppc_dcbi  : Intrinsic<[], [llvm_ptr_ty], []>;
   def int_ppc_dcbst : Intrinsic<[], [llvm_ptr_ty], []>;
   def int_ppc_dcbt  : Intrinsic<[], [llvm_ptr_ty],
-    [IntrReadWriteArgMem, NoCapture<0>]>;
+    [IntrArgMemOnly, NoCapture<0>]>;
   def int_ppc_dcbtst: Intrinsic<[], [llvm_ptr_ty],
-    [IntrReadWriteArgMem, NoCapture<0>]>;
+    [IntrArgMemOnly, NoCapture<0>]>;
   def int_ppc_dcbz  : Intrinsic<[], [llvm_ptr_ty], []>;
   def int_ppc_dcbzl : Intrinsic<[], [llvm_ptr_ty], []>;
 
   // sync instruction (i.e. sync 0, a.k.a hwsync)
   def int_ppc_sync : Intrinsic<[], [], []>;
   // lwsync is sync 1
   def int_ppc_lwsync : Intrinsic<[], [], []>;
 
def int_ppc_altivec_mfvscr : GCCBuiltin<"__builtin_altivec_mfvscr">,
               Intrinsic<[llvm_v8i16_ty], [], [IntrReadMem]>;
   def int_ppc_altivec_mtvscr : GCCBuiltin<"__builtin_altivec_mtvscr">,
               Intrinsic<[], [llvm_v4i32_ty], []>;
 
 
   // Loads.  These don't map directly to GCC builtins because they represent the
   // source address with a single pointer.
   def int_ppc_altivec_lvx :
-              Intrinsic<[llvm_v4i32_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
+              Intrinsic<[llvm_v4i32_ty], [llvm_ptr_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_ppc_altivec_lvxl :
-              Intrinsic<[llvm_v4i32_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
+              Intrinsic<[llvm_v4i32_ty], [llvm_ptr_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_ppc_altivec_lvebx :
-              Intrinsic<[llvm_v16i8_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
+              Intrinsic<[llvm_v16i8_ty], [llvm_ptr_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_ppc_altivec_lvehx :
-              Intrinsic<[llvm_v8i16_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
+              Intrinsic<[llvm_v8i16_ty], [llvm_ptr_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_ppc_altivec_lvewx :
-              Intrinsic<[llvm_v4i32_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
+              Intrinsic<[llvm_v4i32_ty], [llvm_ptr_ty], [IntrReadMem, IntrArgMemOnly]>;
 
   // Stores.  These don't map directly to GCC builtins because they represent the
   // source address with a single pointer.
   def int_ppc_altivec_stvx :
               Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty],
-                        [IntrReadWriteArgMem]>;
+                        [IntrArgMemOnly]>;
   def int_ppc_altivec_stvxl :
               Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty],
-                        [IntrReadWriteArgMem]>;
+                        [IntrArgMemOnly]>;
   def int_ppc_altivec_stvebx :
               Intrinsic<[], [llvm_v16i8_ty, llvm_ptr_ty],
-                        [IntrReadWriteArgMem]>;
+                        [IntrArgMemOnly]>;
   def int_ppc_altivec_stvehx :
               Intrinsic<[], [llvm_v8i16_ty, llvm_ptr_ty],
-                        [IntrReadWriteArgMem]>;
+                        [IntrArgMemOnly]>;
   def int_ppc_altivec_stvewx :
               Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty],
-                        [IntrReadWriteArgMem]>;
+                        [IntrArgMemOnly]>;
 
   // Comparisons setting a vector.
   def int_ppc_altivec_vcmpbfp : GCCBuiltin<"__builtin_altivec_vcmpbfp">,
               Intrinsic<[llvm_v4i32_ty], [llvm_v4f32_ty, llvm_v4f32_ty],
                         [IntrNoMem]>;
   def int_ppc_altivec_vcmpeqfp : GCCBuiltin<"__builtin_altivec_vcmpeqfp">,
               Intrinsic<[llvm_v4i32_ty], [llvm_v4f32_ty, llvm_v4f32_ty],
                         [IntrNoMem]>;

 
 //===----------------------------------------------------------------------===//
 // PowerPC VSX Intrinsic Definitions.
 
 let TargetPrefix = "ppc" in {  // All intrinsics start with "llvm.ppc.".
 
 // Vector load.
 def int_ppc_vsx_lxvw4x :
-      Intrinsic<[llvm_v4i32_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
+      Intrinsic<[llvm_v4i32_ty], [llvm_ptr_ty], [IntrReadMem, IntrArgMemOnly]>;
 def int_ppc_vsx_lxvd2x :
-      Intrinsic<[llvm_v2f64_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
+      Intrinsic<[llvm_v2f64_ty], [llvm_ptr_ty], [IntrReadMem, IntrArgMemOnly]>;
 
 // Vector store.
 def int_ppc_vsx_stxvw4x :
-      Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty], [IntrReadWriteArgMem]>;
+      Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty], [IntrArgMemOnly]>;
 def int_ppc_vsx_stxvd2x :
-      Intrinsic<[], [llvm_v2f64_ty, llvm_ptr_ty], [IntrReadWriteArgMem]>;
+      Intrinsic<[], [llvm_v2f64_ty, llvm_ptr_ty], [IntrArgMemOnly]>;
 
 // Vector and scalar maximum.
 def int_ppc_vsx_xvmaxdp : PowerPC_VSX_Vec_DDD_Intrinsic<"xvmaxdp">;
 def int_ppc_vsx_xvmaxsp : PowerPC_VSX_Vec_FFF_Intrinsic<"xvmaxsp">;
 def int_ppc_vsx_xsmaxdp : PowerPC_VSX_Sca_DDD_Intrinsic<"xsmaxdp">;
 
 // Vector and scalar minimum.
 def int_ppc_vsx_xvmindp : PowerPC_VSX_Vec_DDD_Intrinsic<"xvmindp">;
: PowerPC_QPX_Intrinsic<GCCIntSuffix,
                           [llvm_v4f64_ty],
                           [llvm_v4f64_ty, llvm_v4f64_ty, llvm_v4f64_ty],
                           [IntrNoMem]>;
 
 /// PowerPC_QPX_Load_Intrinsic - A PowerPC intrinsic that takes a pointer
 /// and returns a v4f64.
 class PowerPC_QPX_Load_Intrinsic<string GCCIntSuffix>
   : PowerPC_QPX_Intrinsic<GCCIntSuffix,
-                          [llvm_v4f64_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
+                          [llvm_v4f64_ty], [llvm_ptr_ty], [IntrReadMem, IntrArgMemOnly]>;
 
 /// PowerPC_QPX_LoadPerm_Intrinsic - A PowerPC intrinsic that takes a pointer
 /// and returns a v4f64 permutation.
 class PowerPC_QPX_LoadPerm_Intrinsic<string GCCIntSuffix>
   : PowerPC_QPX_Intrinsic<GCCIntSuffix,
                           [llvm_v4f64_ty], [llvm_ptr_ty], [IntrNoMem]>;
 
 /// PowerPC_QPX_Store_Intrinsic - A PowerPC intrinsic that takes a pointer
 /// and stores a v4f64.
 class PowerPC_QPX_Store_Intrinsic<string GCCIntSuffix>
   : PowerPC_QPX_Intrinsic<GCCIntSuffix,
                           [], [llvm_v4f64_ty, llvm_ptr_ty],
-                          [IntrReadWriteArgMem]>;
+                          [IntrArgMemOnly]>;
 
 //===----------------------------------------------------------------------===//
 // PowerPC QPX Intrinsic Definitions.
 
 let TargetPrefix = "ppc" in {  // All intrinsics start with "llvm.ppc.".
   // Add Instructions
   def int_ppc_qpx_qvfadd : PowerPC_QPX_FFF_Intrinsic<"qvfadd">;
   def int_ppc_qpx_qvfadds : PowerPC_QPX_FFF_Intrinsic<"qvfadds">;

llvm/trunk/include/llvm/IR/IntrinsicsSystemZ.td

let TargetPrefix = "s390" in {
 
   def int_s390_tend : GCCBuiltin<"__builtin_tend">,
                       Intrinsic<[llvm_i32_ty], []>;
 
   def int_s390_etnd : GCCBuiltin<"__builtin_tx_nesting_depth">,
                       Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>;
 
   def int_s390_ntstg : Intrinsic<[], [llvm_i64_ty, llvm_ptr64_ty],
-                                 [IntrReadWriteArgMem]>;
+                                 [IntrArgMemOnly]>;
 
   def int_s390_ppa_txassist : GCCBuiltin<"__builtin_tx_assist">,
                               Intrinsic<[], [llvm_i32_ty]>;
 }
 
 //===----------------------------------------------------------------------===//
 //
 // Vector intrinsics
 //
 //===----------------------------------------------------------------------===//
 
 let TargetPrefix = "s390" in {
   def int_s390_lcbb : GCCBuiltin<"__builtin_s390_lcbb">,
                       Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty],
                                 [IntrNoMem]>;
 
   def int_s390_vlbb : GCCBuiltin<"__builtin_s390_vlbb">,
                       Intrinsic<[llvm_v16i8_ty], [llvm_ptr_ty, llvm_i32_ty],
-                                [IntrReadArgMem]>;
+                                [IntrReadMem, IntrArgMemOnly]>;
 
   def int_s390_vll : GCCBuiltin<"__builtin_s390_vll">,
                      Intrinsic<[llvm_v16i8_ty], [llvm_i32_ty, llvm_ptr_ty],
-                               [IntrReadArgMem]>;
+                               [IntrReadMem, IntrArgMemOnly]>;
 
   def int_s390_vpdi : GCCBuiltin<"__builtin_s390_vpdi">,
                       Intrinsic<[llvm_v2i64_ty],
                                 [llvm_v2i64_ty, llvm_v2i64_ty, llvm_i32_ty],
                                 [IntrNoMem]>;
 
   def int_s390_vperm : GCCBuiltin<"__builtin_s390_vperm">,
                        Intrinsic<[llvm_v16i8_ty],
                                  [llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty],
                                  [IntrNoMem]>;
 
   defm int_s390_vpks : SystemZBinaryTruncHFG<"vpks">;
   defm int_s390_vpks : SystemZBinaryTruncCCHFG;
 
   defm int_s390_vpkls : SystemZBinaryTruncHFG<"vpkls">;
   defm int_s390_vpkls : SystemZBinaryTruncCCHFG;
 
   def int_s390_vstl : GCCBuiltin<"__builtin_s390_vstl">,
                       Intrinsic<[], [llvm_v16i8_ty, llvm_i32_ty, llvm_ptr_ty],
                                 // In fact write-only but there's no property
                                 // for that.
-                                [IntrReadWriteArgMem]>;
+                                [IntrArgMemOnly]>;
 
   defm int_s390_vupl  : SystemZUnaryExtBHWF<"vupl">;
   defm int_s390_vupll : SystemZUnaryExtBHF<"vupll">;
 
   defm int_s390_vuph  : SystemZUnaryExtBHF<"vuph">;
   defm int_s390_vuplh : SystemZUnaryExtBHF<"vuplh">;
 
   defm int_s390_vacc : SystemZBinaryBHFG<"vacc">;

llvm/trunk/include/llvm/IR/IntrinsicsX86.td

 }
 
 //===----------------------------------------------------------------------===//
 // Read Time Stamp Counter.
 let TargetPrefix = "x86" in {
   def int_x86_rdtsc : GCCBuiltin<"__builtin_ia32_rdtsc">,
               Intrinsic<[llvm_i64_ty], [], []>;
   def int_x86_rdtscp : GCCBuiltin<"__builtin_ia32_rdtscp">,
-              Intrinsic<[llvm_i64_ty], [llvm_ptr_ty], [IntrReadWriteArgMem]>;
+              Intrinsic<[llvm_i64_ty], [llvm_ptr_ty], [IntrArgMemOnly]>;
 }
 
 // Read Performance-Monitoring Counter.
 let TargetPrefix = "x86" in {
   def int_x86_rdpmc : GCCBuiltin<"__builtin_ia32_rdpmc">,
               Intrinsic<[llvm_i64_ty], [llvm_i32_ty], []>;
 }
 
def int_x86_sse_cvtpi2ps : GCCBuiltin<"__builtin_ia32_cvtpi2ps">,
               Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty,
                          llvm_x86mmx_ty], [IntrNoMem]>;
 }
 
 // SIMD store ops
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">,
               Intrinsic<[], [llvm_ptr_ty,
-                         llvm_v4f32_ty], [IntrReadWriteArgMem]>;
+                         llvm_v4f32_ty], [IntrArgMemOnly]>;
 }
 
 // Cacheability support ops
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
               Intrinsic<[], [], []>;
 }
 
let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_sse_cvtpi2pd : GCCBuiltin<"__builtin_ia32_cvtpi2pd">,
               Intrinsic<[llvm_v2f64_ty], [llvm_x86mmx_ty], [IntrNoMem]>;
 }
 
 // SIMD store ops
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_sse2_storeu_pd : GCCBuiltin<"__builtin_ia32_storeupd">,
               Intrinsic<[], [llvm_ptr_ty,
-                         llvm_v2f64_ty], [IntrReadWriteArgMem]>;
+                         llvm_v2f64_ty], [IntrArgMemOnly]>;
   def int_x86_sse2_storeu_dq : GCCBuiltin<"__builtin_ia32_storedqu">,
               Intrinsic<[], [llvm_ptr_ty,
-                         llvm_v16i8_ty], [IntrReadWriteArgMem]>;
+                         llvm_v16i8_ty], [IntrArgMemOnly]>;
   def int_x86_sse2_storel_dq : GCCBuiltin<"__builtin_ia32_storelv4si">,
               Intrinsic<[], [llvm_ptr_ty,
-                         llvm_v4i32_ty], [IntrReadWriteArgMem]>;
+                         llvm_v4i32_ty], [IntrArgMemOnly]>;
 }
 
 // Misc.
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_sse2_packsswb_128 : GCCBuiltin<"__builtin_ia32_packsswb128">,
               Intrinsic<[llvm_v16i8_ty], [llvm_v8i16_ty,
                          llvm_v8i16_ty], [IntrNoMem]>;
   def int_x86_sse2_packssdw_128 : GCCBuiltin<"__builtin_ia32_packssdw128">,
let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_avx_vzeroupper : GCCBuiltin<"__builtin_ia32_vzeroupper">,
         Intrinsic<[], [], []>;
 }
 
 // Vector load with broadcast
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_avx_vbroadcastf128_pd_256 :
         GCCBuiltin<"__builtin_ia32_vbroadcastf128_pd256">,
-        Intrinsic<[llvm_v4f64_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
+        Intrinsic<[llvm_v4f64_ty], [llvm_ptr_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx_vbroadcastf128_ps_256 :
         GCCBuiltin<"__builtin_ia32_vbroadcastf128_ps256">,
-        Intrinsic<[llvm_v8f32_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
+        Intrinsic<[llvm_v8f32_ty], [llvm_ptr_ty], [IntrReadMem, IntrArgMemOnly]>;
 }
 
 // SIMD load ops
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_avx_ldu_dq_256 : GCCBuiltin<"__builtin_ia32_lddqu256">,
         Intrinsic<[llvm_v32i8_ty], [llvm_ptr_ty], [IntrReadMem]>;
 }
 
 // SIMD store ops
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_avx_storeu_pd_256 : GCCBuiltin<"__builtin_ia32_storeupd256">,
-        Intrinsic<[], [llvm_ptr_ty, llvm_v4f64_ty], [IntrReadWriteArgMem]>;
+        Intrinsic<[], [llvm_ptr_ty, llvm_v4f64_ty], [IntrArgMemOnly]>;
   def int_x86_avx_storeu_ps_256 : GCCBuiltin<"__builtin_ia32_storeups256">,
-        Intrinsic<[], [llvm_ptr_ty, llvm_v8f32_ty], [IntrReadWriteArgMem]>;
+        Intrinsic<[], [llvm_ptr_ty, llvm_v8f32_ty], [IntrArgMemOnly]>;
   def int_x86_avx_storeu_dq_256 : GCCBuiltin<"__builtin_ia32_storedqu256">,
-        Intrinsic<[], [llvm_ptr_ty, llvm_v32i8_ty], [IntrReadWriteArgMem]>;
+        Intrinsic<[], [llvm_ptr_ty, llvm_v32i8_ty], [IntrArgMemOnly]>;
 }
 
 // Conditional load ops
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_avx_maskload_pd : GCCBuiltin<"__builtin_ia32_maskloadpd">,
         Intrinsic<[llvm_v2f64_ty], [llvm_ptr_ty, llvm_v2i64_ty],
-                  [IntrReadArgMem]>;
+                  [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx_maskload_ps : GCCBuiltin<"__builtin_ia32_maskloadps">,
         Intrinsic<[llvm_v4f32_ty], [llvm_ptr_ty, llvm_v4i32_ty],
-                  [IntrReadArgMem]>;
+                  [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx_maskload_pd_256 : GCCBuiltin<"__builtin_ia32_maskloadpd256">,
         Intrinsic<[llvm_v4f64_ty], [llvm_ptr_ty, llvm_v4i64_ty],
-                  [IntrReadArgMem]>;
+                  [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx_maskload_ps_256 : GCCBuiltin<"__builtin_ia32_maskloadps256">,
         Intrinsic<[llvm_v8f32_ty], [llvm_ptr_ty, llvm_v8i32_ty],
-                  [IntrReadArgMem]>;
+                  [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_loadu_ps_128 :
         GCCBuiltin<"__builtin_ia32_loadups128_mask">,
           Intrinsic<[llvm_v4f32_ty],
-                    [llvm_ptr_ty, llvm_v4f32_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                    [llvm_ptr_ty, llvm_v4f32_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_loadu_ps_256 :
         GCCBuiltin<"__builtin_ia32_loadups256_mask">,
           Intrinsic<[llvm_v8f32_ty],
-                    [llvm_ptr_ty, llvm_v8f32_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                    [llvm_ptr_ty, llvm_v8f32_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_loadu_ps_512 :
         GCCBuiltin<"__builtin_ia32_loadups512_mask">,
           Intrinsic<[llvm_v16f32_ty],
-                    [llvm_ptr_ty, llvm_v16f32_ty, llvm_i16_ty], [IntrReadArgMem]>;
+                    [llvm_ptr_ty, llvm_v16f32_ty, llvm_i16_ty], [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_loadu_pd_128 :
         GCCBuiltin<"__builtin_ia32_loadupd128_mask">,
           Intrinsic<[llvm_v2f64_ty],
-                    [llvm_ptr_ty, llvm_v2f64_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                    [llvm_ptr_ty, llvm_v2f64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_loadu_pd_256 :
         GCCBuiltin<"__builtin_ia32_loadupd256_mask">,
           Intrinsic<[llvm_v4f64_ty],
-                    [llvm_ptr_ty, llvm_v4f64_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                    [llvm_ptr_ty, llvm_v4f64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_loadu_pd_512 :
         GCCBuiltin<"__builtin_ia32_loadupd512_mask">,
           Intrinsic<[llvm_v8f64_ty],
-                    [llvm_ptr_ty, llvm_v8f64_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                    [llvm_ptr_ty, llvm_v8f64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_load_ps_128 :
         GCCBuiltin<"__builtin_ia32_loadaps128_mask">,
           Intrinsic<[llvm_v4f32_ty],
-                    [llvm_ptr_ty, llvm_v4f32_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                    [llvm_ptr_ty, llvm_v4f32_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_load_ps_256 :
         GCCBuiltin<"__builtin_ia32_loadaps256_mask">,
           Intrinsic<[llvm_v8f32_ty],
-                    [llvm_ptr_ty, llvm_v8f32_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                    [llvm_ptr_ty, llvm_v8f32_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_load_ps_512 :
         GCCBuiltin<"__builtin_ia32_loadaps512_mask">,
           Intrinsic<[llvm_v16f32_ty],
-                    [llvm_ptr_ty, llvm_v16f32_ty, llvm_i16_ty], [IntrReadArgMem]>;
+                    [llvm_ptr_ty, llvm_v16f32_ty, llvm_i16_ty], [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_load_pd_128 :
         GCCBuiltin<"__builtin_ia32_loadapd128_mask">,
           Intrinsic<[llvm_v2f64_ty],
-                    [llvm_ptr_ty, llvm_v2f64_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                    [llvm_ptr_ty, llvm_v2f64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_load_pd_256 :
         GCCBuiltin<"__builtin_ia32_loadapd256_mask">,
           Intrinsic<[llvm_v4f64_ty],
-                    [llvm_ptr_ty, llvm_v4f64_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                    [llvm_ptr_ty, llvm_v4f64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_load_pd_512 :
         GCCBuiltin<"__builtin_ia32_loadapd512_mask">,
           Intrinsic<[llvm_v8f64_ty],
-                    [llvm_ptr_ty, llvm_v8f64_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                    [llvm_ptr_ty, llvm_v8f64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
 }
 
 // Conditional move ops
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_avx512_mask_move_ss :
         GCCBuiltin<"__builtin_ia32_movss_mask">,
           Intrinsic<[llvm_v4f32_ty],
                     [llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty, llvm_i8_ty],
def int_x86_avx512_mask_movu_b_512 :
           Intrinsic<[llvm_v64i8_ty],
                     [llvm_v64i8_ty, llvm_v64i8_ty, llvm_i64_ty], [IntrNoMem]>;
 }
 
 // Conditional store ops
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_avx_maskstore_pd : GCCBuiltin<"__builtin_ia32_maskstorepd">,
         Intrinsic<[], [llvm_ptr_ty,
-                  llvm_v2i64_ty, llvm_v2f64_ty], [IntrReadWriteArgMem]>;
+                  llvm_v2i64_ty, llvm_v2f64_ty], [IntrArgMemOnly]>;
   def int_x86_avx_maskstore_ps : GCCBuiltin<"__builtin_ia32_maskstoreps">,
         Intrinsic<[], [llvm_ptr_ty,
-                  llvm_v4i32_ty, llvm_v4f32_ty], [IntrReadWriteArgMem]>;
+                  llvm_v4i32_ty, llvm_v4f32_ty], [IntrArgMemOnly]>;
   def int_x86_avx_maskstore_pd_256 :
         GCCBuiltin<"__builtin_ia32_maskstorepd256">,
         Intrinsic<[], [llvm_ptr_ty,
-                  llvm_v4i64_ty, llvm_v4f64_ty], [IntrReadWriteArgMem]>;
+                  llvm_v4i64_ty, llvm_v4f64_ty], [IntrArgMemOnly]>;
   def int_x86_avx_maskstore_ps_256 :
         GCCBuiltin<"__builtin_ia32_maskstoreps256">,
         Intrinsic<[], [llvm_ptr_ty,
-                  llvm_v8i32_ty, llvm_v8f32_ty], [IntrReadWriteArgMem]>;
+                  llvm_v8i32_ty, llvm_v8f32_ty], [IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_storeu_ps_128 :
         GCCBuiltin<"__builtin_ia32_storeups128_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v4f32_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_storeu_ps_256 :
         GCCBuiltin<"__builtin_ia32_storeups256_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v8f32_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_storeu_ps_512 :
         GCCBuiltin<"__builtin_ia32_storeups512_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v16f32_ty, llvm_i16_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_storeu_pd_128 :
         GCCBuiltin<"__builtin_ia32_storeupd128_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v2f64_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_storeu_pd_256 :
         GCCBuiltin<"__builtin_ia32_storeupd256_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v4f64_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_storeu_pd_512 :
         GCCBuiltin<"__builtin_ia32_storeupd512_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v8f64_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_store_ps_128 :
         GCCBuiltin<"__builtin_ia32_storeaps128_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v4f32_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_store_ps_256 :
         GCCBuiltin<"__builtin_ia32_storeaps256_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v8f32_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_store_ps_512 :
         GCCBuiltin<"__builtin_ia32_storeaps512_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v16f32_ty, llvm_i16_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_store_pd_128 :
         GCCBuiltin<"__builtin_ia32_storeapd128_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v2f64_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_store_pd_256 :
         GCCBuiltin<"__builtin_ia32_storeapd256_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v4f64_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_store_pd_512 :
         GCCBuiltin<"__builtin_ia32_storeapd512_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v8f64_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_store_ss :
         GCCBuiltin<"__builtin_ia32_storess_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v4f32_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
 }
 
 // Store ops using non-temporal hint
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_avx512_storent_q_512 :
         GCCBuiltin<"__builtin_ia32_movntdq512">,
-        Intrinsic<[], [llvm_ptr_ty, llvm_v8i64_ty], [IntrReadWriteArgMem]>;
+        Intrinsic<[], [llvm_ptr_ty, llvm_v8i64_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_storent_pd_512 :
         GCCBuiltin<"__builtin_ia32_movntpd512">,
-        Intrinsic<[], [llvm_ptr_ty, llvm_v8f64_ty], [IntrReadWriteArgMem]>;
+        Intrinsic<[], [llvm_ptr_ty, llvm_v8f64_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_storent_ps_512 :
         GCCBuiltin<"__builtin_ia32_movntps512">,
-        Intrinsic<[], [llvm_ptr_ty, llvm_v16f32_ty], [IntrReadWriteArgMem]>;
+        Intrinsic<[], [llvm_ptr_ty, llvm_v16f32_ty], [IntrArgMemOnly]>;
 }
 //===----------------------------------------------------------------------===//
 // AVX2
 
 // Integer arithmetic ops.
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_avx2_padds_b : GCCBuiltin<"__builtin_ia32_paddsb256">,
               Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty,
def int_x86_avx512_mask_inserti64x4_512 :
           [llvm_v8i64_ty, llvm_v4i64_ty, llvm_i32_ty, llvm_v8i64_ty, llvm_i8_ty],
           [IntrNoMem]>;
 }
 
 // Conditional load ops
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_avx2_maskload_d : GCCBuiltin<"__builtin_ia32_maskloadd">,
         Intrinsic<[llvm_v4i32_ty], [llvm_ptr_ty, llvm_v4i32_ty],
-                  [IntrReadArgMem]>;
+                  [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx2_maskload_q : GCCBuiltin<"__builtin_ia32_maskloadq">,
         Intrinsic<[llvm_v2i64_ty], [llvm_ptr_ty, llvm_v2i64_ty],
-                  [IntrReadArgMem]>;
+                  [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx2_maskload_d_256 : GCCBuiltin<"__builtin_ia32_maskloadd256">,
         Intrinsic<[llvm_v8i32_ty], [llvm_ptr_ty, llvm_v8i32_ty],
-                  [IntrReadArgMem]>;
+                  [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx2_maskload_q_256 : GCCBuiltin<"__builtin_ia32_maskloadq256">,
         Intrinsic<[llvm_v4i64_ty], [llvm_ptr_ty, llvm_v4i64_ty],
-                  [IntrReadArgMem]>;
+                  [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_loadu_b_128 :
          GCCBuiltin<"__builtin_ia32_loaddquqi128_mask">,
            Intrinsic<[llvm_v16i8_ty],
-                     [llvm_ptr_ty, llvm_v16i8_ty, llvm_i16_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v16i8_ty, llvm_i16_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_loadu_b_256 :
          GCCBuiltin<"__builtin_ia32_loaddquqi256_mask">,
            Intrinsic<[llvm_v32i8_ty],
-                     [llvm_ptr_ty, llvm_v32i8_ty, llvm_i32_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v32i8_ty, llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_loadu_b_512 :
          GCCBuiltin<"__builtin_ia32_loaddquqi512_mask">,
            Intrinsic<[llvm_v64i8_ty],
-                     [llvm_ptr_ty, llvm_v64i8_ty, llvm_i64_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v64i8_ty, llvm_i64_ty], [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_loadu_w_128 :
          GCCBuiltin<"__builtin_ia32_loaddquhi128_mask">,
            Intrinsic<[llvm_v8i16_ty],
-                     [llvm_ptr_ty, llvm_v8i16_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v8i16_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_loadu_w_256 :
          GCCBuiltin<"__builtin_ia32_loaddquhi256_mask">,
            Intrinsic<[llvm_v16i16_ty],
-                     [llvm_ptr_ty, llvm_v16i16_ty, llvm_i16_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v16i16_ty, llvm_i16_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_loadu_w_512 :
          GCCBuiltin<"__builtin_ia32_loaddquhi512_mask">,
            Intrinsic<[llvm_v32i16_ty],
-                     [llvm_ptr_ty, llvm_v32i16_ty, llvm_i32_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v32i16_ty, llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_loadu_d_128 :
          GCCBuiltin<"__builtin_ia32_loaddqusi128_mask">,
            Intrinsic<[llvm_v4i32_ty],
-                     [llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_loadu_d_256 :
          GCCBuiltin<"__builtin_ia32_loaddqusi256_mask">,
            Intrinsic<[llvm_v8i32_ty],
-                     [llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_loadu_d_512 :
          GCCBuiltin<"__builtin_ia32_loaddqusi512_mask">,
            Intrinsic<[llvm_v16i32_ty],
-                     [llvm_ptr_ty, llvm_v16i32_ty, llvm_i16_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v16i32_ty, llvm_i16_ty], [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_loadu_q_128 :
          GCCBuiltin<"__builtin_ia32_loaddqudi128_mask">,
            Intrinsic<[llvm_v2i64_ty],
-                     [llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_loadu_q_256 :
          GCCBuiltin<"__builtin_ia32_loaddqudi256_mask">,
            Intrinsic<[llvm_v4i64_ty],
-                     [llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_loadu_q_512 :
          GCCBuiltin<"__builtin_ia32_loaddqudi512_mask">,
            Intrinsic<[llvm_v8i64_ty],
-                     [llvm_ptr_ty, llvm_v8i64_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v8i64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_load_d_128 :
          GCCBuiltin<"__builtin_ia32_movdqa32load128_mask">,
            Intrinsic<[llvm_v4i32_ty],
-                     [llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_load_d_256 :
          GCCBuiltin<"__builtin_ia32_movdqa32load256_mask">,
            Intrinsic<[llvm_v8i32_ty],
-                     [llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_load_d_512 :
          GCCBuiltin<"__builtin_ia32_movdqa32load512_mask">,
            Intrinsic<[llvm_v16i32_ty],
-                     [llvm_ptr_ty, llvm_v16i32_ty, llvm_i16_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v16i32_ty, llvm_i16_ty], [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_load_q_128 :
          GCCBuiltin<"__builtin_ia32_movdqa64load128_mask">,
            Intrinsic<[llvm_v2i64_ty],
-                     [llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_load_q_256 :
          GCCBuiltin<"__builtin_ia32_movdqa64load256_mask">,
            Intrinsic<[llvm_v4i64_ty],
-                     [llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_load_q_512 :
          GCCBuiltin<"__builtin_ia32_movdqa64load512_mask">,
            Intrinsic<[llvm_v8i64_ty],
-                     [llvm_ptr_ty, llvm_v8i64_ty, llvm_i8_ty], [IntrReadArgMem]>;
+                     [llvm_ptr_ty, llvm_v8i64_ty, llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
 }
 
 // Conditional store ops
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_avx2_maskstore_d : GCCBuiltin<"__builtin_ia32_maskstored">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v4i32_ty, llvm_v4i32_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx2_maskstore_q : GCCBuiltin<"__builtin_ia32_maskstoreq">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v2i64_ty, llvm_v2i64_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx2_maskstore_d_256 :
         GCCBuiltin<"__builtin_ia32_maskstored256">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v8i32_ty, llvm_v8i32_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx2_maskstore_q_256 :
         GCCBuiltin<"__builtin_ia32_maskstoreq256">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v4i64_ty, llvm_v4i64_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_storeu_b_128 :
         GCCBuiltin<"__builtin_ia32_storedquqi128_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v16i8_ty, llvm_i16_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_storeu_b_256 :
         GCCBuiltin<"__builtin_ia32_storedquqi256_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v32i8_ty, llvm_i32_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_storeu_b_512 :
         GCCBuiltin<"__builtin_ia32_storedquqi512_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v64i8_ty, llvm_i64_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_storeu_w_128 :
         GCCBuiltin<"__builtin_ia32_storedquhi128_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v8i16_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_storeu_w_256 :
         GCCBuiltin<"__builtin_ia32_storedquhi256_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v16i16_ty, llvm_i16_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_storeu_w_512 :
          GCCBuiltin<"__builtin_ia32_storedquhi512_mask">,
          Intrinsic<[], [llvm_ptr_ty, llvm_v32i16_ty, llvm_i32_ty],
-                   [IntrReadWriteArgMem]>;
+                   [IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_storeu_d_128 :
         GCCBuiltin<"__builtin_ia32_storedqusi128_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_storeu_d_256 :
         GCCBuiltin<"__builtin_ia32_storedqusi256_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_storeu_d_512 :
         GCCBuiltin<"__builtin_ia32_storedqusi512_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v16i32_ty, llvm_i16_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_storeu_q_128 :
         GCCBuiltin<"__builtin_ia32_storedqudi128_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_storeu_q_256 :
         GCCBuiltin<"__builtin_ia32_storedqudi256_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_storeu_q_512 :
         GCCBuiltin<"__builtin_ia32_storedqudi512_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v8i64_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_store_d_128 :
         GCCBuiltin<"__builtin_ia32_movdqa32store128_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_store_d_256 :
         GCCBuiltin<"__builtin_ia32_movdqa32store256_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_store_d_512 :
         GCCBuiltin<"__builtin_ia32_movdqa32store512_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v16i32_ty, llvm_i16_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_store_q_128 :
         GCCBuiltin<"__builtin_ia32_movdqa64store128_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_store_q_256 :
         GCCBuiltin<"__builtin_ia32_movdqa64store256_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
   def int_x86_avx512_mask_store_q_512 :
         GCCBuiltin<"__builtin_ia32_movdqa64store512_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v8i64_ty, llvm_i8_ty],
-                  [IntrReadWriteArgMem]>;
+                  [IntrArgMemOnly]>;
 }
 
 // Variable bit shift ops
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_avx2_psllv_d : GCCBuiltin<"__builtin_ia32_psllv4si">,
               Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
                         [IntrNoMem]>;
   def int_x86_avx2_psllv_d_256 : GCCBuiltin<"__builtin_ia32_psllv8si">,

 
 }
 
 // Gather ops
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_avx2_gather_d_pd : GCCBuiltin<"__builtin_ia32_gatherd_pd">,
       Intrinsic<[llvm_v2f64_ty],
         [llvm_v2f64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v2f64_ty, llvm_i8_ty],
-        [IntrReadArgMem]>;
+        [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx2_gather_d_pd_256 : GCCBuiltin<"__builtin_ia32_gatherd_pd256">,
       Intrinsic<[llvm_v4f64_ty],
         [llvm_v4f64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v4f64_ty, llvm_i8_ty],
-        [IntrReadArgMem]>;
+        [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx2_gather_q_pd : GCCBuiltin<"__builtin_ia32_gatherq_pd">,
       Intrinsic<[llvm_v2f64_ty],
         [llvm_v2f64_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_v2f64_ty, llvm_i8_ty],
-        [IntrReadArgMem]>;
+        [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx2_gather_q_pd_256 : GCCBuiltin<"__builtin_ia32_gatherq_pd256">,
       Intrinsic<[llvm_v4f64_ty],
         [llvm_v4f64_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_v4f64_ty, llvm_i8_ty],
-        [IntrReadArgMem]>;
+        [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx2_gather_d_ps : GCCBuiltin<"__builtin_ia32_gatherd_ps">,
       Intrinsic<[llvm_v4f32_ty],
         [llvm_v4f32_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v4f32_ty, llvm_i8_ty],
-        [IntrReadArgMem]>;
+        [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx2_gather_d_ps_256 : GCCBuiltin<"__builtin_ia32_gatherd_ps256">,
       Intrinsic<[llvm_v8f32_ty],
         [llvm_v8f32_ty, llvm_ptr_ty, llvm_v8i32_ty, llvm_v8f32_ty, llvm_i8_ty],
-        [IntrReadArgMem]>;
+        [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx2_gather_q_ps : GCCBuiltin<"__builtin_ia32_gatherq_ps">,
       Intrinsic<[llvm_v4f32_ty],
         [llvm_v4f32_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_v4f32_ty, llvm_i8_ty],
-        [IntrReadArgMem]>;
+        [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx2_gather_q_ps_256 : GCCBuiltin<"__builtin_ia32_gatherq_ps256">,
       Intrinsic<[llvm_v4f32_ty],
         [llvm_v4f32_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_v4f32_ty, llvm_i8_ty],
-        [IntrReadArgMem]>;
+        [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx2_gather_d_q : GCCBuiltin<"__builtin_ia32_gatherd_q">,
       Intrinsic<[llvm_v2i64_ty],
         [llvm_v2i64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v2i64_ty, llvm_i8_ty],
-        [IntrReadArgMem]>;
+        [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx2_gather_d_q_256 : GCCBuiltin<"__builtin_ia32_gatherd_q256">,
       Intrinsic<[llvm_v4i64_ty],
         [llvm_v4i64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v4i64_ty, llvm_i8_ty],
-        [IntrReadArgMem]>;
+        [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx2_gather_q_q : GCCBuiltin<"__builtin_ia32_gatherq_q">,
       Intrinsic<[llvm_v2i64_ty],
         [llvm_v2i64_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_v2i64_ty, llvm_i8_ty],
-        [IntrReadArgMem]>;
+        [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx2_gather_q_q_256 : GCCBuiltin<"__builtin_ia32_gatherq_q256">,
       Intrinsic<[llvm_v4i64_ty],
         [llvm_v4i64_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_v4i64_ty, llvm_i8_ty],
-        [IntrReadArgMem]>;
+        [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx2_gather_d_d : GCCBuiltin<"__builtin_ia32_gatherd_d">,
       Intrinsic<[llvm_v4i32_ty],
         [llvm_v4i32_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_v4i32_ty, llvm_i8_ty],
-        [IntrReadArgMem]>;
+        [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx2_gather_d_d_256 : GCCBuiltin<"__builtin_ia32_gatherd_d256">,
       Intrinsic<[llvm_v8i32_ty],
         [llvm_v8i32_ty, llvm_ptr_ty, llvm_v8i32_ty, llvm_v8i32_ty, llvm_i8_ty],
-        [IntrReadArgMem]>;
+        [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx2_gather_q_d : GCCBuiltin<"__builtin_ia32_gatherq_d">,
       Intrinsic<[llvm_v4i32_ty],
         [llvm_v4i32_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_v4i32_ty, llvm_i8_ty],
-        [IntrReadArgMem]>;
+        [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx2_gather_q_d_256 : GCCBuiltin<"__builtin_ia32_gatherq_d256">,
       Intrinsic<[llvm_v4i32_ty],
         [llvm_v4i32_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_v4i32_ty, llvm_i8_ty],
-        [IntrReadArgMem]>;
+        [IntrReadMem, IntrArgMemOnly]>;
 }
 
 // Misc.
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_avx2_pmovmskb : GCCBuiltin<"__builtin_ia32_pmovmskb256">,
               Intrinsic<[llvm_i32_ty], [llvm_v32i8_ty], [IntrNoMem]>;
   def int_x86_avx2_pshuf_b : GCCBuiltin<"__builtin_ia32_pshufb256">,
               Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty,

 }
 
 //===----------------------------------------------------------------------===//
 // ADX
 
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_addcarryx_u32: GCCBuiltin<"__builtin_ia32_addcarryx_u32">,
         Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i32_ty, llvm_i32_ty,
-                                 llvm_ptr_ty], [IntrReadWriteArgMem]>;
+                                 llvm_ptr_ty], [IntrArgMemOnly]>;
   def int_x86_addcarryx_u64: GCCBuiltin<"__builtin_ia32_addcarryx_u64">,
         Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i64_ty, llvm_i64_ty,
-                                 llvm_ptr_ty], [IntrReadWriteArgMem]>;
+                                 llvm_ptr_ty], [IntrArgMemOnly]>;
   def int_x86_addcarry_u32: GCCBuiltin<"__builtin_ia32_addcarry_u32">,
         Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i32_ty, llvm_i32_ty,
-                                 llvm_ptr_ty], [IntrReadWriteArgMem]>;
+                                 llvm_ptr_ty], [IntrArgMemOnly]>;
   def int_x86_addcarry_u64: GCCBuiltin<"__builtin_ia32_addcarry_u64">,
         Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i64_ty, llvm_i64_ty,
-                                 llvm_ptr_ty], [IntrReadWriteArgMem]>;
+                                 llvm_ptr_ty], [IntrArgMemOnly]>;
   def int_x86_subborrow_u32: GCCBuiltin<"__builtin_ia32_subborrow_u32">,
         Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i32_ty, llvm_i32_ty,
-                                 llvm_ptr_ty], [IntrReadWriteArgMem]>;
+                                 llvm_ptr_ty], [IntrArgMemOnly]>;
   def int_x86_subborrow_u64: GCCBuiltin<"__builtin_ia32_subborrow_u64">,
         Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i64_ty, llvm_i64_ty,
-                                 llvm_ptr_ty], [IntrReadWriteArgMem]>;
+                                 llvm_ptr_ty], [IntrArgMemOnly]>;
 }
 
 //===----------------------------------------------------------------------===//
 // RTM intrinsics. Transactional Memory support.
 
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_xbegin : GCCBuiltin<"__builtin_ia32_xbegin">,
               Intrinsic<[llvm_i32_ty], [], []>;
def int_x86_avx512_mask_range_ps_512 : GCCBuiltin<"__builtin_ia32_rangeps512_mask">,
         Intrinsic<[llvm_v16f32_ty], [llvm_v16f32_ty, llvm_v16f32_ty, llvm_i32_ty,
                                      llvm_v16f32_ty,  llvm_i16_ty,  llvm_i32_ty], [IntrNoMem]>;
 }
 
 // Vector load with broadcast
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_avx512_vbroadcast_ss_512 :
         GCCBuiltin<"__builtin_ia32_vbroadcastss512">,
-        Intrinsic<[llvm_v16f32_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
+        Intrinsic<[llvm_v16f32_ty], [llvm_ptr_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_broadcast_ss_ps_512 :
         GCCBuiltin<"__builtin_ia32_broadcastss512">,
         Intrinsic<[llvm_v16f32_ty], [llvm_v4f32_ty, llvm_v16f32_ty, llvm_i16_ty], [IntrNoMem]>;
   def int_x86_avx512_mask_broadcast_ss_ps_256 :
         GCCBuiltin<"__builtin_ia32_broadcastss256_mask">,
         Intrinsic<[llvm_v8f32_ty], [llvm_v4f32_ty, llvm_v8f32_ty, llvm_i8_ty], [IntrNoMem]>;
   def int_x86_avx512_mask_broadcast_ss_ps_128 :
         GCCBuiltin<"__builtin_ia32_broadcastss128_mask">,
         Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
 
   def int_x86_avx512_vbroadcast_sd_512 :
         GCCBuiltin<"__builtin_ia32_vbroadcastsd512">,
-        Intrinsic<[llvm_v8f64_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
+        Intrinsic<[llvm_v8f64_ty], [llvm_ptr_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_broadcast_sd_pd_512 :
         GCCBuiltin<"__builtin_ia32_broadcastsd512">,
         Intrinsic<[llvm_v8f64_ty], [llvm_v2f64_ty, llvm_v8f64_ty, llvm_i8_ty], [IntrNoMem]>;
   def int_x86_avx512_mask_broadcast_sd_pd_256 :
         GCCBuiltin<"__builtin_ia32_broadcastsd256_mask">,
         Intrinsic<[llvm_v4f64_ty], [llvm_v2f64_ty, llvm_v4f64_ty, llvm_i8_ty], [IntrNoMem]>;
 
   def int_x86_avx512_pbroadcastb_128 :
def int_x86_avx512_mask_dbpsadbw_512 :
            llvm_i32_ty], [IntrNoMem]>;
 }
 
 // Gather and Scatter ops
 let TargetPrefix = "x86" in {
   def int_x86_avx512_gather_dpd_512  : GCCBuiltin<"__builtin_ia32_gathersiv8df">,
           Intrinsic<[llvm_v8f64_ty], [llvm_v8f64_ty, llvm_ptr_ty,
                      llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty],
-                    [IntrReadArgMem]>;
+                    [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_gather_dps_512  : GCCBuiltin<"__builtin_ia32_gathersiv16sf">,
           Intrinsic<[llvm_v16f32_ty], [llvm_v16f32_ty, llvm_ptr_ty,
                      llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty],
-                    [IntrReadArgMem]>;
+                    [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_gather_qpd_512  : GCCBuiltin<"__builtin_ia32_gatherdiv8df">,
           Intrinsic<[llvm_v8f64_ty], [llvm_v8f64_ty, llvm_ptr_ty,
                      llvm_v8i64_ty, llvm_i8_ty, llvm_i32_ty],
-                    [IntrReadArgMem]>;
+                    [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_gather_qps_512  : GCCBuiltin<"__builtin_ia32_gatherdiv16sf">,
           Intrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_ptr_ty,
                      llvm_v8i64_ty, llvm_i8_ty, llvm_i32_ty],
-                    [IntrReadArgMem]>;
+                    [IntrReadMem, IntrArgMemOnly]>;
 
 
   def int_x86_avx512_gather_dpq_512  : GCCBuiltin<"__builtin_ia32_gathersiv8di">,
           Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_ptr_ty,
                      llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty],
-                    [IntrReadArgMem]>;
+                    [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_gather_dpi_512  : GCCBuiltin<"__builtin_ia32_gathersiv16si">,
           Intrinsic<[llvm_v16i32_ty], [llvm_v16i32_ty, llvm_ptr_ty,
                      llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty],
-                    [IntrReadArgMem]>;
+                    [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_gather_qpq_512  : GCCBuiltin<"__builtin_ia32_gatherdiv8di">,
           Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_ptr_ty,
                      llvm_v8i64_ty, llvm_i8_ty, llvm_i32_ty],
-                    [IntrReadArgMem]>;
+                    [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_gather_qpi_512  : GCCBuiltin<"__builtin_ia32_gatherdiv16si">,
           Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty, llvm_ptr_ty,
                      llvm_v8i64_ty, llvm_i8_ty, llvm_i32_ty],
-                    [IntrReadArgMem]>;
+                    [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_gather3div2_df :
         GCCBuiltin<"__builtin_ia32_gather3div2df">,
           Intrinsic<[llvm_v2f64_ty],
           [llvm_v2f64_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty, llvm_i32_ty],
-          [IntrReadArgMem]>;
+          [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_gather3div2_di :
         GCCBuiltin<"__builtin_ia32_gather3div2di">,
           Intrinsic<[llvm_v4i32_ty],
           [llvm_v2i64_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty, llvm_i32_ty],
-          [IntrReadArgMem]>;
+          [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_gather3div4_df :
         GCCBuiltin<"__builtin_ia32_gather3div4df">,
           Intrinsic<[llvm_v4f64_ty],
           [llvm_v4f64_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty, llvm_i32_ty],
-          [IntrReadArgMem]>;
+          [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_gather3div4_di :
         GCCBuiltin<"__builtin_ia32_gather3div4di">,
           Intrinsic<[llvm_v8i32_ty],
           [llvm_v4i64_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty, llvm_i32_ty],
-          [IntrReadArgMem]>;
+          [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_gather3div4_sf :
         GCCBuiltin<"__builtin_ia32_gather3div4sf">,
           Intrinsic<[llvm_v4f32_ty],
           [llvm_v4f32_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty, llvm_i32_ty],
-          [IntrReadArgMem]>;
+          [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_gather3div4_si :
         GCCBuiltin<"__builtin_ia32_gather3div4si">,
           Intrinsic<[llvm_v4i32_ty],
           [llvm_v4i32_ty, llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty, llvm_i32_ty],
-          [IntrReadArgMem]>;
+          [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_gather3div8_sf :
         GCCBuiltin<"__builtin_ia32_gather3div8sf">,
           Intrinsic<[llvm_v4f32_ty],
           [llvm_v4f32_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty, llvm_i32_ty],
-          [IntrReadArgMem]>;
+          [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_gather3div8_si :
         GCCBuiltin<"__builtin_ia32_gather3div8si">,
           Intrinsic<[llvm_v4i32_ty],
           [llvm_v4i32_ty, llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty, llvm_i32_ty],
-          [IntrReadArgMem]>;
+          [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_gather3siv2_df :
         GCCBuiltin<"__builtin_ia32_gather3siv2df">,
           Intrinsic<[llvm_v2f64_ty],
           [llvm_v2f64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty, llvm_i32_ty],
-          [IntrReadArgMem]>;
+          [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_gather3siv2_di :
         GCCBuiltin<"__builtin_ia32_gather3siv2di">,
           Intrinsic<[llvm_v4i32_ty],
           [llvm_v2i64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty, llvm_i32_ty],
-          [IntrReadArgMem]>;
+          [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_gather3siv4_df :
         GCCBuiltin<"__builtin_ia32_gather3siv4df">,
           Intrinsic<[llvm_v4f64_ty],
           [llvm_v4f64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty, llvm_i32_ty],
-          [IntrReadArgMem]>;
+          [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_gather3siv4_di :
         GCCBuiltin<"__builtin_ia32_gather3siv4di">,
           Intrinsic<[llvm_v8i32_ty],
           [llvm_v4i64_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty, llvm_i32_ty],
-          [IntrReadArgMem]>;
+          [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_gather3siv4_sf :
         GCCBuiltin<"__builtin_ia32_gather3siv4sf">,
           Intrinsic<[llvm_v4f32_ty],
           [llvm_v4f32_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty, llvm_i32_ty],
-          [IntrReadArgMem]>;
+          [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_gather3siv4_si :
         GCCBuiltin<"__builtin_ia32_gather3siv4si">,
           Intrinsic<[llvm_v4i32_ty],
           [llvm_v4i32_ty, llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty, llvm_i32_ty],
-          [IntrReadArgMem]>;
+          [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_gather3siv8_sf :
         GCCBuiltin<"__builtin_ia32_gather3siv8sf">,
           Intrinsic<[llvm_v8f32_ty],
           [llvm_v8f32_ty, llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty],
-          [IntrReadArgMem]>;
+          [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_gather3siv8_si :
         GCCBuiltin<"__builtin_ia32_gather3siv8si">,
           Intrinsic<[llvm_v8i32_ty],
           [llvm_v8i32_ty, llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty],
-          [IntrReadArgMem]>;
+          [IntrReadMem, IntrArgMemOnly]>;
 
 // scatter
   def int_x86_avx512_scatter_dpd_512  : GCCBuiltin<"__builtin_ia32_scattersiv8df">,
           Intrinsic<[], [llvm_ptr_ty, llvm_i8_ty,
                         llvm_v8i32_ty, llvm_v8f64_ty, llvm_i32_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_scatter_dps_512  : GCCBuiltin<"__builtin_ia32_scattersiv16sf">,
           Intrinsic<[], [llvm_ptr_ty, llvm_i16_ty,
                        llvm_v16i32_ty, llvm_v16f32_ty, llvm_i32_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_scatter_qpd_512  : GCCBuiltin<"__builtin_ia32_scatterdiv8df">,
           Intrinsic<[], [llvm_ptr_ty, llvm_i8_ty,
                      llvm_v8i64_ty, llvm_v8f64_ty, llvm_i32_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_scatter_qps_512  : GCCBuiltin<"__builtin_ia32_scatterdiv16sf">,
           Intrinsic<[], [llvm_ptr_ty, llvm_i8_ty,
                      llvm_v8i64_ty, llvm_v8f32_ty, llvm_i32_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
 
 
   def int_x86_avx512_scatter_dpq_512  : GCCBuiltin<"__builtin_ia32_scattersiv8di">,
           Intrinsic<[], [llvm_ptr_ty, llvm_i8_ty,
                          llvm_v8i32_ty, llvm_v8i64_ty, llvm_i32_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_scatter_dpi_512  : GCCBuiltin<"__builtin_ia32_scattersiv16si">,
           Intrinsic<[], [llvm_ptr_ty, llvm_i16_ty,
                      llvm_v16i32_ty, llvm_v16i32_ty, llvm_i32_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_scatter_qpq_512  : GCCBuiltin<"__builtin_ia32_scatterdiv8di">,
           Intrinsic<[], [llvm_ptr_ty, llvm_i8_ty,llvm_v8i64_ty, llvm_v8i64_ty,
                          llvm_i32_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_scatter_qpi_512  : GCCBuiltin<"__builtin_ia32_scatterdiv16si">,
           Intrinsic<[], [llvm_ptr_ty, llvm_i8_ty, llvm_v8i64_ty, llvm_v8i32_ty,
                          llvm_i32_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
 
   def int_x86_avx512_scatterdiv2_df :
        GCCBuiltin<"__builtin_ia32_scatterdiv2df">,
         Intrinsic<[],
         [llvm_ptr_ty, llvm_i8_ty, llvm_v2i64_ty, llvm_v2f64_ty, llvm_i32_ty],
-        [IntrReadWriteArgMem]>;
+        [IntrArgMemOnly]>;
 
   def int_x86_avx512_scatterdiv2_di :
         GCCBuiltin<"__builtin_ia32_scatterdiv2di">,
           Intrinsic<[],
           [llvm_ptr_ty, llvm_i8_ty, llvm_v2i64_ty, llvm_v2i64_ty, llvm_i32_ty],
-          [IntrReadWriteArgMem]>;
+          [IntrArgMemOnly]>;
 
   def int_x86_avx512_scatterdiv4_df :
         GCCBuiltin<"__builtin_ia32_scatterdiv4df">,
           Intrinsic<[],
           [llvm_ptr_ty, llvm_i8_ty, llvm_v4i64_ty, llvm_v4f64_ty, llvm_i32_ty],
-          [IntrReadWriteArgMem]>;
+          [IntrArgMemOnly]>;
 
   def int_x86_avx512_scatterdiv4_di :
         GCCBuiltin<"__builtin_ia32_scatterdiv4di">,
           Intrinsic<[],
           [llvm_ptr_ty, llvm_i8_ty, llvm_v4i64_ty, llvm_v4i64_ty, llvm_i32_ty],
-          [IntrReadWriteArgMem]>;
+          [IntrArgMemOnly]>;
 
   def int_x86_avx512_scatterdiv4_sf :
         GCCBuiltin<"__builtin_ia32_scatterdiv4sf">,
           Intrinsic<[],
           [llvm_ptr_ty, llvm_i8_ty, llvm_v2i64_ty, llvm_v4f32_ty, llvm_i32_ty],
-          [IntrReadWriteArgMem]>;
+          [IntrArgMemOnly]>;
 
   def int_x86_avx512_scatterdiv4_si :
         GCCBuiltin<"__builtin_ia32_scatterdiv4si">,
           Intrinsic<[],
           [llvm_ptr_ty, llvm_i8_ty, llvm_v2i64_ty, llvm_v4i32_ty, llvm_i32_ty],
-          [IntrReadWriteArgMem]>;
+          [IntrArgMemOnly]>;
 
   def int_x86_avx512_scatterdiv8_sf :
         GCCBuiltin<"__builtin_ia32_scatterdiv8sf">,
           Intrinsic<[],
           [llvm_ptr_ty, llvm_i8_ty, llvm_v4i64_ty, llvm_v4f32_ty, llvm_i32_ty],
-          [IntrReadWriteArgMem]>;
+          [IntrArgMemOnly]>;
 
   def int_x86_avx512_scatterdiv8_si :
         GCCBuiltin<"__builtin_ia32_scatterdiv8si">,
           Intrinsic<[],
           [llvm_ptr_ty, llvm_i8_ty, llvm_v4i64_ty, llvm_v4i32_ty, llvm_i32_ty],
-          [IntrReadWriteArgMem]>;
+          [IntrArgMemOnly]>;
 
   def int_x86_avx512_scattersiv2_df :
         GCCBuiltin<"__builtin_ia32_scattersiv2df">,
           Intrinsic<[],
           [llvm_ptr_ty, llvm_i8_ty, llvm_v4i32_ty, llvm_v2f64_ty, llvm_i32_ty],
-          [IntrReadWriteArgMem]>;
+          [IntrArgMemOnly]>;
 
   def int_x86_avx512_scattersiv2_di :
         GCCBuiltin<"__builtin_ia32_scattersiv2di">,
           Intrinsic<[],
           [llvm_ptr_ty, llvm_i8_ty, llvm_v4i32_ty, llvm_v2i64_ty, llvm_i32_ty],
-          [IntrReadWriteArgMem]>;
+          [IntrArgMemOnly]>;
 
   def int_x86_avx512_scattersiv4_df :
         GCCBuiltin<"__builtin_ia32_scattersiv4df">,
           Intrinsic<[],
           [llvm_ptr_ty, llvm_i8_ty, llvm_v4i32_ty, llvm_v4f64_ty, llvm_i32_ty],
-          [IntrReadWriteArgMem]>;
+          [IntrArgMemOnly]>;
 
   def int_x86_avx512_scattersiv4_di :
         GCCBuiltin<"__builtin_ia32_scattersiv4di">,
           Intrinsic<[],
           [llvm_ptr_ty, llvm_i8_ty, llvm_v4i32_ty, llvm_v4i64_ty, llvm_i32_ty],
-          [IntrReadWriteArgMem]>;
+          [IntrArgMemOnly]>;
 
   def int_x86_avx512_scattersiv4_sf :
         GCCBuiltin<"__builtin_ia32_scattersiv4sf">,
           Intrinsic<[],
           [llvm_ptr_ty, llvm_i8_ty, llvm_v4i32_ty, llvm_v4f32_ty, llvm_i32_ty],
-          [IntrReadWriteArgMem]>;
+          [IntrArgMemOnly]>;
 
   def int_x86_avx512_scattersiv4_si :
         GCCBuiltin<"__builtin_ia32_scattersiv4si">,
           Intrinsic<[],
           [llvm_ptr_ty, llvm_i8_ty, llvm_v4i32_ty, llvm_v4i32_ty, llvm_i32_ty],
-          [IntrReadWriteArgMem]>;
+          [IntrArgMemOnly]>;
 
   def int_x86_avx512_scattersiv8_sf :
         GCCBuiltin<"__builtin_ia32_scattersiv8sf">,
           Intrinsic<[],
           [llvm_ptr_ty, llvm_i8_ty, llvm_v8i32_ty, llvm_v8f32_ty, llvm_i32_ty],
-          [IntrReadWriteArgMem]>;
+          [IntrArgMemOnly]>;
 
   def int_x86_avx512_scattersiv8_si :
         GCCBuiltin<"__builtin_ia32_scattersiv8si">,
           Intrinsic<[],
           [llvm_ptr_ty, llvm_i8_ty, llvm_v8i32_ty, llvm_v8i32_ty, llvm_i32_ty],
-          [IntrReadWriteArgMem]>;
+          [IntrArgMemOnly]>;
 
   // gather prefetch
   def int_x86_avx512_gatherpf_dpd_512  : GCCBuiltin<"__builtin_ia32_gatherpfdpd">,
           Intrinsic<[], [llvm_i8_ty, llvm_v8i32_ty, llvm_ptr_ty,
-                     llvm_i32_ty, llvm_i32_ty], [IntrReadWriteArgMem]>;
+                     llvm_i32_ty, llvm_i32_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_gatherpf_dps_512  : GCCBuiltin<"__builtin_ia32_gatherpfdps">,
           Intrinsic<[], [llvm_i16_ty, llvm_v16i32_ty, llvm_ptr_ty,
-                     llvm_i32_ty, llvm_i32_ty], [IntrReadWriteArgMem]>;
+                     llvm_i32_ty, llvm_i32_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_gatherpf_qpd_512  : GCCBuiltin<"__builtin_ia32_gatherpfqpd">,
           Intrinsic<[], [llvm_i8_ty, llvm_v8i64_ty, llvm_ptr_ty,
-                     llvm_i32_ty, llvm_i32_ty], [IntrReadWriteArgMem]>;
+                     llvm_i32_ty, llvm_i32_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_gatherpf_qps_512  : GCCBuiltin<"__builtin_ia32_gatherpfqps">,
           Intrinsic<[], [llvm_i8_ty, llvm_v8i64_ty, llvm_ptr_ty,
-                     llvm_i32_ty, llvm_i32_ty], [IntrReadWriteArgMem]>;
+                     llvm_i32_ty, llvm_i32_ty], [IntrArgMemOnly]>;
 
   // scatter prefetch
   def int_x86_avx512_scatterpf_dpd_512  : GCCBuiltin<"__builtin_ia32_scatterpfdpd">,
           Intrinsic<[], [llvm_i8_ty, llvm_v8i32_ty, llvm_ptr_ty,
-                     llvm_i32_ty, llvm_i32_ty], [IntrReadWriteArgMem]>;
+                     llvm_i32_ty, llvm_i32_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_scatterpf_dps_512  : GCCBuiltin<"__builtin_ia32_scatterpfdps">,
           Intrinsic<[], [llvm_i16_ty, llvm_v16i32_ty, llvm_ptr_ty,
-                     llvm_i32_ty, llvm_i32_ty], [IntrReadWriteArgMem]>;
+                     llvm_i32_ty, llvm_i32_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_scatterpf_qpd_512  : GCCBuiltin<"__builtin_ia32_scatterpfqpd">,
           Intrinsic<[], [llvm_i8_ty, llvm_v8i64_ty, llvm_ptr_ty,
-                     llvm_i32_ty, llvm_i32_ty], [IntrReadWriteArgMem]>;
+                     llvm_i32_ty, llvm_i32_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_scatterpf_qps_512  : GCCBuiltin<"__builtin_ia32_scatterpfqps">,
           Intrinsic<[], [llvm_i8_ty, llvm_v8i64_ty, llvm_ptr_ty,
-                     llvm_i32_ty, llvm_i32_ty], [IntrReadWriteArgMem]>;
+                     llvm_i32_ty, llvm_i32_ty], [IntrArgMemOnly]>;
 }
 
 // AVX-512 conflict detection instruction
 // Instructions that count the number of leading zero bits
 let TargetPrefix = "x86" in {
   def int_x86_avx512_mask_conflict_d_128 :
           GCCBuiltin<"__builtin_ia32_vpconflictsi_128_mask">,
           Intrinsic<[llvm_v4i32_ty],
let TargetPrefix = "x86" in {
   def int_x86_avx512_mask_compress_pd_128 :
                              GCCBuiltin<"__builtin_ia32_compressdf128_mask">,
         Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty,
                    llvm_i8_ty], [IntrNoMem]>;
 
   def int_x86_avx512_mask_compress_store_ps_512 :
                             GCCBuiltin<"__builtin_ia32_compressstoresf512_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v16f32_ty,
-                   llvm_i16_ty], [IntrReadWriteArgMem]>;
+                   llvm_i16_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_mask_compress_store_pd_512 :
                             GCCBuiltin<"__builtin_ia32_compressstoredf512_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v8f64_ty,
-                   llvm_i8_ty], [IntrReadWriteArgMem]>;
+                   llvm_i8_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_mask_compress_store_ps_256 :
                             GCCBuiltin<"__builtin_ia32_compressstoresf256_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v8f32_ty,
-                   llvm_i8_ty], [IntrReadWriteArgMem]>;
+                   llvm_i8_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_mask_compress_store_pd_256 :
                             GCCBuiltin<"__builtin_ia32_compressstoredf256_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v4f64_ty,
-                   llvm_i8_ty], [IntrReadWriteArgMem]>;
+                   llvm_i8_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_mask_compress_store_ps_128 :
                             GCCBuiltin<"__builtin_ia32_compressstoresf128_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v4f32_ty,
-                   llvm_i8_ty], [IntrReadWriteArgMem]>;
+                   llvm_i8_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_mask_compress_store_pd_128 :
                             GCCBuiltin<"__builtin_ia32_compressstoredf128_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v2f64_ty,
-                   llvm_i8_ty], [IntrReadWriteArgMem]>;
+                   llvm_i8_ty], [IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_compress_d_512 :
                              GCCBuiltin<"__builtin_ia32_compresssi512_mask">,
         Intrinsic<[llvm_v16i32_ty], [llvm_v16i32_ty, llvm_v16i32_ty,
                    llvm_i16_ty], [IntrNoMem]>;
   def int_x86_avx512_mask_compress_q_512 :
                              GCCBuiltin<"__builtin_ia32_compressdi512_mask">,
         Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_v8i64_ty,
let TargetPrefix = "x86" in {
   def int_x86_avx512_mask_compress_q_128 :
                              GCCBuiltin<"__builtin_ia32_compressdi128_mask">,
         Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty,
                    llvm_i8_ty], [IntrNoMem]>;
 
   def int_x86_avx512_mask_compress_store_d_512 :
                             GCCBuiltin<"__builtin_ia32_compressstoresi512_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v16i32_ty,
-                   llvm_i16_ty], [IntrReadWriteArgMem]>;
+                   llvm_i16_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_mask_compress_store_q_512 :
                             GCCBuiltin<"__builtin_ia32_compressstoredi512_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v8i64_ty,
-                   llvm_i8_ty], [IntrReadWriteArgMem]>;
+                   llvm_i8_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_mask_compress_store_d_256 :
                             GCCBuiltin<"__builtin_ia32_compressstoresi256_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v8i32_ty,
-                   llvm_i8_ty], [IntrReadWriteArgMem]>;
+                   llvm_i8_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_mask_compress_store_q_256 :
                             GCCBuiltin<"__builtin_ia32_compressstoredi256_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v4i64_ty,
-                   llvm_i8_ty], [IntrReadWriteArgMem]>;
+                   llvm_i8_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_mask_compress_store_d_128 :
                             GCCBuiltin<"__builtin_ia32_compressstoresi128_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v4i32_ty,
-                   llvm_i8_ty], [IntrReadWriteArgMem]>;
+                   llvm_i8_ty], [IntrArgMemOnly]>;
   def int_x86_avx512_mask_compress_store_q_128 :
                             GCCBuiltin<"__builtin_ia32_compressstoredi128_mask">,
         Intrinsic<[], [llvm_ptr_ty, llvm_v2i64_ty,
-                   llvm_i8_ty], [IntrReadWriteArgMem]>;
+                   llvm_i8_ty], [IntrArgMemOnly]>;
 
 // expand
   def int_x86_avx512_mask_expand_ps_512 :
                              GCCBuiltin<"__builtin_ia32_expandsf512_mask">,
         Intrinsic<[llvm_v16f32_ty], [llvm_v16f32_ty, llvm_v16f32_ty,
                    llvm_i16_ty], [IntrNoMem]>;
   def int_x86_avx512_mask_expand_pd_512 :
                              GCCBuiltin<"__builtin_ia32_expanddf512_mask">,
// expand
   def int_x86_avx512_mask_expand_pd_128 :
                              GCCBuiltin<"__builtin_ia32_expanddf128_mask">,
         Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty,
                    llvm_i8_ty], [IntrNoMem]>;
 
   def int_x86_avx512_mask_expand_load_ps_512 :
                             GCCBuiltin<"__builtin_ia32_expandloadsf512_mask">,
         Intrinsic<[llvm_v16f32_ty], [llvm_ptr_ty, llvm_v16f32_ty,
-                   llvm_i16_ty], [IntrReadArgMem]>;
+                   llvm_i16_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_expand_load_pd_512 :
                             GCCBuiltin<"__builtin_ia32_expandloaddf512_mask">,
         Intrinsic<[llvm_v8f64_ty], [llvm_ptr_ty, llvm_v8f64_ty,
-                   llvm_i8_ty], [IntrReadArgMem]>;
+                   llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_expand_load_ps_256 :
                             GCCBuiltin<"__builtin_ia32_expandloadsf256_mask">,
         Intrinsic<[llvm_v8f32_ty], [llvm_ptr_ty, llvm_v8f32_ty,
-                   llvm_i8_ty], [IntrReadArgMem]>;
+                   llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_expand_load_pd_256 :
                             GCCBuiltin<"__builtin_ia32_expandloaddf256_mask">,
         Intrinsic<[llvm_v4f64_ty], [llvm_ptr_ty, llvm_v4f64_ty,
-                   llvm_i8_ty], [IntrReadArgMem]>;
+                   llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_expand_load_ps_128 :
                             GCCBuiltin<"__builtin_ia32_expandloadsf128_mask">,
         Intrinsic<[llvm_v4f32_ty], [llvm_ptr_ty, llvm_v4f32_ty,
-                   llvm_i8_ty], [IntrReadArgMem]>;
+                   llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_expand_load_pd_128 :
                             GCCBuiltin<"__builtin_ia32_expandloaddf128_mask">,
         Intrinsic<[llvm_v2f64_ty], [llvm_ptr_ty, llvm_v2f64_ty,
-                   llvm_i8_ty], [IntrReadArgMem]>;
+                   llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
 
   def int_x86_avx512_mask_expand_d_512 :
                              GCCBuiltin<"__builtin_ia32_expandsi512_mask">,
         Intrinsic<[llvm_v16i32_ty], [llvm_v16i32_ty, llvm_v16i32_ty,
                    llvm_i16_ty], [IntrNoMem]>;
   def int_x86_avx512_mask_expand_q_512 :
                              GCCBuiltin<"__builtin_ia32_expanddi512_mask">,
         Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_v8i64_ty,
// expand
   def int_x86_avx512_mask_expand_q_128 :
                              GCCBuiltin<"__builtin_ia32_expanddi128_mask">,
         Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty,
                    llvm_i8_ty], [IntrNoMem]>;
 
   def int_x86_avx512_mask_expand_load_d_512 :
                             GCCBuiltin<"__builtin_ia32_expandloadsi512_mask">,
         Intrinsic<[llvm_v16i32_ty], [llvm_ptr_ty, llvm_v16i32_ty,
-                   llvm_i16_ty], [IntrReadArgMem]>;
+                   llvm_i16_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_expand_load_q_512 :
                             GCCBuiltin<"__builtin_ia32_expandloaddi512_mask">,
         Intrinsic<[llvm_v8i64_ty], [llvm_ptr_ty, llvm_v8i64_ty,
-                   llvm_i8_ty], [IntrReadArgMem]>;
+                   llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_expand_load_d_256 :
                             GCCBuiltin<"__builtin_ia32_expandloadsi256_mask">,
         Intrinsic<[llvm_v8i32_ty], [llvm_ptr_ty, llvm_v8i32_ty,
-                   llvm_i8_ty], [IntrReadArgMem]>;
+                   llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_expand_load_q_256 :
                             GCCBuiltin<"__builtin_ia32_expandloaddi256_mask">,
         Intrinsic<[llvm_v4i64_ty], [llvm_ptr_ty, llvm_v4i64_ty,
-                   llvm_i8_ty], [IntrReadArgMem]>;
+                   llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_expand_load_d_128 :
                             GCCBuiltin<"__builtin_ia32_expandloadsi128_mask">,
         Intrinsic<[llvm_v4i32_ty], [llvm_ptr_ty, llvm_v4i32_ty,
-                   llvm_i8_ty], [IntrReadArgMem]>;
+                   llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
   def int_x86_avx512_mask_expand_load_q_128 :
                             GCCBuiltin<"__builtin_ia32_expandloaddi128_mask">,
         Intrinsic<[llvm_v2i64_ty], [llvm_ptr_ty, llvm_v2i64_ty,
-                   llvm_i8_ty], [IntrReadArgMem]>;
+                   llvm_i8_ty], [IntrReadMem, IntrArgMemOnly]>;
 
 }
 
 // truncate
 let TargetPrefix = "x86" in {
   def int_x86_avx512_mask_pmov_qb_128 :
           GCCBuiltin<"__builtin_ia32_pmovqb128_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v2i64_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_qb_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovqb128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_qb_128 :
           GCCBuiltin<"__builtin_ia32_pmovsqb128_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v2i64_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_qb_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovsqb128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_qb_128 :
           GCCBuiltin<"__builtin_ia32_pmovusqb128_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v2i64_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_qb_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovusqb128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmov_qb_256 :
           GCCBuiltin<"__builtin_ia32_pmovqb256_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v4i64_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_qb_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovqb256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_qb_256 :
           GCCBuiltin<"__builtin_ia32_pmovsqb256_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v4i64_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_qb_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovsqb256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_qb_256 :
           GCCBuiltin<"__builtin_ia32_pmovusqb256_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v4i64_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_qb_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovusqb256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmov_qb_512 :
           GCCBuiltin<"__builtin_ia32_pmovqb512_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v8i64_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_qb_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovqb512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_qb_512 :
           GCCBuiltin<"__builtin_ia32_pmovsqb512_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v8i64_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_qb_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovsqb512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_qb_512 :
           GCCBuiltin<"__builtin_ia32_pmovusqb512_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v8i64_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_qb_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovusqb512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmov_qw_128 :
           GCCBuiltin<"__builtin_ia32_pmovqw128_mask">,
           Intrinsic<[llvm_v8i16_ty],
                     [llvm_v2i64_ty, llvm_v8i16_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_qw_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovqw128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_qw_128 :
           GCCBuiltin<"__builtin_ia32_pmovsqw128_mask">,
           Intrinsic<[llvm_v8i16_ty],
                     [llvm_v2i64_ty, llvm_v8i16_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_qw_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovsqw128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_qw_128 :
           GCCBuiltin<"__builtin_ia32_pmovusqw128_mask">,
           Intrinsic<[llvm_v8i16_ty],
                     [llvm_v2i64_ty, llvm_v8i16_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_qw_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovusqw128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmov_qw_256 :
           GCCBuiltin<"__builtin_ia32_pmovqw256_mask">,
           Intrinsic<[llvm_v8i16_ty],
                     [llvm_v4i64_ty, llvm_v8i16_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_qw_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovqw256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_qw_256 :
           GCCBuiltin<"__builtin_ia32_pmovsqw256_mask">,
           Intrinsic<[llvm_v8i16_ty],
                     [llvm_v4i64_ty, llvm_v8i16_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_qw_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovsqw256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_qw_256 :
           GCCBuiltin<"__builtin_ia32_pmovusqw256_mask">,
           Intrinsic<[llvm_v8i16_ty],
                     [llvm_v4i64_ty, llvm_v8i16_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_qw_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovusqw256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmov_qw_512 :
           GCCBuiltin<"__builtin_ia32_pmovqw512_mask">,
           Intrinsic<[llvm_v8i16_ty],
                     [llvm_v8i64_ty, llvm_v8i16_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_qw_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovqw512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_qw_512 :
           GCCBuiltin<"__builtin_ia32_pmovsqw512_mask">,
           Intrinsic<[llvm_v8i16_ty],
                     [llvm_v8i64_ty, llvm_v8i16_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_qw_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovsqw512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_qw_512 :
           GCCBuiltin<"__builtin_ia32_pmovusqw512_mask">,
           Intrinsic<[llvm_v8i16_ty],
                     [llvm_v8i64_ty, llvm_v8i16_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_qw_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovusqw512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmov_qd_128 :
           GCCBuiltin<"__builtin_ia32_pmovqd128_mask">,
           Intrinsic<[llvm_v4i32_ty],
                     [llvm_v2i64_ty, llvm_v4i32_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_qd_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovqd128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_qd_128 :
           GCCBuiltin<"__builtin_ia32_pmovsqd128_mask">,
           Intrinsic<[llvm_v4i32_ty],
                     [llvm_v2i64_ty, llvm_v4i32_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_qd_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovsqd128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_qd_128 :
           GCCBuiltin<"__builtin_ia32_pmovusqd128_mask">,
           Intrinsic<[llvm_v4i32_ty],
                     [llvm_v2i64_ty, llvm_v4i32_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_qd_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovusqd128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v2i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmov_qd_256 :
           GCCBuiltin<"__builtin_ia32_pmovqd256_mask">,
           Intrinsic<[llvm_v4i32_ty],
                     [llvm_v4i64_ty, llvm_v4i32_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_qd_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovqd256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_qd_256 :
           GCCBuiltin<"__builtin_ia32_pmovsqd256_mask">,
           Intrinsic<[llvm_v4i32_ty],
                     [llvm_v4i64_ty, llvm_v4i32_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_qd_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovsqd256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_qd_256 :
           GCCBuiltin<"__builtin_ia32_pmovusqd256_mask">,
           Intrinsic<[llvm_v4i32_ty],
                     [llvm_v4i64_ty, llvm_v4i32_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_qd_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovusqd256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v4i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmov_qd_512 :
           GCCBuiltin<"__builtin_ia32_pmovqd512_mask">,
           Intrinsic<[llvm_v8i32_ty],
                     [llvm_v8i64_ty, llvm_v8i32_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_qd_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovqd512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_qd_512 :
           GCCBuiltin<"__builtin_ia32_pmovsqd512_mask">,
           Intrinsic<[llvm_v8i32_ty],
                     [llvm_v8i64_ty, llvm_v8i32_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_qd_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovsqd512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_qd_512 :
           GCCBuiltin<"__builtin_ia32_pmovusqd512_mask">,
           Intrinsic<[llvm_v8i32_ty],
                     [llvm_v8i64_ty, llvm_v8i32_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_qd_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovusqd512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i64_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmov_db_128 :
           GCCBuiltin<"__builtin_ia32_pmovdb128_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v4i32_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_db_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovdb128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_db_128 :
           GCCBuiltin<"__builtin_ia32_pmovsdb128_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v4i32_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_db_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovsdb128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_db_128 :
           GCCBuiltin<"__builtin_ia32_pmovusdb128_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v4i32_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_db_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovusdb128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmov_db_256 :
           GCCBuiltin<"__builtin_ia32_pmovdb256_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v8i32_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_db_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovdb256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_db_256 :
           GCCBuiltin<"__builtin_ia32_pmovsdb256_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v8i32_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_db_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovsdb256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_db_256 :
           GCCBuiltin<"__builtin_ia32_pmovusdb256_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v8i32_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_db_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovusdb256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmov_db_512 :
           GCCBuiltin<"__builtin_ia32_pmovdb512_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v16i32_ty, llvm_v16i8_ty, llvm_i16_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_db_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovdb512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v16i32_ty, llvm_i16_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_db_512 :
           GCCBuiltin<"__builtin_ia32_pmovsdb512_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v16i32_ty, llvm_v16i8_ty, llvm_i16_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_db_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovsdb512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v16i32_ty, llvm_i16_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_db_512 :
           GCCBuiltin<"__builtin_ia32_pmovusdb512_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v16i32_ty, llvm_v16i8_ty, llvm_i16_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_db_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovusdb512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v16i32_ty, llvm_i16_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmov_dw_128 :
           GCCBuiltin<"__builtin_ia32_pmovdw128_mask">,
           Intrinsic<[llvm_v8i16_ty],
                     [llvm_v4i32_ty, llvm_v8i16_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_dw_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovdw128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_dw_128 :
           GCCBuiltin<"__builtin_ia32_pmovsdw128_mask">,
           Intrinsic<[llvm_v8i16_ty],
                     [llvm_v4i32_ty, llvm_v8i16_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_dw_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovsdw128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_dw_128 :
           GCCBuiltin<"__builtin_ia32_pmovusdw128_mask">,
           Intrinsic<[llvm_v8i16_ty],
                     [llvm_v4i32_ty, llvm_v8i16_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_dw_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovusdw128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v4i32_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmov_dw_256 :
           GCCBuiltin<"__builtin_ia32_pmovdw256_mask">,
           Intrinsic<[llvm_v8i16_ty],
                     [llvm_v8i32_ty, llvm_v8i16_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_dw_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovdw256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_dw_256 :
           GCCBuiltin<"__builtin_ia32_pmovsdw256_mask">,
           Intrinsic<[llvm_v8i16_ty],
                     [llvm_v8i32_ty, llvm_v8i16_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_dw_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovsdw256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_dw_256 :
           GCCBuiltin<"__builtin_ia32_pmovusdw256_mask">,
           Intrinsic<[llvm_v8i16_ty],
                     [llvm_v8i32_ty, llvm_v8i16_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_dw_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovusdw256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i32_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmov_dw_512 :
           GCCBuiltin<"__builtin_ia32_pmovdw512_mask">,
           Intrinsic<[llvm_v16i16_ty],
                     [llvm_v16i32_ty, llvm_v16i16_ty, llvm_i16_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_dw_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovdw512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v16i32_ty, llvm_i16_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_dw_512 :
           GCCBuiltin<"__builtin_ia32_pmovsdw512_mask">,
           Intrinsic<[llvm_v16i16_ty],
                     [llvm_v16i32_ty, llvm_v16i16_ty, llvm_i16_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_dw_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovsdw512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v16i32_ty, llvm_i16_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_dw_512 :
           GCCBuiltin<"__builtin_ia32_pmovusdw512_mask">,
           Intrinsic<[llvm_v16i16_ty],
                     [llvm_v16i32_ty, llvm_v16i16_ty, llvm_i16_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_dw_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovusdw512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v16i32_ty, llvm_i16_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmov_wb_128 :
           GCCBuiltin<"__builtin_ia32_pmovwb128_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v8i16_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_wb_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovwb128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i16_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_wb_128 :
           GCCBuiltin<"__builtin_ia32_pmovswb128_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v8i16_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_wb_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovswb128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i16_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_wb_128 :
           GCCBuiltin<"__builtin_ia32_pmovuswb128_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v8i16_ty, llvm_v16i8_ty, llvm_i8_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_wb_mem_128 :
           GCCBuiltin<"__builtin_ia32_pmovuswb128mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v8i16_ty, llvm_i8_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmov_wb_256 :
           GCCBuiltin<"__builtin_ia32_pmovwb256_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v16i16_ty, llvm_v16i8_ty, llvm_i16_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_wb_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovwb256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v16i16_ty, llvm_i16_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_wb_256 :
           GCCBuiltin<"__builtin_ia32_pmovswb256_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v16i16_ty, llvm_v16i8_ty, llvm_i16_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_wb_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovswb256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v16i16_ty, llvm_i16_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_wb_256 :
           GCCBuiltin<"__builtin_ia32_pmovuswb256_mask">,
           Intrinsic<[llvm_v16i8_ty],
                     [llvm_v16i16_ty, llvm_v16i8_ty, llvm_i16_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_wb_mem_256 :
           GCCBuiltin<"__builtin_ia32_pmovuswb256mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v16i16_ty, llvm_i16_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmov_wb_512 :
           GCCBuiltin<"__builtin_ia32_pmovwb512_mask">,
           Intrinsic<[llvm_v32i8_ty],
                     [llvm_v32i16_ty, llvm_v32i8_ty, llvm_i32_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmov_wb_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovwb512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v32i16_ty, llvm_i32_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovs_wb_512 :
           GCCBuiltin<"__builtin_ia32_pmovswb512_mask">,
           Intrinsic<[llvm_v32i8_ty],
                     [llvm_v32i16_ty, llvm_v32i8_ty, llvm_i32_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovs_wb_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovswb512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v32i16_ty, llvm_i32_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
   def int_x86_avx512_mask_pmovus_wb_512 :
           GCCBuiltin<"__builtin_ia32_pmovuswb512_mask">,
           Intrinsic<[llvm_v32i8_ty],
                     [llvm_v32i16_ty, llvm_v32i8_ty, llvm_i32_ty],
                     [IntrNoMem]>;
   def int_x86_avx512_mask_pmovus_wb_mem_512 :
           GCCBuiltin<"__builtin_ia32_pmovuswb512mem_mask">,
           Intrinsic<[],
                     [llvm_ptr_ty, llvm_v32i16_ty, llvm_i32_ty],
-                    [IntrReadWriteArgMem]>;
+                    [IntrArgMemOnly]>;
 }
 
 // Bitwise ternary logic
 let TargetPrefix = "x86" in {
   def int_x86_avx512_mask_pternlog_d_128 :
           GCCBuiltin<"__builtin_ia32_pternlogd128_mask">,
           Intrinsic<[llvm_v4i32_ty],
                     [llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty, llvm_i32_ty,

llvm/trunk/lib/Target/AMDGPU/SIIntrinsics.td

def int_SI_buffer_load_dword : Intrinsic <
      llvm_anyint_ty,  // vaddr(VGPR)
      llvm_i32_ty,     // soffset(SGPR)
      llvm_i32_ty,     // inst_offset(imm)
      llvm_i32_ty,     // offen(imm)
      llvm_i32_ty,     // idxen(imm)
      llvm_i32_ty,     // glc(imm)
      llvm_i32_ty,     // slc(imm)
      llvm_i32_ty],    // tfe(imm)
-    [IntrReadArgMem]>;
+    [IntrReadMem, IntrArgMemOnly]>;
 
   def int_SI_sendmsg : Intrinsic <[], [llvm_i32_ty, llvm_i32_ty], []>;
 
   // Fully-flexible SAMPLE instruction.
   class SampleRaw : Intrinsic <
     [llvm_v4f32_ty],    // vdata(VGPR)
     [llvm_anyint_ty,    // vaddr(VGPR)
      llvm_v8i32_ty,     // rsrc(SGPR)

llvm/trunk/utils/TableGen/CodeGenIntrinsics.h

enum ModRefBits {
       /// The intrinsic may write memory.
       MR_Mod = 4,
 
       /// The intrinsic may both read and write memory.
       MR_ModRef = MR_Ref | MR_Mod,
     };
 
     /// Memory mod/ref behavior of this intrinsic, corresponding to
-    /// intrinsic properties (IntrReadMem, IntrReadArgMem, etc.).
+    /// intrinsic properties (IntrReadMem, IntrArgMemOnly, etc.).
     enum ModRefBehavior {
       NoMem = 0,
       ReadArgMem = MR_Ref,
       ReadMem = MR_Ref | MR_Anywhere,
       WriteArgMem = MR_Mod,
       WriteMem = MR_Mod | MR_Anywhere,
       ReadWriteArgMem = MR_ModRef,
       ReadWriteMem = MR_ModRef | MR_Anywhere,

llvm/trunk/utils/TableGen/CodeGenTarget.cpp

CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
   ListInit *PropList = R->getValueAsListInit("IntrProperties");
   for (unsigned i = 0, e = PropList->size(); i != e; ++i) {
     Record *Property = PropList->getElementAsRecord(i);
     assert(Property->isSubClassOf("IntrinsicProperty") &&
            "Expected a property!");
 
     if (Property->getName() == "IntrNoMem")
       ModRef = NoMem;
-    else if (Property->getName() == "IntrReadArgMem")
-      ModRef = ReadArgMem;
     else if (Property->getName() == "IntrReadMem")
-      ModRef = ReadMem;
+      ModRef = ModRefBehavior(ModRef & ~MR_Mod);
     else if (Property->getName() == "IntrWriteMem")
-      ModRef = WriteMem;
-    else if (Property->getName() == "IntrWriteArgMem")
-      ModRef = WriteArgMem;
-    else if (Property->getName() == "IntrReadWriteArgMem")
-      ModRef = ReadWriteArgMem;
+      ModRef = ModRefBehavior(ModRef & ~MR_Ref);
+    else if (Property->getName() == "IntrArgMemOnly")
+      ModRef = ModRefBehavior(ModRef & ~MR_Anywhere);
     else if (Property->getName() == "Commutative")
       isCommutative = true;
     else if (Property->getName() == "Throws")
       canThrow = true;
     else if (Property->getName() == "IntrNoDuplicate")
       isNoDuplicate = true;
     else if (Property->getName() == "IntrConvergent")
       isConvergent = true;