[mips][microMIPS] Delay slot filler modifications

[hvarga]

Summary

This patch skips delay slot filler optimization for microMIPSr6.

microMIPS32r6 and microMIPS64r6 do not have any instructions for which the delay slot is needed. But the current delay slot filler implementation doesn't care about this fact. This patch optimizes this by breaking out from the MIPS delay slot filler functionality if the CPU is microMIPSr6.

[dsanders]

LGTM

[petarj]

This patch implements the microMIPSr6 delay slot filler optimization

Nit: You may want to say "this patch skips delay slot filler optimization for microMIPSr6".

llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp

 /// runOnMachineBasicBlock - Fill in delay slots for the given basic block.
 /// We assume there is only one delay slot per delayed instruction.
 bool Filler::runOnMachineBasicBlock(MachineBasicBlock &MBB) {
   bool Changed = false;
   const MipsSubtarget &STI = MBB.getParent()->getSubtarget<MipsSubtarget>();
   bool InMicroMipsMode = STI.inMicroMipsMode();
   const MipsInstrInfo *TII = STI.getInstrInfo();
 
+  if (InMicroMipsMode && STI.hasMips32r6()) {
+    // This is microMIPS32r6 or microMIPS64r6 processor. Delay slot for
+    // branching instructions is not needed.
+    return Changed;
+  }
+
   for (Iter I = MBB.begin(); I != MBB.end(); ++I) {
     if (!hasUnoccupiedSlot(&*I))
       continue;
 
     ++FilledSlots;
     Changed = true;
 
     // Delay slot filling is disabled at -O0.

llvm/trunk/test/CodeGen/Mips/micromips-delay-slot.ll

 ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \
 ; RUN:   -relocation-model=static -O2 < %s | FileCheck %s
+; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=+micromips \
+; RUN:   -relocation-model=static -O2 < %s | FileCheck %s -check-prefix=CHECK-MMR6
 
 ; Function Attrs: nounwind
 define i32 @foo(i32 signext %a) #0 {
 entry:
   %a.addr = alloca i32, align 4
   store i32 %a, i32* %a.addr, align 4
   %0 = load i32, i32* %a.addr, align 4
   %shl = shl i32 %0, 2
   %call = call i32 @bar(i32 signext %shl)
   ret i32 %call
 }
 
 declare i32 @bar(i32 signext) #1
 
 ; CHECK:      jals
 ; CHECK-NEXT: sll16
+; CHECK-MMR6: jal
+; CHECK-MMR6-NOT: sll16