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Support floating point values in 128-bit SSE vector registers
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Authored by aprantl on Mar 4 2016, 2:41 PM.

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clayborg
Summary

The System-V x86_64 ABI requires floating point values to be passed in 128-but SSE vector registers (xmm0, ...).
When printing such a variable this currently yields an <invalid load address>.

This patch makes LLDB's DWARF expression evaluator accept 128-bit registers as scalars. It also relaxes the check that the size of the result of the DWARF expression be equal to the size of the variable to a greater-than. DWARF defers to the ABI how smaller values are being placed in a larger register.

Implementation note: I found the code in Value::SetContext() that changes the m_value_type after the fact to be questionable. I added a sanity check that the Value's memory buffer has indeed been written to (this is necessary, because we may have a scalar value in a vector register), but really I feel like this is the wrong place to be setting it.

rdar://problem/24944340

Diff Detail

Event Timeline

aprantl updated this revision to Diff 49855.Mar 4 2016, 2:41 PM
aprantl retitled this revision from to Support floating point values in 128-bit SSE vector registers.
aprantl updated this object.
aprantl added a reviewer: clayborg.
aprantl set the repository for this revision to rL LLVM.
aprantl added a subscriber: lldb-commits.
clayborg accepted this revision.Mar 8 2016, 10:21 AM
clayborg edited edge metadata.

Looks good.

This revision is now accepted and ready to land.Mar 8 2016, 10:21 AM
aprantl closed this revision.Mar 8 2016, 10:40 AM

Thanks!
Committed as r262947.