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[AMDGPU] Fix SMEM instructions encoding/operand namings
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Authored by vpykhtin on Feb 26 2016, 11:07 AM.

Details

Summary

rename sdata, dst -> sdst

SMEMe, SMEMe_vi encodings were split to SMEM_IMMe/SMEM_SOFFe and SMEM_IMMe_vi/SMEM_SOFFe_vi so that they have appropriate encoding field namings - "offset" for immediate and "soff" for SGPR. Having one encoding would require the same name "offset" for immediate and SGPR case, but we want to have it distinct.

S_MEMTIME instruction was fixed as it actually has sdst.

Diff Detail

Event Timeline

vpykhtin updated this revision to Diff 49212.Feb 26 2016, 11:07 AM
vpykhtin retitled this revision from to [AMDGPU] Fix SMRD instruction operand namings.
vpykhtin updated this object.
vpykhtin added reviewers: arsenm, tstellarAMD.
vpykhtin added a subscriber: nhaustov.

unfortunatelly testing failed as correct names produced more dissassembler operand decoders which are not in the trunk yet. Have to wait on my disassembler changes to be submitted.

arsenm added inline comments.Feb 29 2016, 11:03 AM
lib/Target/AMDGPU/SIInstrInfo.cpp
278 ↗(On Diff #49212)

This should be its own patch and have a testcase

arsenm added inline comments.Feb 29 2016, 11:10 AM
lib/Target/AMDGPU/SIInstrInfo.cpp
278 ↗(On Diff #49212)

Actually why is this happening? soffset should be a separate operand

vpykhtin updated this revision to Diff 50039.Mar 8 2016, 6:59 AM
vpykhtin retitled this revision from [AMDGPU] Fix SMRD instruction operand namings to [AMDGPU] Fix SMEM instructions encoding/operand namings.
vpykhtin updated this object.

My previous fix was incorrect, now encodings splitted, tests added.

vpykhtin added inline comments.Mar 8 2016, 7:03 AM
lib/Target/AMDGPU/SIInstrInfo.cpp
278 ↗(On Diff #49212)

Fixed.

arsenm accepted this revision.Mar 9 2016, 11:43 AM
arsenm edited edge metadata.

LGTM

This revision is now accepted and ready to land.Mar 9 2016, 11:43 AM
This revision was automatically updated to reflect the committed changes.