[Polly] [RFC] Fine-grain dependency analysis

[etherzhhb]

Summary

Build dependence information based on tagged access [1], e.g. for access:

MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
    [N] -> { Stmt_for_body[i0] -> MemRef_a[6 + i0] };

we build tag it and get:

• -> {[Stmt_for_body[i0] -> MemRef_a[]] -> MemRef_a[6 + i0] };

See the attach case for example.

TODO:
1. Introduce an option to disable/enable this feature
2. Unexpected Failures: 157

3. More testcases

4. Support tagging the access with the memory access and arrayid

[1] 5.3.4 Tagged Access Relations at https://lirias.kuleuven.be/bitstream/123456789/523109/3/polycomp-tutorial-v0.02.pdf

[etherzhhb]

lib/Analysis/DependenceInfo.cpp

79 ↗

(On Diff #48315)

Drop the output dimensions, otherwise we cannot calculate the dependency.

81–82 ↗

(On Diff #48315)

isl magic :)

287 ↗

(On Diff #48315)

ah ... this line is incorrect...

test/DependenceInfo/access_level_dep_simple_0.ll

4 ↗

(On Diff #48315)

Looks like we get both the access level dependency ([Stmt_for_body[i0] -> MemRef_a[]] -> [Stmt_for_body[4 + i0] -> MemRef_a[]] : 0 <= i0 <= -11 + N) and statement level dependence (Stmt_for_body[i0] -> Stmt_for_body[4 + i0] : 0 <= i0 <= -11 + N)

[llvm-commits]

Build dependence information based on tagged access [1], e.g. for access:

MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
    [N] -> { Stmt_for_body[i0] -> MemRef_b[6 + i0] };

we build tag it and get:

• -> {[Stmt_for_body[i0] -> MemRef_a[]] -> MemRef_b[6 + i0] };

Why does it say MemRef_a and then MemRef_b ?

• signature.asc219 BDownload
• msg-31894-385.txt162 BDownload

[etherzhhb]

In D17381#355679, @llvm-commits wrote:

Build dependence information based on tagged access [1], e.g. for access:

MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
    [N] -> { Stmt_for_body[i0] -> MemRef_b[6 + i0] };

we build tag it and get:

• -> {[Stmt_for_body[i0] -> MemRef_a[]] -> MemRef_b[6 + i0] };

Why does it say MemRef_a and then MemRef_b ?

• signature.asc219 BDownload
• msg-31894-385.txt162 BDownload

Updated

[etherzhhb]

test/DependenceInfo/access_level_dep_simple_0.ll

1 ↗

(On Diff #48315)

forgot the '-polly-dependences-analysis-type=value-based'

[etherzhhb]

lib/Analysis/DependenceInfo.cpp

287 ↗

(On Diff #48315)

ah ... this line is incorrect...

[grosser]

Very nice start. Here a first comment:

lib/Analysis/DependenceInfo.cpp

112 ↗

(On Diff #48315)

You probably want to use MA->getID() to obtain a unique tag for each MemoryAccess in a statement. Even though these isl_ids are unique (due to the pointer they reference), they all are called "__polly_array_ref". We should probably give them a unique name too.

[etherzhhb]

lib/Analysis/DependenceInfo.cpp

126 ↗

(On Diff #48331)

we can tag it with MA->getId() as well

305–309 ↗

(On Diff #48331)

Can we improve this if-else?

[etherzhhb]

lib/Analysis/DependenceInfo.cpp

125 ↗

(On Diff #48331)

why it call polly_array_ref instead of polly_memory_access?

[grosser]

Comments inline.

lib/Analysis/DependenceInfo.cpp

126 ↗

(On Diff #48331)

MA->getId() will allow you to distinguish two accesses in the same statement to the same array, but by a different instruction.

polly_array_ref is just a name. If polly_memory_access sounds better, we can easily change it.

305–309 ↗

(On Diff #48331)

Yes, see https://llvm.org/bugs/show_bug.cgi?id=26320 for a first description why the second code path is there. Johannes, who wrote this code, might be able to tell you better what would be needed to move reduction dependences to schedule trees.

[etherzhhb]

lib/Analysis/DependenceInfo.cpp

126 ↗

(On Diff #48331)

MA->getId() will allow you to distinguish two accesses in the same statement to the same array, but by a different instruction.

yes, we can actually have 3 analyses at 3 different levels.

[grosser]

Comments inline.

lib/Analysis/DependenceInfo.cpp

305–309 ↗

(On Diff #48331)

@ether. I just realized you are using the second code path for reference level dependence analysis. I would prefer to use the first code path. Dependence analysis on schedule trees can be significantly faster (we observed this) as the analysis can exploit the tree structure. This is why we moved to schedule trees in the first place.

[etherzhhb]

lib/Analysis/DependenceInfo.cpp

305–309 ↗

(On Diff #48331)

Ok, I will try to tag the schedule trees as well and remove the &&

[Meinersbur]

Sven mentioned `isl_union_flow_get_full_may_dependence`, which might be exactly what you need. From ISL documentation:

The relation returned by C<isl_union_flow_get_full_may_dependence>
relates domain elements of must or may sources to pairs of
domain elements of the sink and accessed data elements.
This relation includes the previous relation as a subset.

[etherzhhb]

In D17381#359649, @Meinersbur wrote:

Sven mentioned `isl_union_flow_get_full_may_dependence`, which might be exactly what you need. From ISL documentation:

The relation returned by C<isl_union_flow_get_full_may_dependence>
relates domain elements of must or may sources to pairs of
domain elements of the sink and accessed data elements.
This relation includes the previous relation as a subset.

Yes and No, I had tried that out.

C<isl_union_flow_get_full_may_dependence> return memory reference level dependence info, it cannot return the access level dependence info.

Also, Instead of fitting everything into the dependence analysis pass, which will make the dependence analysis too complicated. I may introduce my own analysis pass by customizing the dependency analysis pass.

[grosser]

Hi ether,

I do not think that there is a need to factor this into another pass. In fact, I think for the state we are currently at, the 'flag' solution works well as it shows what can be done and allows us to test the functionality. If we later need this functionality (simultaneously) in different passes, we can always refactor to make it easier accessible. From my point of view, this patch is good to go. However, I would suggest to add a reference-type test case.

Also, if you are interested to eliminate - based on this patch - the reduction dependence detection. This would be of great value.

Best,
Tobias

[etherzhhb]

Update testcase.

[grosser]

LGTM

polly/trunk/lib/Analysis/DependenceInfo.cpp

static cl::opt<enum AnalysisType> OptAnalysisType(
     cl::values(clEnumValN(VALUE_BASED_ANALYSIS, "value-based",
                           "Exact dependences without transitive dependences"),
                clEnumValN(MEMORY_BASED_ANALYSIS, "memory-based",
                           "Overapproximation of dependences"),
                clEnumValEnd),
     cl::Hidden, cl::init(VALUE_BASED_ANALYSIS), cl::ZeroOrMore,
     cl::cat(PollyCategory));
 
+enum AnalyisLevel {
+  STATEMENT_LEVEL_ANALYSIS = 0,
+  REFERENCE_LEVEL_ANALYSIS,
+  ACCESS_LEVEL_ANALYSIS
+};
+static cl::opt<enum AnalyisLevel> OptAnalysisLevel(
+    "polly-dependences-analysis-level",
+    cl::desc("The level of dependence analysis"),
+    cl::values(clEnumValN(STATEMENT_LEVEL_ANALYSIS, "statement-level",
+                          "Statement-level analysis"),
+               clEnumValN(REFERENCE_LEVEL_ANALYSIS, "reference-level",
+                          "Memory reference level analysis that distinguish"
+                          " accessed references in the same statement"),
+               clEnumValN(ACCESS_LEVEL_ANALYSIS, "access-level",
+                          "Memory reference level analysis that distinguish"
+                          " access instructions in the same statement"),
+               clEnumValEnd),
+    cl::Hidden, cl::init(STATEMENT_LEVEL_ANALYSIS), cl::ZeroOrMore,
+    cl::cat(PollyCategory));
+
 //===----------------------------------------------------------------------===//
 
+/// @brief Tag the @p Relation domain with @p TagId
+static __isl_give isl_map *tag(__isl_take isl_map *Relation,
+                               __isl_take isl_id *TagId) {
+  isl_space *Space = isl_map_get_space(Relation);
+  Space = isl_space_drop_dims(Space, isl_dim_out, 0, isl_map_n_out(Relation));
+  Space = isl_space_set_tuple_id(Space, isl_dim_out, TagId);
+  isl_multi_aff *Tag = isl_multi_aff_domain_map(Space);
+  Relation = isl_map_preimage_domain_multi_aff(Relation, Tag);
+  return Relation;
+}
+
+/// @brief Tag the @p Relation domain with either MA->getArrayId() or
+///        MA->getId() based on @p TagLevel
+static __isl_give isl_map *tag(__isl_take isl_map *Relation, MemoryAccess *MA,
+                               AnalyisLevel TagLevel) {
+  if (TagLevel == REFERENCE_LEVEL_ANALYSIS)
+    return tag(Relation, MA->getArrayId());
+
+  if (TagLevel == ACCESS_LEVEL_ANALYSIS)
+    return tag(Relation, MA->getId());
+
+  // No need to tag at the statement level.
+  return Relation;
+}
+
 /// @brief Collect information about the SCoP @p S.
 static void collectInfo(Scop &S, isl_union_map **Read, isl_union_map **Write,
                         isl_union_map **MayWrite,
                         isl_union_map **AccessSchedule,
                         isl_union_map **StmtSchedule) {
   isl_space *Space = S.getParamSpace();
   *Read = isl_union_map_empty(isl_space_copy(Space));
   *Write = isl_union_map_empty(isl_space_copy(Space));
for (MemoryAccess *MA : Stmt) {
         // but as we transformed the access domain we need the schedule
         // to match the new access domains, thus we need
         //   [Stmt[i0, i1] -> MemAcc_A[i0 + i1]] -> [0, i0, 2, i1, 0]
         isl_map *Schedule = Stmt.getSchedule();
         Schedule = isl_map_apply_domain(
             Schedule,
             isl_map_reverse(isl_map_domain_map(isl_map_copy(accdom))));
         accdom = isl_map_range_map(accdom);
+
         *AccessSchedule = isl_union_map_add_map(*AccessSchedule, Schedule);
+      } else {
+        accdom = tag(accdom, MA, OptAnalysisLevel);
+        if (OptAnalysisLevel > STATEMENT_LEVEL_ANALYSIS) {
+          isl_map *Schedule = tag(Stmt.getSchedule(), MA, OptAnalysisLevel);
+          *StmtSchedule = isl_union_map_add_map(*StmtSchedule, Schedule);
+        }
       }
 
       if (MA->isRead())
         *Read = isl_union_map_add_map(*Read, accdom);
       else
         *Write = isl_union_map_add_map(*Write, accdom);
     }
+
+    if (OptAnalysisLevel == STATEMENT_LEVEL_ANALYSIS)
       *StmtSchedule = isl_union_map_add_map(*StmtSchedule, Stmt.getSchedule());
   }
 
   *StmtSchedule =
       isl_union_map_intersect_params(*StmtSchedule, S.getAssumedContext());
 
   *Read = isl_union_map_coalesce(*Read);
   *Write = isl_union_map_coalesce(*Write);
   *MayWrite = isl_union_map_coalesce(*MayWrite);
static __isl_give isl_union_flow *buildFlow(__isl_keep isl_union_map *Snk,
                                             __isl_keep isl_schedule *Schedule) {
   isl_union_access_info *AI;
 
   AI = isl_union_access_info_from_sink(isl_union_map_copy(Snk));
   AI = isl_union_access_info_set_may_source(AI, isl_union_map_copy(MaySrc));
   if (Src)
     AI = isl_union_access_info_set_must_source(AI, isl_union_map_copy(Src));
   AI = isl_union_access_info_set_schedule(AI, isl_schedule_copy(Schedule));
-  return isl_union_access_info_compute_flow(AI);
+  auto Flow = isl_union_access_info_compute_flow(AI);
+  DEBUG(if (!Flow) dbgs() << "last error: "
+                          << isl_ctx_last_error(isl_schedule_get_ctx(Schedule))
+                          << '\n';);
+  return Flow;
 }
 
 void Dependences::calculateDependences(Scop &S) {
   isl_union_map *Read, *Write, *MayWrite, *AccessSchedule, *StmtSchedule;
   isl_schedule *Schedule;
 
   DEBUG(dbgs() << "Scop: \n" << S << "\n");
 
   collectInfo(S, &Read, &Write, &MayWrite, &AccessSchedule, &StmtSchedule);
 
+  DEBUG(dbgs() << "Read: " << Read << '\n';
+        dbgs() << "Write: " << Write << '\n';
+        dbgs() << "MayWrite: " << MayWrite << '\n';
+        dbgs() << "AccessSchedule: " << AccessSchedule << '\n';
+        dbgs() << "StmtSchedule: " << StmtSchedule << '\n';);
+
   if (isl_union_map_is_empty(AccessSchedule)) {
     isl_union_map_free(AccessSchedule);
     Schedule = S.getScheduleTree();
+    // Tag the schedule tree if we want fine-grain dependence info
+    if (OptAnalysisLevel > STATEMENT_LEVEL_ANALYSIS) {
+      auto TaggedDom = isl_union_map_domain((isl_union_map_copy(StmtSchedule)));
+      auto TaggedMap = isl_union_set_unwrap(TaggedDom);
+      auto Tags = isl_union_map_domain_map_union_pw_multi_aff(TaggedMap);
+      Schedule = isl_schedule_pullback_union_pw_multi_aff(Schedule, Tags);
+    }
   } else {
     auto *ScheduleMap =
         isl_union_map_union(AccessSchedule, isl_union_map_copy(StmtSchedule));
     Schedule = isl_schedule_from_domain(
         isl_union_map_domain(isl_union_map_copy(ScheduleMap)));
     if (!isl_union_map_is_empty(ScheduleMap)) {
       ScheduleMap = addZeroPaddingToSchedule(ScheduleMap);
       Schedule = isl_schedule_insert_partial_schedule(
           Schedule, isl_multi_union_pw_aff_from_union_map(ScheduleMap));
     } else {
       isl_union_map_free(ScheduleMap);
     }
   }
 
   long MaxOpsOld = isl_ctx_get_max_operations(IslCtx.get());
   if (OptComputeOut)
     isl_ctx_set_max_operations(IslCtx.get(), OptComputeOut);
   isl_options_set_on_error(IslCtx.get(), ISL_ON_ERROR_CONTINUE);
 
   DEBUG(dbgs() << "Read: " << Read << "\n";
         dbgs() << "Write: " << Write << "\n";
-        dbgs() << "MayWrite: " << MayWrite << "\n");
+        dbgs() << "MayWrite: " << MayWrite << "\n";
+        dbgs() << "Schedule: " << Schedule << "\n");
 
   RAW = WAW = WAR = RED = nullptr;
 
   if (OptAnalysisType == VALUE_BASED_ANALYSIS) {
     isl_union_flow *Flow;
 
     Flow = buildFlow(Read, Write, MayWrite, Schedule);
 

polly/trunk/test/DependenceInfo/fine_grain_dep_0.ll

+; RUN: opt %loadPolly -polly-dependences -polly-dependences-analysis-type=value-based -polly-dependences-analysis-level=reference-level -analyze < %s | FileCheck %s
+;
+; CHECK:      RAW dependences:
+; CHECK-NEXT:     [N] -> { [Stmt_for_body[i0] -> MemRef_a[]] -> [Stmt_for_body[4 + i0] -> MemRef_a[]] : 0 <= i0 <= -11 + N; [Stmt_for_body[i0] -> MemRef_b[]] -> [Stmt_for_body[6 + i0] -> MemRef_b[]] : 0 <= i0 <= -13 + N; Stmt_for_body[i0] -> Stmt_for_body[6 + i0] : 0 <= i0 <= -13 + N; Stmt_for_body[i0] -> Stmt_for_body[4 + i0] : 0 <= i0 <= -11 + N }
+; CHECK-NEXT: WAR dependences:
+; CHECK-NEXT:     {  }
+; CHECK-NEXT: WAW dependences:
+; CHECK-NEXT:     {  }
+; CHECK-NEXT: Reduction dependences:
+; CHECK-NEXT:     {  }
+;
+; void test(char a[], char b[], long N) {
+;   for (long i = 6; i < N; ++i) {
+;     a[i] = a[i - 4] + i;
+;     b[i] = b[i - 6] + i;
+;   }
+; }
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+; Function Attrs: nounwind uwtable
+define void @test(i8* %a, i8* %b, i64 %N) #0 {
+entry:
+  br label %for.cond
+
+for.cond:                                         ; preds = %for.inc, %entry
+  %i.0 = phi i64 [ 6, %entry ], [ %inc, %for.inc ]
+  %cmp = icmp slt i64 %i.0, %N
+  br i1 %cmp, label %for.body, label %for.end
+
+for.body:                                         ; preds = %for.cond
+  %sub = sub nsw i64 %i.0, 4
+  %arrayidx = getelementptr inbounds i8, i8* %a, i64 %sub
+  %0 = load i8, i8* %arrayidx, align 1
+  %conv = sext i8 %0 to i64
+  %add = add nsw i64 %conv, %i.0
+  %conv1 = trunc i64 %add to i8
+  %arrayidx2 = getelementptr inbounds i8, i8* %a, i64 %i.0
+  store i8 %conv1, i8* %arrayidx2, align 1
+  %sub3 = sub nsw i64 %i.0, 6
+  %arrayidx4 = getelementptr inbounds i8, i8* %b, i64 %sub3
+  %1 = load i8, i8* %arrayidx4, align 1
+  %conv5 = sext i8 %1 to i64
+  %add6 = add nsw i64 %conv5, %i.0
+  %conv7 = trunc i64 %add6 to i8
+  %arrayidx8 = getelementptr inbounds i8, i8* %b, i64 %i.0
+  store i8 %conv7, i8* %arrayidx8, align 1
+  br label %for.inc
+
+for.inc:                                          ; preds = %for.body
+  %inc = add nsw i64 %i.0, 1
+  br label %for.cond
+
+for.end:                                          ; preds = %for.cond
+  ret void
+}
+
+attributes #0 = { nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }
+
+!llvm.ident = !{!0}
+
+!0 = !{!"clang version 3.9.0 (http://llvm.org/git/clang.git 3d5d4c39659f11dfbe8e11c857cadf5c449b559b) (http://llvm.org/git/llvm.git 801561e2bba12f2aa0285feb1105e110df443761)"}

polly/trunk/test/DependenceInfo/reduction_complex_location.ll

 ; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s
+; RUN: opt %loadPolly -polly-dependences -polly-dependences-analysis-level=reference-level -analyze < %s | FileCheck %s
+; RUN: opt %loadPolly -polly-dependences -polly-dependences-analysis-level=access-level -analyze < %s | FileCheck %s
 ;
 ; CHECK:      RAW dependences:
 ; CHECK-NEXT:     {  }
 ; CHECK-NEXT: WAR dependences:
 ; CHECK-NEXT:     {  }
 ; CHECK-NEXT: WAW dependences:
 ; CHECK-NEXT:     {  }
 ; CHECK-NEXT: Reduction dependences:

polly/trunk/test/DependenceInfo/reduction_multiple_loops_array_sum.ll

 ; RUN: opt -basicaa %loadPolly -polly-dependences -analyze < %s | FileCheck %s
+; RUN: opt -basicaa %loadPolly -polly-dependences -polly-dependences-analysis-level=reference-level -analyze < %s | FileCheck %s
+; RUN: opt -basicaa %loadPolly -polly-dependences -polly-dependences-analysis-level=access-level -analyze < %s | FileCheck %s
 ;
 ; Verify that only the inner reduction like accesses cause reduction dependences
 ;
 ; CHECK:      Reduction dependences:
 ; CHECK-NEXT:     { Stmt_for_body3[i0, i1] -> Stmt_for_body3[i0, 1 + i1] : 0 <= i0 <= 99 and 0 <= i1 <= 98 }
 ;
 ; void f(int * restrict A, int * restrict sum) {
 ;   int i, j, k;

polly/trunk/test/DependenceInfo/sequential_loops.ll

 ; RUN: opt -S %loadPolly -basicaa -polly-dependences -analyze -polly-dependences-analysis-type=value-based < %s | FileCheck %s -check-prefix=VALUE
 ; RUN: opt -S %loadPolly -basicaa -polly-dependences -analyze -polly-dependences-analysis-type=memory-based < %s | FileCheck %s -check-prefix=MEMORY
+; RUN: opt -S %loadPolly -basicaa -polly-dependences -analyze -polly-dependences-analysis-type=value-based -polly-dependences-analysis-level=access-level < %s | FileCheck %s -check-prefix=VALUE_ACCESS
 
 ; VALUE-LABEL: Printing analysis 'Polly - Calculate dependences' for region: 'S1 => exit.3' in function 'sequential_writes':
 ; VALUE-NEXT:      RAW dependences:
 ; VALUE-NEXT:          {  }
 ; VALUE-NEXT:      WAR dependences:
 ; VALUE-NEXT:          {  }
 ; VALUE-NEXT:      WAW dependences:
 ; VALUE-NEXT:          { Stmt_S1[i0] -> Stmt_S2[i0] : 0 <= i0 <= 9; Stmt_S2[i0] -> Stmt_S3[i0] : 0 <= i0 <= 9; Stmt_S1[i0] -> Stmt_S3[i0] : 10 <= i0 <= 99 }
 ;
+;VALUE_ACCESS-LABEL: Printing analysis 'Polly - Calculate dependences' for region: 'S1 => exit.3' in function 'sequential_writes':
+;VALUE_ACCESS-NEXT:        RAW dependences:
+;VALUE_ACCESS-NEXT:                {  }
+;VALUE_ACCESS-NEXT:        WAR dependences:
+;VALUE_ACCESS-NEXT:                {  }
+;VALUE_ACCESS-NEXT:        WAW dependences:
+;VALUE_ACCESS-NEXT:                { Stmt_S1[i0] -> Stmt_S2[i0] : 0 <= i0 <= 9; [Stmt_S1[i0] -> Stmt_S1_Write0_MemRef_A[]] -> [Stmt_S3[i0] -> Stmt_S3_Write0_MemRef_A[]] : 10 <= i0 <= 99; Stmt_S2[i0] -> Stmt_S3[i0] : 0 <= i0 <= 9; [Stmt_S2[i0] -> Stmt_S2_Write0_MemRef_A[]] -> [Stmt_S3[i0] -> Stmt_S3_Write0_MemRef_A[]] : 0 <= i0 <= 9; [Stmt_S1[i0] -> Stmt_S1_Write0_MemRef_A[]] -> [Stmt_S2[i0] -> Stmt_S2_Write0_MemRef_A[]] : 0 <= i0 <= 9; Stmt_S1[i0] -> Stmt_S3[i0] : 10 <= i0 <= 99 }
+;
 ; VALUE-LABEL: Printing analysis 'Polly - Calculate dependences' for region: 'S1 => exit.3' in function 'read_after_writes':
 ; VALUE-NEXT:      RAW dependences:
 ; VALUE-NEXT:          { Stmt_S2[i0] -> Stmt_S3[i0] : 0 <= i0 <= 9; Stmt_S1[i0] -> Stmt_S3[i0] : 10 <= i0 <= 99 }
 ; VALUE-NEXT:      WAR dependences:
 ; VALUE-NEXT:          {  }
 ; VALUE-NEXT:      WAW dependences:
 ; VALUE-NEXT:          { Stmt_S1[i0] -> Stmt_S2[i0] : 0 <= i0 <= 9 }
 ;
+;VALUE_ACCESS-LABEL: Printing analysis 'Polly - Calculate dependences' for region: 'S1 => exit.3' in function 'read_after_writes':
+;VALUE_ACCESS-NEXT:        RAW dependences:
+;VALUE_ACCESS-NEXT:                { [Stmt_S1[i0] -> Stmt_S1_Write0_MemRef_A[]] -> [Stmt_S3[i0] -> Stmt_S3_Read0_MemRef_A[]] : 10 <= i0 <= 99; Stmt_S2[i0] -> Stmt_S3[i0] : 0 <= i0 <= 9; [Stmt_S2[i0] -> Stmt_S2_Write0_MemRef_A[]] -> [Stmt_S3[i0] -> Stmt_S3_Read0_MemRef_A[]] : 0 <= i0 <= 9; Stmt_S1[i0] -> Stmt_S3[i0] : 10 <= i0 <= 99 }
+;VALUE_ACCESS-NEXT:        WAR dependences:
+;VALUE_ACCESS-NEXT:                {  }
+;VALUE_ACCESS-NEXT:        WAW dependences:
+;VALUE_ACCESS-NEXT:                { Stmt_S1[i0] -> Stmt_S2[i0] : 0 <= i0 <= 9; [Stmt_S1[i0] -> Stmt_S1_Write0_MemRef_A[]] -> [Stmt_S2[i0] -> Stmt_S2_Write0_MemRef_A[]] : 0 <= i0 <= 9 }
+;
 ; VALUE-LABEL: Printing analysis 'Polly - Calculate dependences' for region: 'S1 => exit.3' in function 'write_after_read':
 ; VALUE-NEXT:      RAW dependences:
 ; VALUE-NEXT:          {  }
 ; VALUE-NEXT:      WAR dependences:
 ; VALUE-NEXT:          { Stmt_S1[i0] -> Stmt_S2[i0] : 0 <= i0 <= 9; Stmt_S1[i0] -> Stmt_S3[i0] : 10 <= i0 <= 99 }
 ; VALUE-NEXT:      WAW dependences:
 ; VALUE-NEXT:          { Stmt_S2[i0] -> Stmt_S3[i0] : 0 <= i0 <= 9 }
 ;
+;VALUE_ACCESS-LABEL: Printing analysis 'Polly - Calculate dependences' for region: 'S1 => exit.3' in function 'write_after_read':
+;VALUE_ACCESS-NEXT:         RAW dependences:
+;VALUE_ACCESS-NEXT:                 {  }
+;VALUE_ACCESS-NEXT:         WAR dependences:
+;VALUE_ACCESS-NEXT:                { Stmt_S1[i0] -> Stmt_S2[i0] : 0 <= i0 <= 9; [Stmt_S1[i0] -> Stmt_S1_Read0_MemRef_A[]] -> [Stmt_S2[i0] -> Stmt_S2_Write0_MemRef_A[]] : 0 <= i0 <= 9; [Stmt_S1[i0] -> Stmt_S1_Read0_MemRef_A[]] -> [Stmt_S3[i0] -> Stmt_S3_Write0_MemRef_A[]] : 10 <= i0 <= 99; Stmt_S1[i0] -> Stmt_S3[i0] : 10 <= i0 <= 99 }
+;VALUE_ACCESS-NEXT:         WAW dependences:
+;VALUE_ACCESS-NEXT:                { Stmt_S2[i0] -> Stmt_S3[i0] : 0 <= i0 <= 9; [Stmt_S2[i0] -> Stmt_S2_Write0_MemRef_A[]] -> [Stmt_S3[i0] -> Stmt_S3_Write0_MemRef_A[]] : 0 <= i0 <= 9 }
+;
 ; VALUE-LABEL: Printing analysis 'Polly - Calculate dependences' for region: 'S1 => exit.2' in function 'parametric_offset':
 ; VALUE-NEXT:      RAW dependences:
 ; VALUE-NEXT:          [p] -> { Stmt_S1[i0] -> Stmt_S2[-p + i0] : i0 >= p and 0 <= i0 <= 99 and i0 <= 9 + p }
 ; VALUE-NEXT:      WAR dependences:
 ; VALUE-NEXT:          [p] -> {  }
 ; VALUE-NEXT:      WAW dependences:
 ; VALUE-NEXT:          [p] -> {  }
+;
+;VALUE_ACCESS-LABEL: Printing analysis 'Polly - Calculate dependences' for region: 'S1 => exit.2' in function 'parametric_offset':
+;VALUE_ACCESS-NEXT:        RAW dependences:
+;VALUE_ACCESS-NEXT:                [p] -> { [Stmt_S1[i0] -> Stmt_S1_Write0_MemRef_A[]] -> [Stmt_S2[-p + i0] -> Stmt_S2_Read0_MemRef_A[]] : i0 >= p and 0 <= i0 <= 99 and i0 <= 9 + p; Stmt_S1[i0] -> Stmt_S2[-p + i0] : i0 >= p and 0 <= i0 <= 99 and i0 <= 9 + p }
+;VALUE_ACCESS-NEXT:        WAR dependences:
+;VALUE_ACCESS-NEXT:                [p] -> {  }
+;VALUE_ACCESS-NEXT:        WAW dependences:
+;VALUE_ACCESS-NEXT:                [p] -> {  }
 
 ; MEMORY-LABEL: Printing analysis 'Polly - Calculate dependences' for region: 'S1 => exit.3' in function 'sequential_writes':
 ; MEMORY-NEXT:      RAW dependences:
 ; MEMORY-NEXT:          {  }
 ; MEMORY-NEXT:      WAR dependences:
 ; MEMORY-NEXT:          {  }
 ; MEMORY-NEXT:      WAW dependences:
 ; MEMORY-NEXT:          { Stmt_S1[i0] -> Stmt_S2[i0] : 0 <= i0 <= 9; Stmt_S2[i0] -> Stmt_S3[i0] : 0 <= i0 <= 9; Stmt_S1[i0] -> Stmt_S3[i0] : 0 <= i0 <= 99 }