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Hi Geoff,
I'm not sure this is going to work. I think this sequence of events might break:
- During shrink-wrapping, canUseAsPrologue finds a callee-saved register and decides the block can be used.
- PrologueEpilogueInserter adds all callee-saved registers as live-ins to the candidate shrink-wrapped prologue and calls emitPrologue.
- emitPrologue asks for a callee-saved register again and is told there aren't any.
Tim.
Hi Geoff,
I believe Tim is right.
We want to restrict ourselves to the set of caller-saved registers to avoid that.
Cheers,
Q.
+Kit
Hi Kit,
I believe you have the same issue for the PPC backend as what Tim pointed out.
Could you double check?
Cheers,
-Quentin
FWIW, this patch is basically a cut and paste from the PPC code, with some simplification done since AArch64 doesn't need a scratch register in the epilog. I believe this same potential bug would be present for PPC currently as well.
Hi Tim,
I've uploaded a new revision that I believe addresses your concerns by avoiding using callee-save registers for the stack pointer re-alignment scratch register.
test/CodeGen/AArch64/arm64-shrink-wrapping.ll | ||
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645 ↗ | (On Diff #48358) | I know this is painful (I’ve done quite a few time already ;)), but could you add the DISABLE check and regular CHECK to minimize the ENABLE/DISABLE differences. |
672 ↗ | (On Diff #48358) | In this case, since both shrink-wrapped and non-shrink-wrapped tests are the same, you should use CHECK lines everywhere. |