This is an archive of the discontinued LLVM Phabricator instance.

AMDGPU/SI: Add llvm.amdgcn.mov.dpp intrinsic
ClosedPublic

Authored by tstellarAMD on Feb 11 2016, 11:57 AM.

Details

Summary

This intrinsic will be used to expose dpp functionality to higher-level
languages. It will map to the dpp version of v_mov_b32.

Diff Detail

Event Timeline

tstellarAMD retitled this revision from to AMDGPU/SI: Add llvm.amdgcn.mov.dpp intrinsic.
tstellarAMD updated this object.
tstellarAMD added reviewers: arsenm, nhaustov, cfang.
tstellarAMD added a subscriber: llvm-commits.
arsenm added inline comments.Feb 11 2016, 12:04 PM
include/llvm/IR/IntrinsicsAMDGPU.td
198–200

I was keeping VI only intrinsics somewhere near the bottom of the file. There should already be a VI only comment.

I've been meaning to clean this up to make it more obvious

201

Is this for i16/i32? I don't think there are any VOP2 i64 instructions

203

I think this needs to be convergent

Add convergent attribute.

tstellarAMD marked 2 inline comments as done.Feb 12 2016, 12:27 PM
tstellarAMD added inline comments.
include/llvm/IR/IntrinsicsAMDGPU.td
201

It's for i16/i32/i64, because it can be used for VOPC instructions as well as f64 instructions.

arsenm accepted this revision.Feb 12 2016, 12:38 PM
arsenm edited edge metadata.

LGTM with the test fixed

lib/Target/AMDGPU/VIInstructions.td
115–121

Is there a reason this needs to be a standalone pattern?

test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll
12–14

Attributes in test are wrong

This revision is now accepted and ready to land.Feb 12 2016, 12:38 PM
lib/Target/AMDGPU/VIInstructions.td
115–121

This is likely the only dpp pattern, so I didn't think it was worth it to modify the existing VOP1Inst class and related classes so they would be able to accept dpp patterns.