[MC] Use .p2align instead of .align

[sunfish]

Summary

For historic reasons, the behavior of .align differs between targets. Fortunately, there are alternatives, .p2align and .balign, which make the interpretation of the parameter explicit, and which behave consistently across targets.

This patch teaches MC to use .p2align instead of .align, so that people reading code for multiple architectures don't have to remember which way each platform does its .align directive.

[dschuff]

In general I like this a lot. But I fear there is probably some obscure assembler on some target somewhere that does not support .p2align. Maybe we need some kind of target hook to allow use of .align (either alongside getAlignmentIsInBytes() or perhaps replacing or subsuming it)? Or we could just propose/do this and let someone complain with a specific use case before doing that?

[majnemer]

This LGTM.

The only GAS configuration which doesn't support .p2align is Texas Instruments TMS320C54X. We do not support it so we could cross that bridge when we get there.

llvm/trunk/lib/MC/MCAsmStreamer.cpp

void MCAsmStreamer::EmitValueToAlignment(unsigned ByteAlignment, int64_t Value,
                                          unsigned MaxBytesToEmit) {
   // Some assemblers don't support non-power of two alignments, so we always
   // emit alignments as a power of two if possible.
   if (isPowerOf2_32(ByteAlignment)) {
     switch (ValueSize) {
     default:
       llvm_unreachable("Invalid size for machine code value!");
     case 1:
-      OS << "\t.align\t";
+      OS << "\t.p2align\t";
       break;
     case 2:
       OS << ".p2alignw ";
       break;
     case 4:
       OS << ".p2alignl ";
       break;
     case 8:
       llvm_unreachable("Unsupported alignment size!");
     }
 
-    if (MAI->getAlignmentIsInBytes())
-      OS << ByteAlignment;
-    else
-      OS << Log2_32(ByteAlignment);
 
     if (Value || MaxBytesToEmit) {
       OS << ", 0x";
       OS.write_hex(truncateToSize(Value, ValueSize));
 
       if (MaxBytesToEmit)
         OS << ", " << MaxBytesToEmit;
     }

llvm/trunk/test/CodeGen/AArch64/arm64-swizzle-tbl-i16-layout.ll

 ; RUN: llc < %s -mtriple=arm64-apple-ios7.0 | FileCheck %s
 ; rdar://13214163 - Make sure we generate a correct lookup table for the TBL
 ; instruction when the element size of the vector is not 8 bits. We were
 ; getting both the endianness wrong and the element indexing wrong.
 define <8 x i16> @foo(<8 x i16> %a) nounwind readnone {
 ; CHECK:  .section  __TEXT,__literal16,16byte_literals
-; CHECK:  .align  4
+; CHECK:  .p2align  4
 ; CHECK:lCPI0_0:
 ; CHECK:  .byte 0                       ; 0x0
 ; CHECK:  .byte 1                       ; 0x1
 ; CHECK:  .byte 0                       ; 0x0
 ; CHECK:  .byte 1                       ; 0x1
 ; CHECK:  .byte 0                       ; 0x0
 ; CHECK:  .byte 1                       ; 0x1
 ; CHECK:  .byte 0                       ; 0x0
 ; CHECK:  .byte 1                       ; 0x1
 ; CHECK:  .byte 8                       ; 0x8
 ; CHECK:  .byte 9                       ; 0x9
 ; CHECK:  .byte 8                       ; 0x8
 ; CHECK:  .byte 9                       ; 0x9
 ; CHECK:  .byte 8                       ; 0x8
 ; CHECK:  .byte 9                       ; 0x9
 ; CHECK:  .byte 8                       ; 0x8
 ; CHECK:  .byte 9                       ; 0x9
 ; CHECK:  .section __TEXT,__text,regular,pure_instructions
 ; CHECK:  .globl  _foo
-; CHECK:  .align  2
+; CHECK:  .p2align  2
 ; CHECK:_foo:                                   ; @foo
 ; CHECK:  adrp  [[BASE:x[0-9]+]], lCPI0_0@PAGE
 ; CHECK:  ldr q[[REG:[0-9]+]], {{\[}}[[BASE]], lCPI0_0@PAGEOFF]
 ; CHECK:  tbl.16b v0, { v0 }, v[[REG]]
 ; CHECK:  ret
 
   %val = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4>
   ret <8 x i16> %val
 }

llvm/trunk/test/CodeGen/AArch64/arm64-tls-dynamic-together.ll

; COMMON-LABEL: test_emulated_init:
   %val = load i32, i32* @emulated_init_var
   ret i32 %val
 
 ; EMU: adrp{{.+}}__emutls_v.emulated_init_var
 ; EMU: bl __emutls_get_address
 
 ; EMU-NOT: __emutls_v.general_dynamic_var:
 
-; EMU:      .align 3
+; EMU:      .p2align 3
 ; EMU-LABEL: __emutls_v.emulated_init_var:
 ; EMU-NEXT: .xword 4
 ; EMU-NEXT: .xword 8
 ; EMU-NEXT: .xword 0
 ; EMU-NEXT: .xword __emutls_t.emulated_init_var
 
 ; EMU-LABEL: __emutls_t.emulated_init_var:
 ; EMU-NEXT: .word 37
 }
 
 ; CHECK-NOT: __emutls_v.general_dynamic_var:
 ; EMU-NOT: __emutls_t.general_dynamic_var

llvm/trunk/test/CodeGen/AArch64/emutls.ll

 ; ARM64-NEXT: .xword 1
 ; ARM64-NEXT: .xword 0
 ; ARM64-NEXT: .xword 0
 
 ; ARM64-NOT:   __emutls_t.b1
 
 ; ARM64:      .section .data.__emutls_v._ZN1AIiE1xE,{{.*}},__emutls_v._ZN1AIiE1xE,comdat
 ; ARM64:      .weak __emutls_v._ZN1AIiE1xE
-; ARM64:      .align 3
+; ARM64:      .p2align 3
 ; ARM64-LABEL: __emutls_v._ZN1AIiE1xE:
 ; ARM64-NEXT: .xword 4
 ; ARM64-NEXT: .xword 4
 ; ARM64-NEXT: .xword 0
 ; ARM64-NEXT: .xword 0
 
 ; ARM64:      .section .data.__emutls_v._ZN1AIfE1xE,{{.*}},__emutls_v._ZN1AIfE1xE,comdat
 ; ARM64:      .weak __emutls_v._ZN1AIfE1xE
-; ARM64:      .align 3
+; ARM64:      .p2align 3
 ; ARM64-LABEL: __emutls_v._ZN1AIfE1xE:
 ; ARM64-NEXT: .xword 4
 ; ARM64-NEXT: .xword 4
 ; ARM64-NEXT: .xword 0
 ; ARM64-NEXT: .xword __emutls_t._ZN1AIfE1xE
 
 ; ARM64:      .section .rodata.__emutls_t._ZN1AIfE1xE,{{.*}},__emutls_t._ZN1AIfE1xE,comdat
 ; ARM64:      .weak __emutls_t._ZN1AIfE1xE
-; ARM64:      .align 2
+; ARM64:      .p2align 2
 ; ARM64-LABEL: __emutls_t._ZN1AIfE1xE:
 ; ARM64-NEXT: .word 0
 ; ARM64-NEXT: .size

llvm/trunk/test/CodeGen/AArch64/emutls_generic.ll

 ; ARM_64:      __emutls_get_address
 ; ARM_64-LABEL:  get_internal_y:
 ; ARM_64:      __emutls_v.internal_y
 ; ARM_64:      __emutls_get_address
 ; ARM_64-NOT:   __emutls_t.external_x
 ; ARM_64-NOT:   __emutls_v.external_x:
 ; ARM_64:        .data{{$}}
 ; ARM_64:        .globl __emutls_v.external_y
-; ARM_64:        .align 3
+; ARM_64:        .p2align 3
 ; ARM_64-LABEL:  __emutls_v.external_y:
 ; ARM_64-NEXT:   .xword 1
 ; ARM_64-NEXT:   .xword 2
 ; ARM_64-NEXT:   .xword 0
 ; ARM_64-NEXT:   .xword __emutls_t.external_y
 ; ARM_64-NOT:    __emutls_v.external_x:
 ; ARM_64:        .section .rodata,
 ; ARM_64-LABEL:  __emutls_t.external_y:
 ; ARM_64-NEXT:   .byte 7
 ; ARM_64:        .data{{$}}
 ; ARM_64-NOT:    .globl __emutls_v
-; ARM_64:        .align 3
+; ARM_64:        .p2align 3
 ; ARM_64-LABEL:  __emutls_v.internal_y:
 ; ARM_64-NEXT:   .xword 8
 ; ARM_64-NEXT:   .xword 16
 ; ARM_64-NEXT:   .xword 0
 ; ARM_64-NEXT:   .xword __emutls_t.internal_y
 ; ARM_64:        .section .rodata,
 ; ARM_64-LABEL:  __emutls_t.internal_y:
 ; ARM_64-NEXT:   .xword 9

llvm/trunk/test/CodeGen/AArch64/global-merge-3.ll

;CHECK-APPLE-IOS: add x9, x9, l__MergedGlobals.1@PAGEOFF
   %y3 = getelementptr inbounds [1000 x i32], [1000 x i32]* @y, i32 0, i64 3
   store i32 %a1, i32* %x3, align 4
   store i32 %a2, i32* %y3, align 4
   store i32 %a3, i32* @z, align 4
   ret void
 }
 
 ;CHECK: .type .L_MergedGlobals,@object // @_MergedGlobals
-;CHECK: .align  4
+;CHECK: .p2align  4
 ;CHECK: .L_MergedGlobals:
 ;CHECK: .size .L_MergedGlobals, 4004
 
 ;CHECK: .type .L_MergedGlobals.1,@object // @_MergedGlobals.1
 ;CHECK: .local  .L_MergedGlobals.1
 ;CHECK: .comm .L_MergedGlobals.1,4000,16
 
-;CHECK-APPLE-IOS: .align  4
+;CHECK-APPLE-IOS: .p2align  4
 ;CHECK-APPLE-IOS:  l__MergedGlobals:
 ;CHECK-APPLE-IOS: .long 1
 ;CHECK-APPLE-IOS: .space  4000
 
 ;CHECK-APPLE-IOS: .zerofill __DATA,__bss,l__MergedGlobals.1,4000,4
 
 ;CHECK: z = .L_MergedGlobals
 ;CHECK: .globl  x

llvm/trunk/test/CodeGen/AArch64/stackmap-liveness.ll

 ; CHECK-NEXT:   .short 0
 ; CHECK-NEXT:   .byte 0
 ; CHECK-NEXT:   .byte 8
 ; LiveOut Entry 1: SP
 ; CHECK-NEXT:   .short 31
 ; CHECK-NEXT:   .byte 0
 ; CHECK-NEXT:   .byte 8
 ; Align
-; CHECK-NEXT:   .align  3
+; CHECK-NEXT:   .p2align  3
   %1 = select i1 %c, i64 1, i64 2
   call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 32, i8* null, i32 0)
   ret i64 %1
 }
 
 declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...)
 

llvm/trunk/test/CodeGen/AMDGPU/elf.ll

 ; ELF: Symbol {
 ; ELF: Name: test
 ; ELF: Binding: Global
 
 ; CONFIG: .section .AMDGPU.config
 ; CONFIG-NEXT: .long   45096
 ; TYPICAL-NEXT: .long   0
 ; TONGA-NEXT: .long   576
-; CONFIG: .align 256
+; CONFIG: .p2align 8
 ; CONFIG: test:
 define void @test(i32 %p) #0 {
    %i = add i32 %p, 2
    %r = bitcast i32 %i to float
    call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %r, float %r, float %r, float %r)
    ret void
 }
 
 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
 
 attributes #0 = { "ShaderType"="0" } ; Pixel Shader

llvm/trunk/test/CodeGen/ARM/Windows/long-calls.ll

 ; RUN: llc -mtriple=thumbv7-windows -mcpu=cortex-a9 -mattr=+long-calls -o - %s \
 ; RUN:    | FileCheck %s
 
 declare arm_aapcs_vfpcc void @callee()
 
 define arm_aapcs_vfpcc void @caller() nounwind {
 entry:
   tail call void @callee()
   ret void
 }
 
 ; CHECK-LABEL: caller
 ; CHECK: ldr [[REG:r[0-9]+]], [[CPI:LCPI[_0-9]+]]
 ; CHECK: bx [[REG]]
-; CHECK: .align 2
+; CHECK: .p2align 2
 ; CHECK: [[CPI]]:
 ; CHECK: .long callee
 

llvm/trunk/test/CodeGen/ARM/align.ll

 ; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=ELF
 ; RUN: llc < %s -mtriple=arm-apple-darwin10 | FileCheck %s -check-prefix=DARWIN
 
 @a = global i1 true
 ; no alignment
 
 @b = global i8 1
 ; no alignment
 
 @c = global i16 2
-;ELF: .align 1
+;ELF: .p2align 1
 ;ELF: c:
-;DARWIN: .align 1
+;DARWIN: .p2align 1
 ;DARWIN: _c:
 
 @d = global i32 3
-;ELF: .align 2
+;ELF: .p2align 2
 ;ELF: d:
-;DARWIN: .align 2
+;DARWIN: .p2align 2
 ;DARWIN: _d:
 
 @e = global i64 4
-;ELF: .align 3
+;ELF: .p2align 3
 ;ELF: e
-;DARWIN: .align 3
+;DARWIN: .p2align 3
 ;DARWIN: _e:
 
 @f = global float 5.0
-;ELF: .align 2
+;ELF: .p2align 2
 ;ELF: f:
-;DARWIN: .align 2
+;DARWIN: .p2align 2
 ;DARWIN: _f:
 
 @g = global double 6.0
-;ELF: .align 3
+;ELF: .p2align 3
 ;ELF: g:
-;DARWIN: .align 3
+;DARWIN: .p2align 3
 ;DARWIN: _g:
 
 @bar = common global [75 x i8] zeroinitializer, align 128
 ;ELF: .comm bar,75,128
 ;DARWIN: .comm _bar,75,7

llvm/trunk/test/CodeGen/ARM/byval_load_align.ll

 ; RUN: llc < %s -mtriple thumbv7-apple-ios -O1 | FileCheck %s
 
 ; rdar://15144402
 ; Make sure we don't assume 4-byte alignment when loading from a byval argument
 ; with alignment of 2.
 ; CHECK: ldr r1, [r[[REG:[0-9]+]]]
 ; CHECK: ldr r2, [r[[REG]], #4]
 ; CHECK: ldr r3, [r[[REG]], #8]
 ; CHECK-NOT: ldm
-; CHECK: .align 1 @ @sID
+; CHECK: .p2align 1 @ @sID
 
 %struct.ModuleID = type { [32 x i8], [32 x i8], i16 }
 
 @sID = internal constant %struct.ModuleID { [32 x i8] c"TEST\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", [32 x i8] c"1.0\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", i16 23 }, align 2
 
 ; Function Attrs: nounwind ssp
 define void @Client() #0 {
 entry:

llvm/trunk/test/CodeGen/ARM/ehabi-handlerdata-nounwind.ll

lpad:
   tail call void @__cxa_end_catch()
   br label %try.cont
 
 try.cont:
   ret void
 }
 
 ; CHECK:   .globl test1
-; CHECK:   .align 2
+; CHECK:   .p2align 2
 ; CHECK:   .type test1,%function
 ; CHECK-LABEL: test1:
 ; CHECK:   .fnstart
 
 ; CHECK-NOT: .cantunwind
 
 ; CHECK:   .personality __gxx_personality_v0
 ; CHECK:   .handlerdata
-; CHECK:   .align 2
+; CHECK:   .p2align 2
 ; CHECK-LABEL: GCC_except_table0:
 ; CHECK-LABEL: .Lexception0:
 ; CHECK:   .byte 255                     @ @LPStart Encoding = omit
 ; CHECK:   .byte 0                       @ @TType Encoding = absptr
 ; CHECK:   .asciz
 ; CHECK:   .byte 3                       @ Call site Encoding = udata4
 ; CHECK:   .fnend

llvm/trunk/test/CodeGen/ARM/ehabi-handlerdata.ll

lpad:
   tail call void @__cxa_end_catch()
   br label %try.cont
 
 try.cont:
   ret void
 }
 
 ; CHECK:   .globl test1
-; CHECK:   .align 2
+; CHECK:   .p2align 2
 ; CHECK:   .type test1,%function
 ; CHECK-LABEL: test1:
 ; CHECK:   .fnstart
 ; CHECK:   .personality __gxx_personality_v0
 ; CHECK:   .handlerdata
-; CHECK:   .align 2
+; CHECK:   .p2align 2
 ; CHECK-LABEL: GCC_except_table0:
 ; CHECK-LABEL: .Lexception0:
 ; CHECK:   .byte 255                     @ @LPStart Encoding = omit
 ; CHECK:   .byte 0                       @ @TType Encoding = absptr
 ; CHECK:   .asciz
 ; CHECK:   .byte 3                       @ Call site Encoding = udata4
 ; CHECK:   .long
 ; CHECK:   .long
 ; CHECK:   .long
 ; CHECK:   .fnend

llvm/trunk/test/CodeGen/ARM/emutls_generic.ll

 ; ARM_32:        .long __emutls_v.external_y
 ; ARM_32-LABEL:  get_internal_y:
 ; ARM_32:        bl __emutls_get_address
 ; ARM_32:        .long __emutls_v.internal_y
 ; ARM_32-NOT:    __emutls_t.external_x
 ; ARM_32-NOT:    __emutls_v.external_x:
 ; ARM_32:        .data{{$}}
 ; ARM_32:        .globl __emutls_v.external_y
-; ARM_32:        .align 2
+; ARM_32:        .p2align 2
 ; ARM_32-LABEL:  __emutls_v.external_y:
 ; ARM_32-NEXT:   .long 1
 ; ARM_32-NEXT:   .long 2
 ; ARM_32-NEXT:   .long 0
 ; ARM_32-NEXT:   .long __emutls_t.external_y
 ; ARM_32:        .section .rodata,
 ; ARM_32-LABEL:  __emutls_t.external_y:
 ; ARM_32-NEXT:   .byte 7
 ; ARM_32:        .data{{$}}
 ; ARM_32-NOT:    .globl
-; ARM_32:        .align 2
+; ARM_32:        .p2align 2
 ; ARM_32-LABEL:  __emutls_v.internal_y:
 ; ARM_32-NEXT:   .long 8
 ; ARM_32-NEXT:   .long 16
 ; ARM_32-NEXT:   .long 0
 ; ARM_32-NEXT:   .long __emutls_t.internal_y
 ; ARM_32-LABEL:  __emutls_t.internal_y:
 ; ARM_32-NEXT:   .long 9
 ; ARM_32-NEXT:   .long 0

llvm/trunk/test/CodeGen/ARM/globals.ll

define i32 @test1() {
   ret i32 %tmp
 }
 
 ; DarwinStatic: _test1:
 ; DarwinStatic:   ldr r0, LCPI0_0
 ; DarwinStatic:         ldr r0, [r0]
 ; DarwinStatic:         bx lr
 
-; DarwinStatic:   .align  2
+; DarwinStatic:   .p2align  2
 ; DarwinStatic: LCPI0_0:
 ; DarwinStatic:   .long {{_G$}}
 
 
 ; DarwinDynamic: _test1:
 ; DarwinDynamic:  ldr r0, LCPI0_0
 ; DarwinDynamic:        ldr r0, [r0]
 ; DarwinDynamic:        ldr r0, [r0]
 ; DarwinDynamic:        bx lr
 
-; DarwinDynamic:  .align  2
+; DarwinDynamic:  .p2align  2
 ; DarwinDynamic:  LCPI0_0:
 ; DarwinDynamic:  .long L_G$non_lazy_ptr
 
 ; DarwinDynamic:  .section __DATA,__nl_symbol_ptr,non_lazy_symbol_pointers
-; DarwinDynamic:  .align  2
+; DarwinDynamic:  .p2align  2
 ; DarwinDynamic: L_G$non_lazy_ptr:
 ; DarwinDynamic:  .indirect_symbol _G
 ; DarwinDynamic:  .long 0
 
 
 
 ; DarwinPIC: _test1:
 ; DarwinPIC:  ldr r0, LCPI0_0
 ; DarwinPIC: LPC0_0:
 ; DarwinPIC:    ldr r0, [pc, r0]
 ; DarwinPIC:    ldr r0, [r0]
 ; DarwinPIC-NOT: ldr
 ; DarwinPIC:    bx lr
 
-; DarwinPIC:  .align  2
+; DarwinPIC:  .p2align  2
 ; DarwinPIC: LCPI0_0:
 ; DarwinPIC:  .long L_G$non_lazy_ptr-(LPC0_0+8)
 
 ; DarwinPIC:  .section __DATA,__nl_symbol_ptr,non_lazy_symbol_pointers
-; DarwinPIC:  .align  2
+; DarwinPIC:  .p2align  2
 ; DarwinPIC: L_G$non_lazy_ptr:
 ; DarwinPIC:  .indirect_symbol _G
 ; DarwinPIC:  .long 0
 
 
 
 ; LinuxPIC-LABEL: test1:
 ; LinuxPIC:   ldr r0, .LCPI0_0
   
 ; LinuxPIC: .LPC0_0:
 ; LinuxPIC:   ldr r0, [pc, r0]
 ; LinuxPIC:   ldr r0, [r0]
 ; LinuxPIC:   bx lr
 
-; LinuxPIC: .align 2
+; LinuxPIC: .p2align 2
 ; LinuxPIC: .LCPI0_0:
 ; LinuxPIC: .Ltmp0:
 ; LinuxPIC:     .long   G(GOT_PREL)-((.LPC0_0+8)-.Ltmp0)

llvm/trunk/test/CodeGen/ARM/memfunc.ll

entry:
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @arr5, i32 0, i32 0), i32 %n, i32 1, i1 false)
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @arr6, i32 0, i32 0), i32 %n, i32 1, i1 false)
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @arr7, i32 0, i32 0), i32 %n, i32 1, i1 false)
 
   unreachable
 }
 
 ; CHECK: {{\.data|\.section.+data}}
-; CHECK-NOT: .align
+; CHECK-NOT: .p2align
 ; CHECK: arr1:
-; CHECK-IOS: .align 3
-; CHECK-DARWIN: .align 2
-; CHECK-EABI-NOT: .align
-; CHECK-GNUEABI-NOT: .align
+; CHECK-IOS: .p2align 3
+; CHECK-DARWIN: .p2align 2
+; CHECK-EABI-NOT: .p2align
+; CHECK-GNUEABI-NOT: .p2align
 ; CHECK: arr2:
 ; CHECK: {{\.section.+foo,bar}}
-; CHECK-NOT: .align
+; CHECK-NOT: .p2align
 ; CHECK: arr3:
-; CHECK-NOT: .align
+; CHECK-NOT: .p2align
 ; CHECK: arr4:
 ; CHECK: {{\.data|\.section.+data}}
-; CHECK-NOT: .align
+; CHECK-NOT: .p2align
 ; CHECK: arr5:
-; CHECK-NOT: .align
+; CHECK-NOT: .p2align
 ; CHECK: arr6:
 ; CHECK-NOT: arr7:
 
 declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind

llvm/trunk/test/CodeGen/ARM/preferred-align.ll

 ; RUN: llc -mtriple=armv7-linux-gnueabi %s -o - | FileCheck %s
 
 @var_agg = global {i8, i8} zeroinitializer
 
 ; CHECK: .globl var_agg
-; CHECK-NEXT: .align 2
+; CHECK-NEXT: .p2align 2
 
 @var1 = global i1 zeroinitializer
 
 ; CHECK: .globl var1
-; CHECK-NOT: .align
+; CHECK-NOT: .p2align
 
 @var8 = global i8 zeroinitializer
 
 ; CHECK: .globl var8
-; CHECK-NOT: .align
+; CHECK-NOT: .p2align
 
 @var16 = global i16 zeroinitializer
 
 ; CHECK: .globl var16
-; CHECK-NEXT: .align 1
+; CHECK-NEXT: .p2align 1
 No newline at end of file

llvm/trunk/test/CodeGen/ARM/thumb-alignment.ll

 ; RUN: llc -relocation-model=pic -mtriple=thumbv7-unknown-linux -o - %s | FileCheck %s
 
 @x = external global i32
 
 ; CHECK: .globl foo
-; CHECK-NEXT: .align  2
+; CHECK-NEXT: .p2align  2
 define i32* @foo() {
   ret i32* @x
 }
 
 ; CHECK: .globl bar
-; CHECK-NEXT: .align  1
+; CHECK-NEXT: .p2align  1
 define i32* @bar() {
   ret i32* zeroinitializer
 }
 
 @a = external global i32
 @b = external global i32
 @c = external global i32
 @d = external global i32
 
 ; Create a Thumb-2 jump table, which should force alignment to 4 bytes.
 
 ; CHECK: .globl baz
-; CHECK-NEXT: .align  2
+; CHECK-NEXT: .p2align  2
 ; CHECK: tbb
 define i32 @baz() {
   %1 = load i32, i32* @c, align 4
   switch i32 %1, label %7 [
     i32 1, label %2
     i32 4, label %5
     i32 9, label %5
     i32 3, label %8

llvm/trunk/test/CodeGen/ARM/tls-models.ll

 
 ; ----- emulated specified -----
 
 ; External declaration has no initializer.
 ; Internal definition has initializer.
 
 ; EMU-NOT:   __emutls_t.external_gd
 ; EMU-NOT:   __emutls_v.external_gd
-; EMU:       .align 2
+; EMU:       .p2align 2
 ; EMU-LABEL: __emutls_v.internal_gd:
 ; EMU-NEXT:  .long 4
 ; EMU-NEXT:  .long 4
 ; EMU-NEXT:  .long 0
 ; EMU-NEXT:  .long __emutls_t.internal_gd
 ; EMU-LABEL: __emutls_t.internal_gd:
 ; EMU-NEXT:  .long 42
 ; EMU-NOT:   __emutls_t.external_gd
 
 ; __emutls_t and __emutls_v are the same for PIC and non-PIC modes.
 
 ; EMU-NOT:   __emutls_t.external_gd
 ; EMU-NOT:   __emutls_v.external_gd
-; EMU:       .align 2
+; EMU:       .p2align 2
 ; EMU-LABEL: __emutls_v.internal_le:
 ; EMU-NEXT:  .long 4
 ; EMU-NEXT:  .long 4
 ; EMU-NEXT:  .long 0
 ; EMU-NEXT:  .long __emutls_t.internal_le
 ; EMU-LABEL: __emutls_t.internal_le:
 ; EMU-NEXT:  .long 42
 ; EMU-NOT:   __emutls_t.external_le

llvm/trunk/test/CodeGen/ARM/tls3.ll

 ; NOEMU-NOT:   __emutls_get_address
 
 ; NOEMU:       .section .tbss
 ; NOEMU-LABEL: teste:
 ; NOEMU-NEXT:  .zero 8
 
 ; CHECK-NOT: __emutls_t.teste
 
-; EMU:       .align 2
+; EMU:       .p2align 2
 ; EMU-LABEL: __emutls_v.teste:
 ; EMU-NEXT:  .long 8
 ; EMU-NEXT:  .long 4
 ; EMU-NEXT:  .long 0
 ; EMU-NEXT:  .long 0
 
 ; CHECK-NOT: teste:
 ; CHECK-NOT: __emutls_t.teste

llvm/trunk/test/CodeGen/Mips/2010-07-20-Switch.ll

 
 bb4:                                              ; preds = %entry
   ret i32 4
 
 bb5:                                              ; preds = %entry
   ret i32 1
 }
 
-; STATIC-O32: .align  2
+; STATIC-O32: .p2align  2
 ; STATIC-O32: $JTI0_0:
 ; STATIC-O32: .4byte
 ; STATIC-O32: .4byte
 ; STATIC-O32: .4byte
 ; STATIC-O32: .4byte
-; PIC-O32: .align  2
+; PIC-O32: .p2align  2
 ; PIC-O32: $JTI0_0:
 ; PIC-O32: .gpword
 ; PIC-O32: .gpword
 ; PIC-O32: .gpword 
 ; PIC-O32: .gpword 
-; N64: .align  3
+; N64: .p2align  3
 ; N64: $JTI0_0:
 ; N64: .gpdword
 ; N64: .gpdword
 ; N64: .gpdword 
 ; N64: .gpdword 
 

llvm/trunk/test/CodeGen/Mips/cconv/memory-layout.ll

 @byte = global i8 1, align 1
 @halfword = global i16 258, align 1
 @word = global i32 16909060, align 1
 @float = global float 1.0, align 1
 @dword = global i64 283686952306183, align 1
 @double = global double 1.0, align 1
 @pointer = global i8* @byte
 
-; ALL-NOT:       .align
+; ALL-NOT:       .p2align
 ; ALL-LABEL: byte:
 ; ALL:           .byte 1
 ; ALL:           .size byte, 1
 
-; ALL:           .align 1
+; ALL:           .p2align 1
 ; ALL-LABEL: halfword:
 ; ALL:           .2byte 258
 ; ALL:           .size halfword, 2
 
-; ALL:           .align 2
+; ALL:           .p2align 2
 ; ALL-LABEL: word:
 ; ALL:           .4byte 16909060
 ; ALL:           .size word, 4
 
-; ALL:           .align 2
+; ALL:           .p2align 2
 ; ALL-LABEL: float:
 ; ALL:           .4byte 1065353216
 ; ALL:           .size float, 4
 
-; ALL:           .align 3
+; ALL:           .p2align 3
 ; ALL-LABEL: dword:
 ; ALL:           .8byte 283686952306183
 ; ALL:           .size dword, 8
 
-; ALL:           .align 3
+; ALL:           .p2align 3
 ; ALL-LABEL: double:
 ; ALL:           .8byte 4607182418800017408
 ; ALL:           .size double, 8
 
-; O32:           .align 2
-; N32:           .align 2
-; N64:           .align 3
+; O32:           .p2align 2
+; N32:           .p2align 2
+; N64:           .p2align 3
 ; ALL-LABEL: pointer:
 ; O32:           .4byte byte
 ; O32:           .size pointer, 4
 ; N32:           .4byte byte
 ; N32:           .size pointer, 4
 ; N64:           .8byte byte
 ; N64:           .size pointer, 8
 
 @byte_array = global [2 x i8] [i8 1, i8 2], align 1
 @halfword_array = global [2 x i16] [i16 1, i16 2], align 1
 @word_array = global [2 x i32] [i32 1, i32 2], align 1
 @float_array = global [2 x float] [float 1.0, float 2.0], align 1
 @dword_array = global [2 x i64] [i64 1, i64 2], align 1
 @double_array = global [2 x double] [double 1.0, double 2.0], align 1
 @pointer_array = global [2 x i8*] [i8* @byte, i8* @byte]
 
-; ALL-NOT:       .align
+; ALL-NOT:       .p2align
 ; ALL-LABEL: byte_array:
 ; ALL:           .ascii "\001\002"
 ; ALL:           .size byte_array, 2
 
-; ALL:           .align 1
+; ALL:           .p2align 1
 ; ALL-LABEL: halfword_array:
 ; ALL:           .2byte 1
 ; ALL:           .2byte 2
 ; ALL:           .size halfword_array, 4
 
-; ALL:           .align 2
+; ALL:           .p2align 2
 ; ALL-LABEL: word_array:
 ; ALL:           .4byte 1
 ; ALL:           .4byte 2
 ; ALL:           .size word_array, 8
 
-; ALL:           .align 2
+; ALL:           .p2align 2
 ; ALL-LABEL: float_array:
 ; ALL:           .4byte 1065353216
 ; ALL:           .4byte 1073741824
 ; ALL:           .size float_array, 8
 
-; ALL:           .align 3
+; ALL:           .p2align 3
 ; ALL-LABEL: dword_array:
 ; ALL:           .8byte 1
 ; ALL:           .8byte 2
 ; ALL:           .size dword_array, 16
 
-; ALL:           .align 3
+; ALL:           .p2align 3
 ; ALL-LABEL: double_array:
 ; ALL:           .8byte 4607182418800017408
 ; ALL:           .8byte 4611686018427387904
 ; ALL:           .size double_array, 16
 
-; O32:           .align 2
-; N32:           .align 2
-; N64:           .align 3
+; O32:           .p2align 2
+; N32:           .p2align 2
+; N64:           .p2align 3
 ; ALL-LABEL: pointer_array:
 ; O32:           .4byte byte
 ; O32:           .4byte byte
 ; O32:           .size pointer_array, 8
 ; N32:           .4byte byte
 ; N32:           .4byte byte
 ; N32:           .size pointer_array, 8
 ; N64:           .8byte byte
 ; N64:           .8byte byte
 ; N64:           .size pointer_array, 16
 
 %mixed = type { i8, double, i16 }
 @mixed = global %mixed { i8 1, double 1.0, i16 515 }, align 1
 
-; ALL:           .align 3
+; ALL:           .p2align 3
 ; ALL-LABEL: mixed:
 ; ALL:           .byte 1
 ; ALL:           .space 7
 ; ALL:           .8byte 4607182418800017408
 ; ALL:           .2byte 515
 ; ALL:           .space 6
 ; ALL:           .size mixed, 24
 
 ; Bitfields are not available in LLVM IR so we can't test them here.

llvm/trunk/test/CodeGen/Mips/const4a.ll

entry:
   store i32 -559023410, i32* @i, align 4
   %0 = load i32, i32* @b, align 4
 ; no-load-relax:  lw  ${{[0-9]+}}, $CPI0_1  # 16 bit inst
   %tobool = icmp ne i32 %0, 0
   br i1 %tobool, label %if.then, label %if.else
 ; no-load-relax:  beqz  ${{[0-9]+}}, $BB0_3
 ; no-load-relax:  lw  ${{[0-9]+}}, %call16(foo)(${{[0-9]+}})
 ; no-load-relax:  b $BB0_4
-; no-load-relax:  .align  2
+; no-load-relax:  .p2align  2
 ; no-load-relax: $CPI0_1:
 ; no-load-relax:  .4byte  3735943886
 ; no-load-relax: $BB0_3:
 ; no-load-relax:  lw  ${{[0-9]+}}, %call16(goo)(${{[0-9]+}})
 if.then:                                          ; preds = %entry
   call void bitcast (void (...)* @foo to void ()*)()
   br label %if.end
 

llvm/trunk/test/CodeGen/Mips/const6.ll

 @b = common global i32 0, align 4
 
 ; Function Attrs: nounwind
 define void @t() #0 {
 entry:
   store i32 -559023410, i32* @i, align 4
 ; load-relax:   lw  ${{[0-9]+}}, $CPI0_0
 ; load-relax: jrc  $ra
-; load-relax: .align  2
+; load-relax: .p2align  2
 ; load-relax: $CPI0_0:
 ; load-relax: .4byte  3735943886
 ; load-relax: .end  t
 
 ; no-load-relax: lw ${{[0-9]+}}, $CPI0_1  # 16 bit inst
 ; no-load-relax:  jalrc   ${{[0-9]+}}
 ; no-load-relax:  b $BB0_2
-; no-load-relax:  .align  2
+; no-load-relax:  .p2align  2
 ; no-load-relax: $CPI0_1:
 ; no-load-relax:  .4byte  3735943886
 ; no-load-relax: $BB0_2:
 
   call void bitcast (void (...)* @hoo to void ()*)()
   call void bitcast (void (...)* @hoo to void ()*)()
   call void bitcast (void (...)* @hoo to void ()*)()
   call void bitcast (void (...)* @hoo to void ()*)()

llvm/trunk/test/CodeGen/Mips/const6a.ll

 
 ; Function Attrs: nounwind
 define void @t() #0 {
 entry:
   store i32 -559023410, i32* @i, align 4
 ; load-relax-NOT:   lw  ${{[0-9]+}}, $CPI0_0 # 16 bit inst
 ; load-relax1: lw ${{[0-9]+}}, $CPI0_0
 ; load-relax: jrc  $ra
-; load-relax: .align  2
+; load-relax: .p2align  2
 ; load-relax: $CPI0_0:
 ; load-relax: .4byte  3735943886
 ; load-relax: .end  t
   call void asm sideeffect ".space 10000", ""() #1, !srcloc !1
   ret void
 }
 
 attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" }
 attributes #1 = { nounwind }
 
 !1 = !{i32 121}

llvm/trunk/test/CodeGen/Mips/ehframe-indirect.ll

 ; ALL: .4byte ($_ZTISt9exception.DW.stub)-($[[PC_LABEL]])
 ; ALL: $_ZTISt9exception.DW.stub:
 ; O32: .4byte _ZTISt9exception
 ; N32: .4byte _ZTISt9exception
 ; N64: .8byte _ZTISt9exception
 ; ALL: .hidden DW.ref.__gxx_personality_v0
 ; ALL: .weak DW.ref.__gxx_personality_v0
 ; ALL: .section .data.DW.ref.__gxx_personality_v0,"aGw",@progbits,DW.ref.__gxx_personality_v0,comdat
-; O32: .align 2
-; N32: .align 2
-; N64: .align 3
+; O32: .p2align 2
+; N32: .p2align 2
+; N64: .p2align 3
 ; ALL: .type DW.ref.__gxx_personality_v0,@object
 ; O32: .size DW.ref.__gxx_personality_v0, 4
 ; N32: .size DW.ref.__gxx_personality_v0, 4
 ; N64: .size DW.ref.__gxx_personality_v0, 8
 ; ALL: DW.ref.__gxx_personality_v0:
 ; O32: .4byte __gxx_personality_v0
 ; N32: .4byte __gxx_personality_v0
 ; N64: .8byte __gxx_personality_v0

llvm/trunk/test/CodeGen/Mips/emutls_generic.ll

 
 ; MIPS_32-LABEL: get_external_y:
 ; MIPS_32-LABEL: get_internal_y:
 ; MIPS_32:     lw {{.+}}(__emutls_v.internal_y
 ; MIPS_32:     lw {{.+}}call16(__emutls_get_address
 ; MIPS_32-NOT:  __emutls_t.external_x
 ; MIPS_32-NOT:  __emutls_v.external_x:
 ; MIPS_32:       .data
-; MIPS_32:       .align 2
+; MIPS_32:       .p2align 2
 ; MIPS_32-LABEL: __emutls_v.external_y:
 ; MIPS_32:       .section .rodata,
 ; MIPS_32-LABEL: __emutls_t.external_y:
 ; MIPS_32-NEXT:  .byte 7
 ; MIPS_32:       .data
-; MIPS_32:       .align 2
+; MIPS_32:       .p2align 2
 ; MIPS_32-LABEL: __emutls_v.internal_y:
 ; MIPS_32-NEXT:  .4byte 8
 ; MIPS_32-NEXT:  .4byte 16
 ; MIPS_32-NEXT:  .4byte 0
 ; MIPS_32-NEXT:  .4byte __emutls_t.internal_y
 ; MIPS_32-LABEL: __emutls_t.internal_y:
 ; MIPS_32-NEXT:  .8byte 9
 
 ; MIPS_64-LABEL: get_external_x:
 ; MIPS_64-LABEL: get_external_y:
 ; MIPS_64-LABEL: get_internal_y:
 ; MIPS_64:     ld {{.+}}(__emutls_v.internal_y
 ; MIPS_64:     ld {{.+}}call16(__emutls_get_address
 ; MIPS_64-NOT:  __emutls_t.external_x
 ; MIPS_64-NOT:  __emutls_v.external_x:
 ; MIPS_64-LABEL: __emutls_v.external_y:
 ; MIPS_64-NOT:   __emutls_v.external_x:
 ; MIPS_64:       .section .rodata,
 ; MIPS_64-LABEL: __emutls_t.external_y:
 ; MIPS_64-NEXT:  .byte 7
 ; MIPS_64:       .data
-; MIPS_64:       .align 3
+; MIPS_64:       .p2align 3
 ; MIPS_64-LABEL: __emutls_v.internal_y:
 ; MIPS_64-NEXT:  .8byte 8
 ; MIPS_64-NEXT:  .8byte 16
 ; MIPS_64-NEXT:  .8byte 0
 ; MIPS_64-NEXT:  .8byte __emutls_t.internal_y
 ; MIPS_64:       .section .rodata,
 ; MIPS_64-LABEL: __emutls_t.internal_y:
 ; MIPS_64-NEXT:  .8byte 9

llvm/trunk/test/CodeGen/Mips/lcb5.ll

 if.end:                                           ; preds = %if.then, %entry
   ret void
 }
 
 ; ci: .ent  z4
 ; ci: btnez $BB7_1  # 16 bit inst
 ; ci: jal $BB7_2  # branch
 ; ci: nop
-; ci: .align  2
+; ci: .p2align  2
 ; ci: $BB7_1:
 ; ci: .end  z4
 
 attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
 attributes #1 = { nounwind }
 
 
 !1 = !{!2, !2, i64 0}

llvm/trunk/test/CodeGen/Mips/longbranch.ll

 ; NACL-NEXT:        addiu   $sp, $sp, 8
 ; NACL-NEXT:        jr      $1
 ; NACL-NEXT:        nop
 
 ; NACL:        $[[BB0]]:
 ; NACL:             lw      $[[R1:[0-9]+]], %got(x)($[[GP]])
 ; NACL:             addiu   $[[R2:[0-9]+]], $zero, 1
 ; NACL:             sw      $[[R2]], 0($[[R1]])
-; NACL:             .align  4
+; NACL:             .p2align  4
 ; NACL-NEXT:   $[[BB2]]:
 ; NACL:             jr      $ra
 ; NACL:             nop
 }

llvm/trunk/test/CodeGen/Mips/nacl-align.ll

 ; RUN: llc -filetype=asm -mtriple=mipsel-none-nacl -relocation-model=static \
 ; RUN:     -O3 < %s | FileCheck %s
 
 
 ; This test tests that NaCl functions are bundle-aligned.
 
 define void @test0() {
   ret void
 
-; CHECK:          .align  4
-; CHECK-NOT:      .align
+; CHECK:          .p2align  4
+; CHECK-NOT:      .p2align
 ; CHECK-LABEL:    test0:
 
 }
 
 
 ; This test tests that blocks that are jumped to through jump table are
 ; bundle-aligned.
 

 bb4:
   ret i32 444
 default:
   ret i32 555
 
 
 ; CHECK-LABEL:       test1:
 
-; CHECK:             .align  4
+; CHECK:             .p2align  4
 ; CHECK-NEXT:    ${{BB[0-9]+_[0-9]+}}:
 ; CHECK-NEXT:        jr      $ra
 ; CHECK-NEXT:        addiu   $2, $zero, 111
 ; CHECK-NEXT:    ${{BB[0-9]+_[0-9]+}}:
 ; CHECK-NEXT:        jr      $ra
 ; CHECK-NEXT:        addiu   $2, $zero, 555
-; CHECK-NEXT:        .align  4
+; CHECK-NEXT:        .p2align  4
 ; CHECK-NEXT:    ${{BB[0-9]+_[0-9]+}}:
 ; CHECK-NEXT:        jr      $ra
 ; CHECK-NEXT:        addiu   $2, $zero, 222
-; CHECK-NEXT:        .align  4
+; CHECK-NEXT:        .p2align  4
 ; CHECK-NEXT:    ${{BB[0-9]+_[0-9]+}}:
 ; CHECK-NEXT:        jr      $ra
 ; CHECK-NEXT:        addiu   $2, $zero, 333
 
 }
 
 
 ; This test tests that a block whose address is taken is bundle-aligned in NaCl.
bb2:
   ret i32 222
 
 
 ; CHECK-LABEL:       test2:
 
 ; Note that there are two consecutive labels - one temporary and one for
 ; basic block.
 
-; CHECK:             .align  4
+; CHECK:             .p2align  4
 ; CHECK-NEXT:    ${{[a-zA-Z0-9]+}}:
 ; CHECK-NEXT:    ${{BB[0-9]+_[0-9]+}}:
 ; CHECK-NEXT:        jr      $ra
 ; CHECK-NEXT:        addiu   $2, $zero, 111
-; CHECK-NEXT:        .align  4
+; CHECK-NEXT:        .p2align  4
 ; CHECK-NEXT:    ${{[a-zA-Z0-9]+}}:
 ; CHECK-NEXT:    ${{BB[0-9]+_[0-9]+}}:
 ; CHECK-NEXT:        jr      $ra
 ; CHECK-NEXT:        addiu   $2, $zero, 222
 
 }

llvm/trunk/test/CodeGen/PowerPC/2010-02-04-EmptyGlobal.ll

 ; RUN: llc < %s -mtriple=powerpc-apple-darwin10 -relocation-model=pic -disable-fp-elim | FileCheck %s
 ; <rdar://problem/7604010>
 
 %cmd.type = type { }
 
 @_cmd = constant %cmd.type zeroinitializer
 
 ; CHECK:      .globl __cmd
-; CHECK-NEXT: .align 3
+; CHECK-NEXT: .p2align 3
 ; CHECK-NEXT: __cmd:
 ; CHECK-NEXT: .byte 0
 
 ; PR6340
 
 %Ty = type { i32, {}, i32 }
 @k = global %Ty { i32 1, {} zeroinitializer, i32 3 }
 
 ; CHECK: _k:
 ; CHECK-NEXT: .long 1
 ; CHECK-NEXT: .long 3

llvm/trunk/test/CodeGen/PowerPC/align.ll

 ; RUN: llc < %s -mtriple=powerpc-linux-gnu | FileCheck %s -check-prefix=ELF
 ; RUN: llc < %s -mtriple=powerpc-apple-darwin9 | FileCheck %s -check-prefix=DARWIN
 ; RUN: llc < %s -mtriple=powerpc-apple-darwin8 | FileCheck %s -check-prefix=DARWIN8
 
 @a = global i1 true
 ; no alignment
 
 @b = global i8 1
 ; no alignment
 
 @c = global i16 2
-;ELF: .align 1
+;ELF: .p2align 1
 ;ELF: c:
-;DARWIN: .align 1
+;DARWIN: .p2align 1
 ;DARWIN: _c:
 
 @d = global i32 3
-;ELF: .align 2
+;ELF: .p2align 2
 ;ELF: d:
-;DARWIN: .align 2
+;DARWIN: .p2align 2
 ;DARWIN: _d:
 
 @e = global i64 4
-;ELF: .align 3
+;ELF: .p2align 3
 ;ELF: e
-;DARWIN: .align 3
+;DARWIN: .p2align 3
 ;DARWIN: _e:
 
 @f = global float 5.0
-;ELF: .align 2
+;ELF: .p2align 2
 ;ELF: f:
-;DARWIN: .align 2
+;DARWIN: .p2align 2
 ;DARWIN: _f:
 
 @g = global double 6.0
-;ELF: .align 3
+;ELF: .p2align 3
 ;ELF: g:
-;DARWIN: .align 3
+;DARWIN: .p2align 3
 ;DARWIN: _g:
 
 @bar = common global [75 x i8] zeroinitializer, align 128
 ;ELF: .comm bar,75,128
 ;DARWIN: .comm _bar,75,7
 
 ;; Darwin8 doesn't support aligned comm.  Just miscompile this.
 ; DARWIN8: .comm _bar,75 ;

llvm/trunk/test/CodeGen/PowerPC/code-align.ll

 define signext i32 @foo(i32 signext %x) #0 {
 entry:
   %mul = shl nsw i32 %x, 1
   ret i32 %mul
 
 ; GENERIC-LABEL: .globl  foo
 ; BASIC-LABEL: .globl  foo
 ; PWR-LABEL: .globl  foo
-; GENERIC: .align  2
-; BASIC: .align  4
-; PWR: .align  4
+; GENERIC: .p2align  2
+; BASIC: .p2align  4
+; PWR: .p2align  4
 ; GENERIC: @foo
 ; BASIC: @foo
 ; PWR: @foo
 }
 
 ; Function Attrs: nounwind
 define void @loop(i32 signext %x, i32* nocapture %a) #1 {
 entry:
   br label %vector.body
 
 ; GENERIC-LABEL: @loop
 ; BASIC-LABEL: @loop
 ; PWR-LABEL: @loop
 ; GENERIC: mtctr
 ; BASIC: mtctr
 ; PWR: mtctr
-; GENERIC-NOT: .align
-; BASIC: .align  4
-; PWR: .align  4
+; GENERIC-NOT: .p2align
+; BASIC: .p2align  4
+; PWR: .p2align  4
 ; GENERIC: lwzu
 ; BASIC: lwzu
 ; PWR: lwzu
 ; GENERIC: bdnz
 ; BASIC: bdnz
 ; PWR: bdnz
 
 vector.body:                                      ; preds = %vector.body, %entry
entry:
   br label %for.body
 
 ; GENERIC-LABEL: @sloop
 ; BASIC-LABEL: @sloop
 ; PWR-LABEL: @sloop
 ; GENERIC: mtctr
 ; BASIC: mtctr
 ; PWR: mtctr
-; GENERIC-NOT: .align
-; BASIC: .align  4
-; PWR: .align  5
+; GENERIC-NOT: .p2align
+; BASIC: .p2align  4
+; PWR: .p2align  5
 ; GENERIC: bdnz
 ; BASIC: bdnz
 ; PWR: bdnz
 
 for.body:                                         ; preds = %for.body, %entry
   %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
   %arrayidx = getelementptr inbounds i32, i32* %a, i64 %indvars.iv
   %0 = load i32, i32* %arrayidx, align 4

llvm/trunk/test/CodeGen/PowerPC/ppc64-linux-func-size.ll

 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 | FileCheck %s
 
 ; CHECK:      .section  .opd,"aw",@progbits
 ; CHECK-NEXT: test1:
-; CHECK-NEXT: .align 3
+; CHECK-NEXT: .p2align 3
 ; CHECK-NEXT: .quad .L[[BEGIN:.*]]
 ; CHECK-NEXT: .quad .TOC.@tocbase
 ; CHECK-NEXT:   .quad 0
 ; CHECK-NEXT: .text
 ; CHECK-NEXT: .L[[BEGIN]]:
 
 define i32 @test1(i32 %a) nounwind {
 entry:

llvm/trunk/test/CodeGen/PowerPC/ppc64-toc.ll

 ; RUN: llc -code-model=small < %s | FileCheck %s
 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
 target triple = "powerpc64-unknown-linux-gnu"
 
 @double_array = global [32 x double] zeroinitializer, align 8
 @number64 = global i64 10, align 8
 @internal_static_var.x = internal unnamed_addr global i64 0, align 8
 
 define i64 @access_int64(i64 %a) nounwind readonly {
 entry:
 ; CHECK-LABEL: access_int64:
-; CHECK-NEXT: .align  3
+; CHECK-NEXT: .p2align  3
 ; CHECK-NEXT: .quad   .L[[BEGIN:.*]]
 ; CHECK-NEXT: .quad   .TOC.@tocbase
 ; CHECK-NEXT: .quad   0
 ; CHECK-NEXT: .text
 ; CHECK-NEXT: .L[[BEGIN]]:
   %0 = load i64, i64* @number64, align 8
 ; CHECK: ld {{[0-9]+}}, .LC{{[0-9]+}}@toc(2)
   %cmp = icmp eq i64 %0, %a

llvm/trunk/test/CodeGen/Thumb/2010-07-01-FuncAlign.ll

 ; RUN: llc < %s -mtriple=thumb-apple-darwin | FileCheck %s
 ; Radar 8143571: Function alignments were off by a power of two.
-; CHECK: .align 1
+; CHECK: .p2align 1
 define void @test() {
   ret void
 }

llvm/trunk/test/CodeGen/Thumb/segmented-stacks.ll

 ; Thumb-android-NEXT: bl      __morestack
 ; Thumb-android-NEXT: pop     {r4}
 ; Thumb-android-NEXT: mov     lr, r4
 ; Thumb-android-NEXT: pop     {r4, r5}
 ; Thumb-android-NEXT: bx      lr
 
 ; Thumb-android:      pop     {r4, r5}
 
-; Thumb-android: .align 2
+; Thumb-android: .p2align 2
 ; Thumb-android: .LCPI0_0:
 ; Thumb-android-NEXT: .long __STACK_LIMIT
 
 ; Thumb-linux-LABEL:      test_basic:
 
 ; Thumb-linux:      push    {r4, r5}
 ; Thumb-linux-NEXT: mov     r5, sp
 ; Thumb-linux-NEXT: ldr     r4, .LCPI0_0

llvm/trunk/test/CodeGen/Thumb2/aligned-constants.ll

 ; RUN: llc < %s -mcpu=cortex-a8 | FileCheck %s
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
 target triple = "thumbv7-apple-ios"
 
 ; The double in the constant pool is 8-byte aligned, forcing the function
 ; alignment.
-; CHECK: .align 3
+; CHECK: .p2align 3
 ; CHECK: func
 ;
 ; Constant pool with 8-byte entry before 4-byte entry:
-; CHECK: .align 3
+; CHECK: .p2align 3
 ; CHECK: LCPI
 ; CHECK:  .long 2370821947
 ; CHECK:  .long 1080815255
 ; CHECK: LCPI
 ; CHECK:  .long 1123477881
 define void @func(float* nocapture %x, double* nocapture %y) nounwind ssp {
 entry:
   %0 = load float, float* %x, align 4
   %add = fadd float %0, 0x405EDD2F20000000
   store float %add, float* %x, align 4
   %1 = load double, double* %y, align 4
   %add1 = fadd double %1, 2.234560e+02
   store double %add1, double* %y, align 4
   ret void
 }

llvm/trunk/test/CodeGen/Thumb2/thumb2-tbb.ll

 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic | FileCheck %s
 
 define void @bar(i32 %n.u) {
 entry:
 ; CHECK-LABEL: bar:
 ; CHECK: tbb
 ; CHECK: .data_region jt8
 ; CHECK: .end_data_region
-; CHECK-NEXT: .align 1
+; CHECK-NEXT: .p2align 1
 
     switch i32 %n.u, label %bb12 [i32 1, label %bb i32 2, label %bb6 i32 4, label %bb7 i32 5, label %bb8 i32 6, label %bb10 i32 7, label %bb1 i32 8, label %bb3 i32 9, label %bb4 i32 10, label %bb9 i32 11, label %bb2 i32 12, label %bb5 i32 13, label %bb11 ]
 bb:
     tail call void(...) @foo1()
     ret void
 bb1:
     tail call void(...) @foo2()
     ret void

llvm/trunk/test/CodeGen/WebAssembly/global.ll

 ; CHECK-NEXT: return          $0{{$}}
 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1)
 define i8* @call_memcpy(i8* %p, i8* nocapture readonly %q, i32 %n) {
   tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i32 1, i1 false)
   ret i8* %p
 }
 
 ; CHECK: .type   .Lg,@object
-; CHECK: .align  2{{$}}
+; CHECK: .p2align  2{{$}}
 ; CHECK-NEXT: .Lg:
 ; CHECK-NEXT: .int32 1337{{$}}
 ; CHECK-NEXT: .size .Lg, 4{{$}}
 @g = private global i32 1337
 
 ; CHECK-LABEL: ud:
 ; CHECK-NEXT: .skip 4{{$}}
 ; CHECK-NEXT: .size ud, 4{{$}}
 @ud = internal global i32 undef
 
 ; CHECK: .type nil,@object
 ; CHECK-NEXT: .lcomm nil,4,2{{$}}
 @nil = internal global i32 zeroinitializer
 
 ; CHECK: .type z,@object
 ; CHECK-NEXT: .lcomm z,4,2{{$}}
 @z = internal global i32 0
 
 ; CHECK-NEXT: .type one,@object
-; CHECK-NEXT: .align 2{{$}}
+; CHECK-NEXT: .p2align 2{{$}}
 ; CHECK-NEXT: one:
 ; CHECK-NEXT: .int32 1{{$}}
 ; CHECK-NEXT: .size one, 4{{$}}
 @one = internal global i32 1
 
 ; CHECK: .type answer,@object
-; CHECK: .align 2{{$}}
+; CHECK: .p2align 2{{$}}
 ; CHECK-NEXT: answer:
 ; CHECK-NEXT: .int32 42{{$}}
 ; CHECK-NEXT: .size answer, 4{{$}}
 @answer = internal global i32 42
 
 ; CHECK: .type u32max,@object
-; CHECK: .align 2{{$}}
+; CHECK: .p2align 2{{$}}
 ; CHECK-NEXT: u32max:
 ; CHECK-NEXT: .int32 4294967295{{$}}
 ; CHECK-NEXT: .size u32max, 4{{$}}
 @u32max = internal global i32 -1
 
 ; CHECK: .type ud64,@object
-; CHECK: .align 3{{$}}
+; CHECK: .p2align 3{{$}}
 ; CHECK-NEXT: ud64:
 ; CHECK-NEXT: .skip 8{{$}}
 ; CHECK-NEXT: .size ud64, 8{{$}}
 @ud64 = internal global i64 undef
 
 ; CHECK: .type nil64,@object
 ; CHECK: .lcomm nil64,8,3{{$}}
 @nil64 = internal global i64 zeroinitializer
 
 ; CHECK: .type z64,@object
 ; CHECK: .lcomm z64,8,3{{$}}
 @z64 = internal global i64 0
 
 ; CHECK: .type twoP32,@object
-; CHECK: .align 3{{$}}
+; CHECK: .p2align 3{{$}}
 ; CHECK-NEXT: twoP32:
 ; CHECK-NEXT: .int64 4294967296{{$}}
 ; CHECK-NEXT: .size twoP32, 8{{$}}
 @twoP32 = internal global i64 4294967296
 
 ; CHECK: .type u64max,@object
-; CHECK: .align 3{{$}}
+; CHECK: .p2align 3{{$}}
 ; CHECK-NEXT: u64max:
 ; CHECK-NEXT: .int64 -1{{$}}
 ; CHECK-NEXT: .size u64max, 8{{$}}
 @u64max = internal global i64 -1
 
 ; CHECK: .type f32ud,@object
-; CHECK: .align 2{{$}}
+; CHECK: .p2align 2{{$}}
 ; CHECK-NEXT: f32ud:
 ; CHECK-NEXT: .skip 4{{$}}
 ; CHECK-NEXT: .size f32ud, 4{{$}}
 @f32ud = internal global float undef
 
 ; CHECK: .type f32nil,@object
 ; CHECK: .lcomm f32nil,4,2{{$}}
 @f32nil = internal global float zeroinitializer
 
 ; CHECK: .type f32z,@object
 ; CHECK: .lcomm f32z,4,2{{$}}
 @f32z = internal global float 0.0
 
 ; CHECK: .type f32nz,@object
-; CHECK: .align 2{{$}}
+; CHECK: .p2align 2{{$}}
 ; CHECK: f32nz:
 ; CHECK: .int32 2147483648{{$}}
 ; CHECK: .size f32nz, 4{{$}}
 @f32nz = internal global float -0.0
 
 ; CHECK: .type f32two,@object
-; CHECK: .align 2{{$}}
+; CHECK: .p2align 2{{$}}
 ; CHECK-NEXT: f32two:
 ; CHECK-NEXT: .int32 1073741824{{$}}
 ; CHECK-NEXT: .size f32two, 4{{$}}
 @f32two = internal global float 2.0
 
 ; CHECK: .type f64ud,@object
-; CHECK: .align 3{{$}}
+; CHECK: .p2align 3{{$}}
 ; CHECK-NEXT: f64ud:
 ; CHECK-NEXT: .skip 8{{$}}
 ; CHECK-NEXT: .size f64ud, 8{{$}}
 @f64ud = internal global double undef
 
 ; CHECK: .type f64nil,@object
 ; CHECK: .lcomm f64nil,8,3{{$}}
 @f64nil = internal global double zeroinitializer
 
 ; CHECK: .type f64z,@object
 ; CHECK: .lcomm f64z,8,3{{$}}
 @f64z = internal global double 0.0
 
 ; CHECK: .type f64nz,@object
-; CHECK: .align 3{{$}}
+; CHECK: .p2align 3{{$}}
 ; CHECK-NEXT: f64nz:
 ; CHECK-NEXT: .int64 -9223372036854775808{{$}}
 ; CHECK-NEXT: .size f64nz, 8{{$}}
 @f64nz = internal global double -0.0
 
 ; CHECK: .type f64two,@object
-; CHECK: .align 3{{$}}
+; CHECK: .p2align 3{{$}}
 ; CHECK-NEXT: f64two:
 ; CHECK-NEXT: .int64 4611686018427387904{{$}}
 ; CHECK-NEXT: .size f64two, 8{{$}}
 @f64two = internal global double 2.0
 
 ; Indexing into a global array produces a relocation.
 ; CHECK:      .type arr,@object
 ; CHECK:      .type ptr,@object
 ; CHECK:      ptr:
 ; CHECK-NEXT: .int32 arr+80
 ; CHECK-NEXT: .size ptr, 4
 @arr = global [128 x i32] zeroinitializer, align 16
 @ptr = global i32* getelementptr inbounds ([128 x i32], [128 x i32]* @arr, i32 0, i32 20), align 4
 
 ; Constant global.
 ; CHECK: .type    rom,@object{{$}}
 ; CHECK: .section .rodata,"a",@progbits{{$}}
 ; CHECK: .globl   rom{{$}}
-; CHECK: .align   4{{$}}
+; CHECK: .p2align   4{{$}}
 ; CHECK: rom:
 ; CHECK: .skip    512{{$}}
 ; CHECK: .size    rom, 512{{$}}
 @rom = constant [128 x i32] zeroinitializer, align 16
 
 ; CHECK: .type       array,@object
 ; CHECK-NEXT: array:
 ; CHECK-NEXT: .skip       8
 ; CHECK-NEXT: .size       array, 8
 ; CHECK: .type       pointer_to_array,@object
 ; CHECK-NEXT: .section    .data.rel.ro,"aw",@progbits
 ; CHECK-NEXT: .globl      pointer_to_array
-; CHECK-NEXT: .align      2
+; CHECK-NEXT: .p2align      2
 ; CHECK-NEXT: pointer_to_array:
 ; CHECK-NEXT: .int32      array+4
 ; CHECK-NEXT: .size       pointer_to_array, 4
 @array = internal constant [8 x i8] zeroinitializer, align 1
 @pointer_to_array = constant i8* getelementptr inbounds ([8 x i8], [8 x i8]* @array, i32 0, i32 4), align 4

llvm/trunk/test/CodeGen/X86/GC/dynamic-frame-size.ll

define void @test(i8* %ptr) gc "erlang" {
    ; 32 byte alignment (for the alloca) is larger than the default
    ; 16 byte alignment
    %slot = alloca <4 x i8*>
    call void @use(<4 x i8*>* %slot);
    ret void
 }
 
 ; CHECK: .note.gc
-; CHECK-NEXT: .align 8
+; CHECK-NEXT: .p2align 3
 ; safe point count
 ; CHECK: .short 1
 ; CHECK: .long  .Ltmp0
 ; stack frame size (in words)
 ; CHECK: .short -1
 ; stack arity (arguments on the stack)
 ; CHECK: .short 0
 ; live root count
 ; CHECK: .short 0
 

llvm/trunk/test/CodeGen/X86/GC/erlang-gc.ll

 ; RUN: llc -mtriple=x86_64-linux-gnu < %s | FileCheck %s --check-prefix=CHECK64
 ; RUN: llc -mtriple=i686-linux-gnu < %s | FileCheck %s --check-prefix=CHECK32
 
 define i32 @main(i32 %x) nounwind gc "erlang" {
   %puts = tail call i32 @foo(i32 %x)
   ret i32 0
 
 ; CHECK64:      .section  .note.gc,"",@progbits
-; CHECK64-NEXT: .align 8
+; CHECK64-NEXT: .p2align 3
 ; CHECK64-NEXT: .short 1      # safe point count
 ; CHECK64-NEXT: .long  .Ltmp0 # safe point address
 ; CHECK64-NEXT: .short 1      # stack frame size (in words)
 ; CHECK64-NEXT: .short 0      # stack arity
 ; CHECK64-NEXT: .short 0      # live root count
 
 ; CHECK32:      .section  .note.gc,"",@progbits
-; CHECK32-NEXT: .align 4
+; CHECK32-NEXT: .p2align 2
 ; CHECK32-NEXT: .short 1      # safe point count
 ; CHECK32-NEXT: .long  .Ltmp0 # safe point address
 ; CHECK32-NEXT: .short 3      # stack frame size (in words)
 ; CHECK32-NEXT: .short 0      # stack arity
 ; CHECK32-NEXT: .short 0      # live root count
 }
 
 declare i32 @foo(i32)

llvm/trunk/test/CodeGen/X86/GC/ocaml-gc.ll

 ; CHECK-NEXT: "caml<stdin>__code_end":
 ; CHECK-NEXT:   .data
 ; CHECK-NEXT:   .globl "caml<stdin>__data_end"
 ; CHECK-NEXT: "caml<stdin>__data_end":
 ; CHECK-NEXT:   .quad   0
 ; CHECK-NEXT:   .globl "caml<stdin>__frametable"
 ; CHECK-NEXT: "caml<stdin>__frametable":
 ; CHECK-NEXT:   .short  1
-; CHECK-NEXT:   .align  8
+; CHECK-NEXT:   .p2align  3
 ; CHECK-NEXT:                # live roots for main
 ; CHECK-NEXT:   .quad   .Ltmp0
 ; CHECK-NEXT:   .short  8
 ; CHECK-NEXT:   .short  0
-; CHECK-NEXT:   .align  8
+; CHECK-NEXT:   .p2align  3
 }
 
 declare i32 @foo(i32)

llvm/trunk/test/CodeGen/X86/alignment.ll

 ; RUN: llc %s -o - -mtriple=x86_64-linux-gnu | FileCheck %s
 
 ; This cannot get rounded up to the preferred alignment (16) if they have an
 ; explicit alignment specified.
 @GlobalA = global { [384 x i8] } zeroinitializer, align 8 
 
 ; CHECK:  .bss
 ; CHECK:  .globl  GlobalA
-; CHECK:  .align  8
+; CHECK:  .p2align  3
 ; CHECK: GlobalA:
 ; CHECK:  .zero 384
 
 ; Common variables should not get rounded up to the preferred alignment (16) if
 ; they have an explicit alignment specified.
 ; PR6921
 @GlobalB = common global { [384 x i8] } zeroinitializer, align 8
 
 ; CHECK:  .comm GlobalB,384,8
 
 
 @GlobalC = common global { [384 x i8] } zeroinitializer, align 2
 
 ; CHECK:  .comm GlobalC,384,2
 
 
 
 ; This cannot get rounded up to the preferred alignment (16) if they have an
 ; explicit alignment specified *and* a section specified.
 @GlobalAS = global { [384 x i8] } zeroinitializer, align 8, section "foo"
 
 ; CHECK:  .globl  GlobalAS
-; CHECK:  .align  8
+; CHECK:  .p2align  3
 ; CHECK: GlobalAS:
 ; CHECK:  .zero 384
 
 ; Common variables should not get rounded up to the preferred alignment (16) if
 ; they have an explicit alignment specified and a section specified.
 ; PR6921
 @GlobalBS = common global { [384 x i8] } zeroinitializer, align 8, section "foo"
 ; CHECK:  .comm GlobalBS,384,8
 
 @GlobalCS = common global { [384 x i8] } zeroinitializer, align 2, section "foo"
 ; CHECK:  .comm GlobalCS,384,2

llvm/trunk/test/CodeGen/X86/avoid-loop-align.ll

 ; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
 
 ; CodeGen should align the top of the loop, which differs from the loop
 ; header in this case.
 
 ; CHECK: jmp LBB0_2
-; CHECK: .align
+; CHECK: .p2align
 ; CHECK: LBB0_1:
 
 @A = common global [100 x i32] zeroinitializer, align 32    ; <[100 x i32]*> [#uses=1]
 
 define i8* @test(i8* %Q, i32* %L) nounwind {
 entry:
   %tmp = tail call i32 (...) @foo() nounwind    ; <i32> [#uses=2]
   %tmp1 = inttoptr i32 %tmp to i8*    ; <i8*> [#uses=1]

llvm/trunk/test/CodeGen/X86/avx2-vbroadcast.ll

 define void @crash() nounwind alwaysinline {
 ; X32-LABEL: crash:
 ; X32:       ## BB#0: ## %WGLoopsEntry
 ; X32-NEXT:    xorl %eax, %eax
 ; X32-NEXT:    testb %al, %al
 ; X32-NEXT:    je LBB31_1
 ; X32-NEXT:  ## BB#2: ## %ret
 ; X32-NEXT:    retl
-; X32-NEXT:    .align 4, 0x90
+; X32-NEXT:    .p2align 4, 0x90
 ; X32-NEXT:  LBB31_1: ## %footer349VF
 ; X32-NEXT:    ## =>This Inner Loop Header: Depth=1
 ; X32-NEXT:    jmp LBB31_1
 ;
 ; X64-LABEL: crash:
 ; X64:       ## BB#0: ## %WGLoopsEntry
 ; X64-NEXT:    xorl %eax, %eax
 ; X64-NEXT:    testb %al, %al
 ; X64-NEXT:    je LBB31_1
 ; X64-NEXT:  ## BB#2: ## %ret
 ; X64-NEXT:    retq
-; X64-NEXT:    .align 4, 0x90
+; X64-NEXT:    .p2align 4, 0x90
 ; X64-NEXT:  LBB31_1: ## %footer349VF
 ; X64-NEXT:    ## =>This Inner Loop Header: Depth=1
 ; X64-NEXT:    jmp LBB31_1
 WGLoopsEntry:
   br i1 undef, label %ret, label %footer329VF
 
 footer329VF:
   %A.0.inVF = fmul float undef, 6.553600e+04

llvm/trunk/test/CodeGen/X86/block-placement.ll

 ; RUN: llc -mtriple=i686-linux -pre-RA-sched=source < %s | FileCheck %s
 
 declare void @error(i32 %i, i32 %a, i32 %b)
 
 define i32 @test_ifchains(i32 %i, i32* %a, i32 %b) {
 ; Test a chain of ifs, where the block guarded by the if is error handling code
 ; that is not expected to run.
 ; CHECK-LABEL: test_ifchains:
 ; CHECK: %entry
-; CHECK-NOT: .align
+; CHECK-NOT: .p2align
 ; CHECK: %else1
-; CHECK-NOT: .align
+; CHECK-NOT: .p2align
 ; CHECK: %else2
-; CHECK-NOT: .align
+; CHECK-NOT: .p2align
 ; CHECK: %else3
-; CHECK-NOT: .align
+; CHECK-NOT: .p2align
 ; CHECK: %else4
-; CHECK-NOT: .align
+; CHECK-NOT: .p2align
 ; CHECK: %exit
 ; CHECK: %then1
 ; CHECK: %then2
 ; CHECK: %then3
 ; CHECK: %then4
 ; CHECK: %then5
 
 entry:

 exit:
   ret i32 %b
 }
 
 define i32 @test_loop_cold_blocks(i32 %i, i32* %a) {
 ; Check that we sink cold loop blocks after the hot loop body.
 ; CHECK-LABEL: test_loop_cold_blocks:
 ; CHECK: %entry
-; CHECK-NOT: .align
+; CHECK-NOT: .p2align
 ; CHECK: %unlikely1
-; CHECK-NOT: .align
+; CHECK-NOT: .p2align
 ; CHECK: %unlikely2
-; CHECK: .align
+; CHECK: .p2align
 ; CHECK: %body1
 ; CHECK: %body2
 ; CHECK: %body3
 ; CHECK: %exit
 
 entry:
   br label %body1
 
exit:
   ret i32 %base
 }
 
 define i32 @test_loop_align(i32 %i, i32* %a) {
 ; Check that we provide basic loop body alignment with the block placement
 ; pass.
 ; CHECK-LABEL: test_loop_align:
 ; CHECK: %entry
-; CHECK: .align [[ALIGN:[0-9]+]],
+; CHECK: .p2align [[ALIGN:[0-9]+]],
 ; CHECK-NEXT: %body
 ; CHECK: %exit
 
 entry:
   br label %body
 
 body:
   %iv = phi i32 [ 0, %entry ], [ %next, %body ]
   %base = phi i32 [ 0, %entry ], [ %sum, %body ]
   %arrayidx = getelementptr inbounds i32, i32* %a, i32 %iv
   %0 = load i32, i32* %arrayidx
   %sum = add nsw i32 %0, %base
   %next = add i32 %iv, 1
   %exitcond = icmp eq i32 %next, %i
   br i1 %exitcond, label %exit, label %body
 
 exit:
   ret i32 %sum
 }
 
 define i32 @test_nested_loop_align(i32 %i, i32* %a, i32* %b) {
 ; Check that we provide nested loop body alignment.
 ; CHECK-LABEL: test_nested_loop_align:
 ; CHECK: %entry
-; CHECK: .align [[ALIGN]],
+; CHECK: .p2align [[ALIGN]],
 ; CHECK-NEXT: %loop.body.1
-; CHECK: .align [[ALIGN]],
+; CHECK: .p2align [[ALIGN]],
 ; CHECK-NEXT: %inner.loop.body
-; CHECK-NOT: .align
+; CHECK-NOT: .p2align
 ; CHECK: %exit
 
 entry:
   br label %loop.body.1
 
 loop.body.1:
   %iv = phi i32 [ 0, %entry ], [ %next, %loop.body.2 ]
   %arrayidx = getelementptr inbounds i32, i32* %a, i32 %iv

 ;    bottom of the loop needs to be exiting into the nearest enclosing loop (to
 ;    which there is an exit). Otherwise, we force that enclosing loop into
 ;    strange layouts that are siginificantly less efficient, often times maing
 ;    it discontiguous.
 ;
 ; CHECK: @benchmark_heapsort
 ; CHECK: %entry
 ; First rotated loop top.
-; CHECK: .align
+; CHECK: .p2align
 ; CHECK: %while.end
 ; CHECK: %for.cond
 ; CHECK: %if.then
 ; CHECK: %if.else
 ; CHECK: %if.end10
 ; Second rotated loop top
-; CHECK: .align
+; CHECK: .p2align
 ; CHECK: %if.then24
 ; CHECK: %while.cond.outer
 ; Third rotated loop top
-; CHECK: .align
+; CHECK: .p2align
 ; CHECK: %while.cond
 ; CHECK: %while.body
 ; CHECK: %land.lhs.true
 ; CHECK: %if.then19
 ; CHECK: %if.end20
 ; CHECK: %if.then8
 ; CHECK: ret
 

llvm/trunk/test/CodeGen/X86/bss_pagealigned.ll

 ; CHECK: movq    $bm_pte, %rdi
 ; CHECK-NEXT: xorl    %esi, %esi
 ; CHECK-NEXT: movl    $4096, %edx
 ; CHECK-NEXT: callq   memset
   ret void
 }
 @bm_pte = internal global [512 x %struct.kmem_cache_order_objects] zeroinitializer, section ".bss.page_aligned", align 4096
 ; CHECK: .section        .bss.page_aligned,"aw",@nobits
-; CHECK-NEXT: .align  4096
+; CHECK-NEXT: .p2align  12
 ; CHECK-NEXT: bm_pte:
 ; CHECK-NEXT: .zero   4096
 ; CHECK-NEXT: .size   bm_pte, 4096

llvm/trunk/test/CodeGen/X86/cfstring.ll

 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
 ; <rdar://problem/10564621>
 
 %0 = type opaque
 %struct.NSConstantString = type { i32*, i32, i8*, i32 }
 
 ; Make sure that the string ends up the correct section.
 
 ; CHECK:        .section __TEXT,__cstring
 ; CHECK-NEXT: L_.str3:
 
 ; CHECK:        .section  __DATA,__cfstring
-; CHECK-NEXT:   .align  4
+; CHECK-NEXT:   .p2align  4
 ; CHECK-NEXT: L__unnamed_cfstring_4:
 ; CHECK-NEXT:   .quad  ___CFConstantStringClassReference
 ; CHECK-NEXT:   .long  1992
 ; CHECK-NEXT:   .space  4
 ; CHECK-NEXT:   .quad  L_.str3
 ; CHECK-NEXT:   .long  0
 ; CHECK-NEXT:   .space  4
 

llvm/trunk/test/CodeGen/X86/code_placement_align_all.ll

 ; RUN: llc  -mcpu=corei7 -mtriple=x86_64-linux -align-all-blocks=16 < %s | FileCheck %s
 
 ;CHECK-LABEL: foo:
-;CHECK: .align  65536, 0x90
-;CHECK: .align  65536, 0x90
-;CHECK: .align  65536, 0x90
+;CHECK: .p2align  16, 0x90
+;CHECK: .p2align  16, 0x90
+;CHECK: .p2align  16, 0x90
 ;CHECK: ret
 define i32 @foo(i32 %t, i32 %l) nounwind readnone ssp uwtable {
   %1 = icmp eq i32 %t, 0
   br i1 %1, label %4, label %2
 
 ; <label>:2                                       ; preds = %0
   %3 = add nsw i32 %t, 2
   ret i32 %3
 
 ; <label>:4                                       ; preds = %0
   %5 = icmp eq i32 %l, 0
   %. = select i1 %5, i32 0, i32 5
   ret i32 %.
 }
 
 

llvm/trunk/test/CodeGen/X86/constructor.ll

 }
 
 define void @g() {
 entry:
   ret void
 }
 
 ; CTOR:   .section  .ctors.65520,"aGw",@progbits,v,comdat
-; CTOR-NEXT:  .align  8
+; CTOR-NEXT:  .p2align  3
 ; CTOR-NEXT:  .quad g
 ; CTOR-NEXT:  .section  .ctors,"aw",@progbits
-; CTOR-NEXT:  .align  8
+; CTOR-NEXT:  .p2align  3
 ; CTOR-NEXT:  .quad f
 
 ; INIT-ARRAY:   .section  .init_array.15,"aGw",@init_array,v,comdat
-; INIT-ARRAY-NEXT:  .align  8
+; INIT-ARRAY-NEXT:  .p2align  3
 ; INIT-ARRAY-NEXT:  .quad g
 ; INIT-ARRAY-NEXT:  .section  .init_array,"aw",@init_array
-; INIT-ARRAY-NEXT:  .align  8
+; INIT-ARRAY-NEXT:  .p2align  3
 ; INIT-ARRAY-NEXT:  .quad f
 
 ; NACL:   .section  .init_array.15,"aGw",@init_array,v,comdat
-; NACL-NEXT:  .align  4
+; NACL-NEXT:  .p2align  2
 ; NACL-NEXT:  .long g
 ; NACL-NEXT:  .section  .init_array,"aw",@init_array
-; NACL-NEXT:  .align  4
+; NACL-NEXT:  .p2align  2
 ; NACL-NEXT:  .long f

llvm/trunk/test/CodeGen/X86/emutls_generic.ll

 ; X86_32:        calll __emutls_get_address
 ; X86_32-LABEL:  get_internal_y:
 ; X86_32:        leal __emutls_v.internal_y@GOTOFF(%ebx)
 ; X86_32:        calll __emutls_get_address
 ; X86_32-NOT:    __emutls_t.external_x
 ; X86_32-NOT:    __emutls_v.external_x:
 ; X86_32:        .data{{$}}
 ; X86_32:        .globl __emutls_v.external_y
-; X86_32:        .align 4
+; X86_32:        .p2align 2
 ; X86_32-LABEL:  __emutls_v.external_y:
 ; X86_32-NEXT:   .long 1
 ; X86_32-NEXT:   .long 2
 ; X86_32-NEXT:   .long 0
 ; X86_32-NEXT:   .long __emutls_t.external_y
 ; X86_32:        .section .rodata,
 ; X86_32-LABEL:  __emutls_t.external_y:
 ; X86_32-NEXT:   .byte 7
 ; X86_32:        .data{{$}}
 ; X86_32-NOT:    .globl
-; X86_32:        .align 4
+; X86_32:        .p2align 2
 ; X86_32-LABEL:  __emutls_v.internal_y:
 ; X86_32-NEXT:   .long 8
 ; X86_32-NEXT:   .long 16
 ; X86_32-NEXT:   .long 0
 ; X86_32-NEXT:   .long __emutls_t.internal_y
 ; X86_32-LABEL:  __emutls_t.internal_y:
 ; X86_32-NEXT:   .quad 9
 ; X86_64-LABEL:  get_external_x:
 ; X86_64:        __emutls_v.external_x@GOTPCREL(%rip)
 ; X86_64:        __emutls_get_address
 ; X86_64-LABEL:  get_external_y:
 ; X86_64:        __emutls_v.external_y@GOTPCREL(%rip)
 ; X86_64:        __emutls_get_address
 ; X86_64-LABEL:  get_internal_y:
 ; X86_64:        __emutls_v.internal_y(%rip)
 ; X86_64:        __emutls_get_address
 ; X86_64-NOT:    __emutls_t.external_x
 ; X86_64-NOT:    __emutls_v.external_x:
 ; X86_64:        .globl __emutls_v.external_y
-; X86_64:        .align 8
+; X86_64:        .p2align 3
 ; X86_64-LABEL:  __emutls_v.external_y:
 ; X86_64-NEXT:   .quad 1
 ; X86_64-NEXT:   .quad 2
 ; X86_64-NEXT:   .quad 0
 ; X86_64-NEXT:   .quad __emutls_t.external_y
 ; X86_64-NOT:    __emutls_v.external_x:
 ; X86_64:        .section .rodata,
 ; X86_64-LABEL:  __emutls_t.external_y:
 ; X86_64-NEXT:   .byte 7
 ; X86_64:        .data{{$}}
 ; X86_64-NOT:    .globl
-; X86_64:        .align 8
+; X86_64:        .p2align 3
 ; X86_64-LABEL:  __emutls_v.internal_y:
 ; X86_64-NEXT:   .quad 8
 ; X86_64-NEXT:   .quad 16
 ; X86_64-NEXT:   .quad 0
 ; X86_64-NEXT:   .quad __emutls_t.internal_y
 ; X86_64:        .section .rodata,
 ; X86_64-LABEL:  __emutls_t.internal_y:
 ; X86_64-NEXT:   .quad 9

llvm/trunk/test/CodeGen/X86/global-sections.ll

 
 
 @G10 = weak global [100 x i32] zeroinitializer, align 32 ; <[100 x i32]*> [#uses=0]
 
 
 ; DARWIN:       .section        __DATA,__data{{$}}
 ; DARWIN: .globl _G10
 ; DARWIN:       .weak_definition _G10
-; DARWIN:       .align  5
+; DARWIN:       .p2align  5
 ; DARWIN: _G10:
 ; DARWIN:       .space  400
 
 ; LINUX:        .bss
 ; LINUX:        .weak   G10
-; LINUX:        .align  32
+; LINUX:        .p2align  5
 ; LINUX: G10:
 ; LINUX:        .zero   400
 
 
 
 ;; Zero sized objects should round up to 1 byte in zerofill directives.
 ; rdar://7886017
 @G11 = global [0 x i32] zeroinitializer

llvm/trunk/test/CodeGen/X86/licm-symbol.ll

 ; RUN: llc < %s | FileCheck %s
 
 ; MachineLICM should be able to hoist the sF reference out of the loop.
 
 ; CHECK: pushl %esi
 ; CHECK: pushl
 ; CHECK: movl  $176, %esi
 ; CHECK: addl  L___sF$non_lazy_ptr, %esi
-; CHECK: .align  4, 0x90
+; CHECK: .p2align  4, 0x90
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
 target triple = "i386-apple-darwin8"
 
 %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
 %struct.__sFILEX = type opaque
 %struct.__sbuf = type { i8*, i32 }
 %struct.gcov_ctr_summary = type { i32, i32, i64, i64, i64 }

llvm/trunk/test/CodeGen/X86/osx-private-labels.ll

 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
 ; Test all the cases where a L label is safe. Removing any entry from
 ; TargetLoweringObjectFileMachO::isSectionAtomizableBySymbols should cause
 ; this to fail.
 ; We also test some noteworthy cases that require an l label.
 
 @private1 = private unnamed_addr constant [4 x i8] c"zed\00"
 ; CHECK: .section __TEXT,__cstring,cstring_literals
 ; CHECK-NEXT: L_private1:
 
 @private2 = private unnamed_addr constant [5 x i16] [i16 116, i16 101,
                                                      i16 115, i16 116, i16 0]
 ; CHECK: .section __TEXT,__ustring
-; CHECK-NEXT: .align  1
+; CHECK-NEXT: .p2align  1
 ; CHECK-NEXT: l_private2:
 
 ; There is no dedicated 4 byte strings on MachO.
 
 %struct.NSConstantString = type { i32*, i32, i8*, i32 }
 @private3 = private constant %struct.NSConstantString { i32* null, i32 1992, i8* null, i32 0 }, section "__DATA,__cfstring"
 ; CHECK: .section __DATA,__cfstring
-; CHECK-NEXT: .align  4
+; CHECK-NEXT: .p2align  4
 ; CHECK-NEXT: L_private3:
 
 ; There is no dedicated 1 or 2 byte constant section on MachO.
 
 @private4 = private unnamed_addr constant i32 42
 ; CHECK: .section __TEXT,__literal4,4byte_literals
-; CHECK-NEXT: .align  2
+; CHECK-NEXT: .p2align  2
 ; CHECK-NEXT: L_private4:
 
 @private5 = private unnamed_addr constant i64 42
 ; CHECK: .section __TEXT,__literal8,8byte_literals
-; CHECK-NEXT: .align  3
+; CHECK-NEXT: .p2align  3
 ; CHECK-NEXT: L_private5:
 
 @private6 = private unnamed_addr constant i128 42
 ; CHECK: .section __TEXT,__literal16,16byte_literals
-; CHECK-NEXT: .align  3
+; CHECK-NEXT: .p2align  3
 ; CHECK-NEXT: L_private6:
 
 %struct._objc_class = type { i8* }
 @private7 = private global %struct._objc_class* null, section "__OBJC,__cls_refs,literal_pointers,no_dead_strip"
 ; CHECK: .section __OBJC,__cls_refs,literal_pointers,no_dead_strip
-; CHECK: .align 3
+; CHECK: .p2align 3
 ; CHECK: L_private7:
 
 @private8 = private global i32* null, section "__DATA,__nl_symbol_ptr,non_lazy_symbol_pointers"
 ; CHECK: .section __DATA,__nl_symbol_ptr,non_lazy_symbol_pointers
-; CHECK-NEXT: .align  3
+; CHECK-NEXT: .p2align  3
 ; CHECK-NEXT: L_private8:
 
 @private9 = private global i32* null, section "__DATA,__la_symbol_ptr,lazy_symbol_pointers"
 ; CHECK: .section __DATA,__la_symbol_ptr,lazy_symbol_pointers
-; CHECK-NEXT: .align  3
+; CHECK-NEXT: .p2align  3
 ; CHECK-NEXT: L_private9:
 
 @private10 = private global i32* null, section "__DATA,__mod_init_func,mod_init_funcs"
 ; CHECK: .section __DATA,__mod_init_func,mod_init_funcs
-; CHECK-NEXT: .align  3
+; CHECK-NEXT: .p2align  3
 ; CHECK-NEXT: L_private10:
 
 @private11 = private global i32* null, section "__DATA,__mod_term_func,mod_term_funcs"
 ; CHECK: .section __DATA,__mod_term_func,mod_term_funcs
-; CHECK-NEXT: .align  3
+; CHECK-NEXT: .p2align  3
 ; CHECK-NEXT: L_private11:
 
 @private12 = private global i32* null, section "__DATA,__foobar,interposing"
 ; CHECK: .section __DATA,__foobar,interposing
-; CHECK-NEXT: .align  3
+; CHECK-NEXT: .p2align  3
 ; CHECK-NEXT: L_private12:
 
 @private13 = private global i32 42, section "__DATA, __objc_classlist, regular, no_dead_strip"
 ; CHECK: .section __DATA,__objc_classlist,regular,no_dead_strip
-; CHECK-NEXT: .align  2
+; CHECK-NEXT: .p2align  2
 ; CHECK-NEXT: L_private13:
 
 @private14 = private global [4 x i8] c"zed\00", section "__TEXT,__objc_classname,cstring_literals"
 ; CHECK: .section __TEXT,__objc_classname,cstring_literals
 ; CHECK-NEXT: L_private14:
 
 @private15 = private global [4 x i8] c"zed\00", section "__TEXT,__objc_methname,cstring_literals"
 ; CHECK: .section __TEXT,__objc_methname,cstring_literals
 ; CHECK-NEXT: L_private15:
 
 @private16 = private global [4 x i8] c"zed\00", section "__TEXT,__objc_methtype,cstring_literals"
 ; CHECK: .section __TEXT,__objc_methtype,cstring_literals
 ; CHECK-NEXT: L_private16:

llvm/trunk/test/CodeGen/X86/pic.ll

     
 ; LINUX-LABEL: test7:
 ; LINUX:   calll  .L7$pb
 ; LINUX: .L7$pb:
 ; LINUX:   addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L7$pb),
 ; LINUX:   .LJTI7_0@GOTOFF(
 ; LINUX:   jmpl *
 
-; LINUX: .align 4
+; LINUX: .p2align 2
 ; LINUX-NEXT: .LJTI7_0:
 ; LINUX:   .long   .LBB7_2@GOTOFF
 ; LINUX:   .long   .LBB7_8@GOTOFF
 ; LINUX:   .long   .LBB7_4@GOTOFF
 ; LINUX:   .long   .LBB7_6@GOTOFF
 ; LINUX:   .long   .LBB7_5@GOTOFF
 ; LINUX:   .long   .LBB7_8@GOTOFF
 ; LINUX:   .long   .LBB7_7@GOTOFF
 }
 
 declare void @foo1(...)
 declare void @foo2(...)
 declare void @foo6(...)
 declare void @foo3(...)
 declare void @foo4(...)
 declare void @foo5(...)

llvm/trunk/test/CodeGen/X86/postra-licm.ll

imix_test.exit:                                   ; preds = %bb.i1
   br i1 undef, label %bb23, label %bb26.preheader
 
 bb26.preheader:                                   ; preds = %imix_test.exit
   br i1 undef, label %bb28, label %bb30
 
 bb23:                                             ; preds = %imix_test.exit
   unreachable
 ; Verify that there are no loads inside the loop.
-; X86-32: .align 4
+; X86-32: .p2align 4
 ; X86-32: %bb28
 ; X86-32-NOT: (%esp),
 ; X86-32-NOT: (%ebp),
 ; X86-32: jmp
 
 bb28:                                             ; preds = %bb28, %bb26.preheader
   %counter.035 = phi i32 [ %3, %bb28 ], [ 0, %bb26.preheader ] ; <i32> [#uses=2]
   %tmp56 = shl i32 %counter.035, 2                ; <i32> [#uses=0]

 
 define void @t2(i8* nocapture %bufp, i8* nocapture %data, i32 %dsize) nounwind ssp {
 ; X86-64-LABEL: t2:
 entry:
   br i1 undef, label %return, label %bb.nph
 
 bb.nph:                                           ; preds = %entry
 ; X86-64: movq _map_4_to_16@GOTPCREL(%rip)
-; X86-64: .align 4
+; X86-64: .p2align 4
   %tmp5 = zext i32 undef to i64                   ; <i64> [#uses=1]
   %tmp6 = add i64 %tmp5, 1                        ; <i64> [#uses=1]
   %tmp11 = shl i64 undef, 1                       ; <i64> [#uses=1]
   %tmp14 = mul i64 undef, 3                       ; <i64> [#uses=1]
   br label %bb
 
 bb:                                               ; preds = %bb, %bb.nph
   %tmp9 = mul i64 undef, undef                    ; <i64> [#uses=2]

llvm/trunk/test/CodeGen/X86/regalloc-reconcile-broken-hints.ll

 ; It will not survive the call to malloc otherwise.
 ; CHECK: movq %rdi, [[ARG1:%r[0-9a-z]+]]
 ; CHECK: callq _malloc
 ; Compute %data - 1 as used for load in land.rhs.i (via the variable  %indvars.iv.next.i).
 ; CHECK: addq $-4, [[ARG1]]
 ; We use to produce a useless copy here and move %data in another temporary register. 
 ; CHECK-NOT: movq [[ARG1]]
 ; End of the first basic block.
-; CHECK: .align
+; CHECK: .p2align
 ; Now check that %data is used in an address computation.
 ; CHECK: leaq ([[ARG1]]
 define %struct._list* @make_list(i32* nocapture readonly %data, i32* nocapture %value, i32* nocapture %all) {
 entry:
   %call = tail call i8* @malloc(i64 16)
   %next = getelementptr inbounds i8, i8* %call, i64 8
   %tmp = bitcast i8* %next to %struct._list**
   %tmp2 = bitcast i8* %call to %struct._list*

llvm/trunk/test/CodeGen/X86/seh-catch-all-win32.ll

 ;       EH state -1
 ; CHECK: movl [[code_offs]](%ebp), %[[code:[a-z]+]]
 ; CHECK-DAG: movl %[[code]], 4(%esp)
 ; CHECK-DAG: movl $_str, (%esp)
 ; CHECK: calll _printf
 
 ; CHECK: .section .xdata,"dr"
 ; CHECK: Lmain$parent_frame_offset = [[reg_offs]]
-; CHECK: .align 4
+; CHECK: .p2align 2
 ; CHECK: L__ehtable$main
 ; CHECK-NEXT: .long -1
 ; CHECK-NEXT: .long _filt$main
 ; CHECK-NEXT: .long LBB0_[[lpbb]]
 
 ; CHECK-LABEL: _filt$main:
 ; CHECK: pushl %ebp
 ; CHECK: movl %esp, %ebp
 ; CHECK: movl (%ebp), %[[oldebp:[a-z]+]]
 ; CHECK: movl -20(%[[oldebp]]), %[[ehinfo:[a-z]+]]
 ; CHECK: movl (%[[ehinfo]]), %[[ehrec:[a-z]+]]
 ; CHECK: movl (%[[ehrec]]), %[[ehcode:[a-z]+]]
 ; CHECK: movl %[[ehcode]], {{.*}}(%{{.*}})

llvm/trunk/test/CodeGen/X86/stackmap-large-constants.ll

 ; CHECK-NEXT:   .short  0
 ; Offset
 ; CHECK-NEXT:   .long 0
 ; padding
 ; CHECK-NEXT:   .short  0
 ; NumLiveOuts
 ; CHECK-NEXT:   .short  0
 
-; CHECK-NEXT:   .align  3
+; CHECK-NEXT:   .p2align  3
 
 declare void @llvm.experimental.stackmap(i64, i32, ...)
 
 define void @foo() {
   tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 0, i32 0, i64 9223372036854775807)
   ret void
 }
 

llvm/trunk/test/CodeGen/X86/stackmap-liveness.ll

 ; CHECK-LABEL:  .long L{{.*}}-_stackmap_liveness
 ; CHECK-NEXT:   .short  0
 ; CHECK-NEXT:   .short  0
 ; Padding
 ; CHECK-NEXT:   .short  0
 ; Num LiveOut Entries: 0
 ; CHECK-NEXT:   .short  0
 ; Align
-; CHECK-NEXT:   .align  3
+; CHECK-NEXT:   .p2align  3
 
 ; StackMap 1 (patchpoint liveness information enabled)
 ; PATCH-LABEL:  .long L{{.*}}-_stackmap_liveness
 ; PATCH-NEXT:   .short  0
 ; PATCH-NEXT:   .short  0
 ; Padding
 ; PATCH-NEXT:   .short  0
 ; Num LiveOut Entries: 1
 ; PATCH-NEXT:   .short  1
 ; LiveOut Entry 1: %YMM2 (16 bytes) --> %XMM2
 ; PATCH-NEXT:   .short  19
 ; PATCH-NEXT:   .byte 0
 ; PATCH-NEXT:   .byte 16
 ; Align
-; PATCH-NEXT:   .align  3
+; PATCH-NEXT:   .p2align  3
   call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 12, i8* null, i32 0)
   %a2 = call i64 asm sideeffect "", "={r8}"() nounwind
   %a3 = call i8 asm sideeffect "", "={ah}"() nounwind
   %a4 = call <4 x double> asm sideeffect "", "={ymm0}"() nounwind
   %a5 = call <4 x double> asm sideeffect "", "={ymm1}"() nounwind
 
 ; StackMap 2 (no liveness information available)
 ; CHECK-LABEL:  .long L{{.*}}-_stackmap_liveness
 ; CHECK-NEXT:   .short  0
 ; CHECK-NEXT:   .short  0
 ; Padding
 ; CHECK-NEXT:   .short  0
 ; Num LiveOut Entries: 0
 ; CHECK-NEXT:   .short  0
 ; Align
-; CHECK-NEXT:   .align  3
+; CHECK-NEXT:   .p2align  3
 
 ; StackMap 2 (patchpoint liveness information enabled)
 ; PATCH-LABEL:  .long L{{.*}}-_stackmap_liveness
 ; PATCH-NEXT:   .short  0
 ; PATCH-NEXT:   .short  0
 ; Padding
 ; PATCH-NEXT:   .short  0
 ; Num LiveOut Entries: 5

 ; PATCH-NEXT:   .short  18
 ; PATCH-NEXT:   .byte 0
 ; PATCH-NEXT:   .byte 32
 ; LiveOut Entry 5: %YMM2 (16 bytes) --> %XMM2
 ; PATCH-NEXT:   .short  19
 ; PATCH-NEXT:   .byte 0
 ; PATCH-NEXT:   .byte 16
 ; Align
-; PATCH-NEXT:   .align  3
+; PATCH-NEXT:   .p2align  3
   call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 2, i32 12, i8* null, i32 0)
   call void asm sideeffect "", "{r8},{ah},{ymm0},{ymm1}"(i64 %a2, i8 %a3, <4 x double> %a4, <4 x double> %a5) nounwind
 
 ; StackMap 3 (no liveness information available)
 ; CHECK-LABEL:  .long L{{.*}}-_stackmap_liveness
 ; CHECK-NEXT:   .short  0
 ; CHECK-NEXT:   .short  0
 ; Padding
 ; CHECK-NEXT:   .short  0
 ; Num LiveOut Entries: 0
 ; CHECK-NEXT:   .short  0
 ; Align
-; CHECK-NEXT:   .align  3
+; CHECK-NEXT:   .p2align  3
 
 ; StackMap 3 (patchpoint liveness information enabled)
 ; PATCH-LABEL:  .long L{{.*}}-_stackmap_liveness
 ; PATCH-NEXT:   .short  0
 ; PATCH-NEXT:   .short  0
 ; Padding
 ; PATCH-NEXT:   .short  0
 ; Num LiveOut Entries: 2
 ; PATCH-NEXT:   .short  2
 ; LiveOut Entry 1: %RSP (8 bytes)
 ; PATCH-NEXT:   .short  7
 ; PATCH-NEXT:   .byte 0
 ; PATCH-NEXT:   .byte 8
 ; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2
 ; PATCH-NEXT:   .short  19
 ; PATCH-NEXT:   .byte 0
 ; PATCH-NEXT:   .byte 16
 ; Align
-; PATCH-NEXT:   .align  3
+; PATCH-NEXT:   .p2align  3
   call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 3, i32 12, i8* null, i32 0)
   call void asm sideeffect "", "{xmm2}"(<2 x double> %a1) nounwind
   ret void
 }
 
 define void @mixed_liveness() {
 entry:
   %a1 = call <2 x double> asm sideeffect "", "={xmm2}"() nounwind
 ; StackMap 4 (patchpoint liveness information enabled)
 ; PATCH-LABEL:  .long L{{.*}}-_mixed_liveness
 ; PATCH-NEXT:   .short  0
 ; PATCH-NEXT:   .short  0
 ; Padding
 ; PATCH-NEXT:   .short  0
 ; Num LiveOut Entries: 0
 ; PATCH-NEXT:   .short  0
 ; Align
-; PATCH-NEXT:   .align  3
+; PATCH-NEXT:   .p2align  3
 
 ; StackMap 5 (patchpoint liveness information enabled)
 ; PATCH-LABEL:  .long L{{.*}}-_mixed_liveness
 ; PATCH-NEXT:   .short  0
 ; PATCH-NEXT:   .short  0
 ; Padding
 ; PATCH-NEXT:   .short  0
 ; Num LiveOut Entries: 2
 ; PATCH-NEXT:   .short  2
 ; LiveOut Entry 1: %RSP (8 bytes)
 ; PATCH-NEXT:   .short  7
 ; PATCH-NEXT:   .byte 0
 ; PATCH-NEXT:   .byte 8
 ; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2
 ; PATCH-NEXT:   .short  19
 ; PATCH-NEXT:   .byte 0
 ; PATCH-NEXT:   .byte 16
 ; Align
-; PATCH-NEXT:   .align  3
+; PATCH-NEXT:   .p2align  3
   call void (i64, i32, ...) @llvm.experimental.stackmap(i64 4, i32 5)
   call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 5, i32 0, i8* null, i32 0)
   call void asm sideeffect "", "{xmm2}"(<2 x double> %a1) nounwind
   ret void
 }
 
 declare void @llvm.experimental.stackmap(i64, i32, ...)
 declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...)

llvm/trunk/test/CodeGen/X86/statepoint-allocas.ll

 ; Direct Spill Slot [RSP+0]
 ; CHECK: .byte  2
 ; CHECK: .byte  8
 ; CHECK: .short 7
 ; CHECK: .long  0
 ; No Padding or LiveOuts
 ; CHECK: .short 0
 ; CHECK: .short 0
-; CHECK: .align 8
+; CHECK: .p2align 3
 
 ; The Deopt one
 ; CHECK: .long  .Ltmp3-test2
 ; CHECK: .short 0
 ; CHECK: .short 4
 ; SmallConstant (0)
 ; CHECK: .byte  4
 ; CHECK: .byte  8

 ; CHECK: .byte  2
 ; CHECK: .byte  8
 ; CHECK: .short 7
 ; CHECK: .long  0
 
 ; No Padding or LiveOuts
 ; CHECK: .short 0
 ; CHECK: .short 0
-; CHECK: .align 8
+; CHECK: .p2align 3
 

llvm/trunk/test/CodeGen/X86/statepoint-invoke.ll

exceptional_return:
   %obj.relocated1 = call coldcc i64 addrspace(1)* @llvm.experimental.gc.relocate.p1i64(token %landing_pad, i32 13, i32 13)
   %obj1.relocated1 = call coldcc i64 addrspace(1)* @llvm.experimental.gc.relocate.p1i64(token %landing_pad, i32 14, i32 14)
   ret i64 addrspace(1)* %obj1.relocated1
 }
 ; CHECK-LABEL: GCC_except_table{{[0-9]+}}:
 ; CHECK: .long  .Ltmp{{[0-9]+}}-.Ltmp{{[0-9]+}}
 ; CHECK: .long  .Ltmp{{[0-9]+}}-.Lfunc_begin{{[0-9]+}}
 ; CHECK: .byte  0
-; CHECK: .align 4
+; CHECK: .p2align 4
 
 define i64 addrspace(1)* @test_result(i64 addrspace(1)* %obj,
                                       i64 addrspace(1)* %obj1)
   gc "statepoint-example" personality i32 ()* @personality_function {
 entry:
   ; CHECK: .Ltmp{{[0-9]+}}:
   ; CHECK: callq some_other_call
   ; CHECK: .Ltmp{{[0-9]+}}:
%landing_pad = landingpad token
           cleanup
   %obj.relocated = call coldcc i64 addrspace(1)* @llvm.experimental.gc.relocate.p1i64(token %landing_pad, i32 13, i32 13)
   ret i64 addrspace(1)* %obj.relocated
 }
 ; CHECK-LABEL: GCC_except_table{{[0-9]+}}:
 ; CHECK: .long .Ltmp{{[0-9]+}}-.Ltmp{{[0-9]+}}
 ; CHECK: .long .Ltmp{{[0-9]+}}-.Lfunc_begin{{[0-9]+}}
 ; CHECK: .byte 0
-; CHECK: .align 4
+; CHECK: .p2align 4
 
 define i64 addrspace(1)* @test_same_val(i1 %cond, i64 addrspace(1)* %val1, i64 addrspace(1)* %val2, i64 addrspace(1)* %val3)
   gc "statepoint-example" personality i32 ()* @"personality_function" {
 entry:
   br i1 %cond, label %left, label %right
 
 left:
   ; CHECK-LABEL: %left

llvm/trunk/test/CodeGen/X86/statepoint-stackmap-format.ll

 ; CHECK: .byte  3
 ; CHECK: .byte  8
 ; CHECK: .short 7
 ; CHECK: .long  16
 
 ; No Padding or LiveOuts
 ; CHECK: .short 0
 ; CHECK: .short 0
-; CHECK: .align 8
+; CHECK: .p2align 3
 
 ;
 ; test_derived_arg
 
 ; Statepoint ID
 ; CHECK-NEXT: .quad 0
 
 ; Callsites

 ; CHECK: .byte  3
 ; CHECK: .byte  8
 ; CHECK: .short 7
 ; CHECK: .long  16
 
 ; No Padding or LiveOuts
 ; CHECK: .short 0
 ; CHECK: .short 0
-; CHECK: .align 8
+; CHECK: .p2align 3
 
 ; Records for the test_id function:
 
 ; The Statepoint ID:
 ; CHECK-NEXT: .quad 237
 
 ; Instruction Offset
 ; CHECK-NEXT: .long .Ltmp5-test_id

 ; CHECK: .byte  4
 ; CHECK: .byte  8
 ; CHECK: .short 0
 ; CHECK: .long  0
 
 ; No padding or LiveOuts
 ; CHECK: .short 0
 ; CHECK: .short 0
-; CHECK: .align 8
+; CHECK: .p2align 3
 

llvm/trunk/test/CodeGen/X86/tls-android.ll

 ; CHECK:  __emutls_get_address
 
 ; CHECK-LABEL: get_internal_y:
 ; CHECK:  __emutls_v.internal_y
 ; CHECK:  __emutls_get_address
 
 ; CHECK-NOT: __emutls_v.external_x:
 
-; CHECK:       .align 4
+; CHECK:       .p2align 2
 ; CHECK-LABEL: __emutls_v.external_y:
 ; CHECK-NEXT:  .long 4
 ; CHECK-NEXT:  .long 4
 ; CHECK-NEXT:  .long 0
 ; CHECK-NEXT:  .long __emutls_t.external_y
 ; CHECK-LABEL: __emutls_t.external_y:
 ; CHECK-NEXT:  .long 7
 
-; CHECK:       .align 4
+; CHECK:       .p2align 2
 ; CHECK-LABEL: __emutls_v.internal_y:
 ; CHECK-NEXT:  .long 4
 ; CHECK-NEXT:  .long 4
 ; CHECK-NEXT:  .long 0
 ; CHECK-NEXT:  .long __emutls_t.internal_y
 ; CHECK-LABEL: __emutls_t.internal_y:
 ; CHECK-NEXT:  .long 9
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 64-bit mode
 ; X64-LABEL: get_external_x:
 ; X64:  __emutls_v.external_x
 ; X64:  __emutls_get_address
 
 ; X64-LABEL: get_external_y:
 ; X64:  __emutls_v.external_y
 ; X64:  __emutls_get_address
 
 ; X64-LABEL: get_internal_y:
 ; X64:  __emutls_v.internal_y
 ; X64:  __emutls_get_address
 
 ; X64-NOT: __emutls_v.external_x:
 
-; X64:       .align 8
+; X64:       .p2align 3
 ; X64-LABEL: __emutls_v.external_y:
 ; X64-NEXT:  .quad 4
 ; X64-NEXT:  .quad 4
 ; X64-NEXT:  .quad 0
 ; X64-NEXT:  .quad __emutls_t.external_y
 ; X64-LABEL: __emutls_t.external_y:
 ; X64-NEXT:  .long 7
 
-; X64:       .align 8
+; X64:       .p2align 3
 ; X64-LABEL: __emutls_v.internal_y:
 ; X64-NEXT:  .quad 4
 ; X64-NEXT:  .quad 4
 ; X64-NEXT:  .quad 0
 ; X64-NEXT:  .quad __emutls_t.internal_y
 ; X64-LABEL: __emutls_t.internal_y:
 ; X64-NEXT:  .long 9

llvm/trunk/test/CodeGen/X86/unaligned-load.ll

 
 ; CORE2: movabsq
 ; CORE2: movabsq
 ; CORE2: movabsq
 
 ; COREI7: movups _.str3
 
 ; CORE2: .section
-; CORE2: .align  3
+; CORE2: .p2align  3
 ; CORE2-NEXT: _.str1:
 ; CORE2-NEXT: .asciz "DHRYSTONE PROGRAM, SOME STRING"
-; CORE2: .align 3
+; CORE2: .p2align 3
 ; CORE2-NEXT: _.str3:

llvm/trunk/test/CodeGen/X86/utf16-cfstrings.ll

 ; RUN: llc < %s -mtriple x86_64-apple-macosx10 | FileCheck %s
 ; <rdar://problem/10655949>
 
 %0 = type opaque
 %struct.NSConstantString = type { i32*, i32, i8*, i64 }
 
 @__CFConstantStringClassReference = external global [0 x i32]
 @.str = internal unnamed_addr constant [5 x i16] [i16 252, i16 98, i16 101, i16 114, i16 0], align 2
 @_unnamed_cfstring_ = private constant %struct.NSConstantString { i32* getelementptr inbounds ([0 x i32], [0 x i32]* @__CFConstantStringClassReference, i32 0, i32 0), i32 2000, i8* bitcast ([5 x i16]* @.str to i8*), i64 4 }, section "__DATA,__cfstring"
 
 ; CHECK:         .section      __TEXT,__ustring
-; CHECK-NEXT:    .align        1
+; CHECK-NEXT:    .p2align        1
 ; CHECK-NEXT: _.str:
 ; CHECK-NEXT:    .short  252     ## 0xfc
 ; CHECK-NEXT:    .short  98      ## 0x62
 ; CHECK-NEXT:    .short  101     ## 0x65
 ; CHECK-NEXT:    .short  114     ## 0x72
 ; CHECK-NEXT:    .short  0       ## 0x0
 
 define i32 @main() uwtable ssp {

llvm/trunk/test/CodeGen/X86/win-cleanuppad.ll

 ; X64: LBB1_[[cleanup_outer]]: # %cleanup.outer{{$}}
 ; X64: pushq %rbp
 ; X64: leaq    {{.*}}(%rbp), %rcx
 ; X64: callq   "??1Dtor@@QAE@XZ"
 ; X64: popq %rbp
 ; X64: retq
 
 ; X64:        .section .xdata,"dr"
-; X64-NEXT: .align  4
+; X64-NEXT: .p2align  2
 ; X64: $cppxdata$nested_cleanup:
 ; X64-NEXT: .long   429065506
 ; X64-NEXT: .long   2
 ; X64-NEXT: .long   ($stateUnwindMap$nested_cleanup)@IMGREL
 ; X64-NEXT: .long   0
 ; X64-NEXT: .long   0
 ; X64-NEXT: .long   5
 ; X64-NEXT: .long   ($ip2state$nested_cleanup)@IMGREL

llvm/trunk/test/CodeGen/X86/win32-eh.ll

 ; CHECK: movl %[[node]], %fs:0
 ; CHECK: movl $0, -16(%ebp)
 ; CHECK: calll _may_throw_or_crash
 ; CHECK: movl -24(%ebp), %[[next:[^ ,]*]]
 ; CHECK: movl %[[next]], %fs:0
 ; CHECK: retl
 
 ; CHECK: .section .xdata,"dr"
-; CHECK: .align 4
+; CHECK: .p2align 2
 ; CHECK-LABEL: L__ehtable$use_CxxFrameHandler3:
 ; CHECK-NEXT:  .long   429065506
 ; CHECK-NEXT:  .long   2
 ; CHECK-NEXT:  .long   ($stateUnwindMap$use_CxxFrameHandler3)
 ; CHECK-NEXT:  .long   1
 ; CHECK-NEXT:  .long   ($tryMap$use_CxxFrameHandler3)
 ; CHECK-NEXT:  .long   0
 ; CHECK-NEXT:  .long   0

llvm/trunk/test/CodeGen/X86/win_cst_pool.ll

 ; RUN: llc < %s -mtriple=x86_64-win32 -mattr=sse2 | FileCheck %s
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-pc-windows-msvc"
 
 define double @double() {
   ret double 0x0000000000800000
 }
 ; CHECK:              .globl  __real@0000000000800000
 ; CHECK-NEXT:         .section        .rdata,"dr",discard,__real@0000000000800000
-; CHECK-NEXT:         .align  8
+; CHECK-NEXT:         .p2align  3
 ; CHECK-NEXT: __real@0000000000800000:
 ; CHECK-NEXT:         .quad   8388608
 ; CHECK:      double:
 ; CHECK:               movsd   __real@0000000000800000(%rip), %xmm0
 ; CHECK-NEXT:          ret
 
 define <4 x i32> @vec1() {
   ret <4 x i32> <i32 3, i32 2, i32 1, i32 0>
 }
 ; CHECK:              .globl  __xmm@00000000000000010000000200000003
 ; CHECK-NEXT:         .section        .rdata,"dr",discard,__xmm@00000000000000010000000200000003
-; CHECK-NEXT:         .align  16
+; CHECK-NEXT:         .p2align  4
 ; CHECK-NEXT: __xmm@00000000000000010000000200000003:
 ; CHECK-NEXT:         .long   3
 ; CHECK-NEXT:         .long   2
 ; CHECK-NEXT:         .long   1
 ; CHECK-NEXT:         .long   0
 ; CHECK:      vec1:
 ; CHECK:               movaps  __xmm@00000000000000010000000200000003(%rip), %xmm0
 ; CHECK-NEXT:          ret
 
 define <8 x i16> @vec2() {
   ret <8 x i16> <i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>
 }
 ; CHECK:             .globl  __xmm@00000001000200030004000500060007
 ; CHECK-NEXT:        .section        .rdata,"dr",discard,__xmm@00000001000200030004000500060007
-; CHECK-NEXT:        .align  16
+; CHECK-NEXT:        .p2align  4
 ; CHECK-NEXT: __xmm@00000001000200030004000500060007:
 ; CHECK-NEXT:        .short  7
 ; CHECK-NEXT:        .short  6
 ; CHECK-NEXT:        .short  5
 ; CHECK-NEXT:        .short  4
 ; CHECK-NEXT:        .short  3
 ; CHECK-NEXT:        .short  2
 ; CHECK-NEXT:        .short  1
 ; CHECK-NEXT:        .short  0
 ; CHECK:      vec2:
 ; CHECK:               movaps  __xmm@00000001000200030004000500060007(%rip), %xmm0
 ; CHECK-NEXT:          ret
 
 
 define <4 x float> @undef1() {
   ret <4 x float> <float 1.0, float 1.0, float undef, float undef>
 
 ; CHECK:             .globl  __xmm@00000000000000003f8000003f800000
 ; CHECK-NEXT:        .section        .rdata,"dr",discard,__xmm@00000000000000003f8000003f800000
-; CHECK-NEXT:        .align  16
+; CHECK-NEXT:        .p2align  4
 ; CHECK-NEXT: __xmm@00000000000000003f8000003f800000:
 ; CHECK-NEXT:        .long   1065353216              # float 1
 ; CHECK-NEXT:        .long   1065353216              # float 1
 ; CHECK-NEXT:        .zero   4
 ; CHECK-NEXT:        .zero   4
 ; CHECK:      undef1:
 ; CHECK:               movaps  __xmm@00000000000000003f8000003f800000(%rip), %xmm0
 ; CHECK-NEXT:          ret
 }
 
 define float @pr23966(i32 %a) {
   %tobool = icmp ne i32 %a, 0
   %sel = select i1 %tobool, float -1.000000e+00, float 1.000000e+00
   ret float %sel
 }
 
 ; CHECK:              .globl  __real@bf8000003f800000
 ; CHECK-NEXT:         .section        .rdata,"dr",discard,__real@bf8000003f800000
-; CHECK-NEXT:         .align  4
+; CHECK-NEXT:         .p2align  2
 ; CHECK-NEXT: __real@bf8000003f800000:
 ; CHECK-NEXT:         .long   1065353216
 ; CHECK-NEXT:         .long   3212836864

llvm/trunk/test/CodeGen/XCore/align.ll

 ; RUN: llc < %s -march=xcore | FileCheck %s
 
-; CHECK: .align 4
+; CHECK: .p2align 2
 ; CHECK-LABEL: f:
 define void @f() nounwind {
 entry:
   ret void
 }
 
-; CHECK: .align 2
+; CHECK: .p2align 1
 ; CHECK-LABEL: g:
 define void @g() nounwind optsize {
 entry:
   ret void
 }

llvm/trunk/test/CodeGen/XCore/epilogue_prologue.ll

 entry:
   %0 = alloca [100000 x i32]
   ret void
 }
 
 
 ; FP + large frame: spill FP+SR+R4+LR = entsp 3 + 200000  + extsp 1
 ; CHECKFP: .section .cp.rodata.cst4,"aMc",@progbits,4
-; CHECKFP-NEXT: .align 4
+; CHECKFP-NEXT: .p2align 2
 ; CHECKFP-NEXT: .LCPI[[CNST0:[0-9_]+]]:
 ; CHECKFP-NEXT: .long 200002
 ; CHECKFP-NEXT: .LCPI[[CNST1:[0-9_]+]]:
 ; CHECKFP-NEXT: .long 200001
 ; CHECKFP-NEXT: .text
 ; CHECKFP-LABEL: f6
 ; CHECKFP: entsp 65535
 ; CHECKFP-NEXT: .Ltmp{{[0-9]+}}

 ; CHECKFP-NEXT: ldw r10, sp[1]
 ; CHECKFP-NEXT: ldaw sp, sp[65535]
 ; CHECKFP-NEXT: ldaw sp, sp[65535]
 ; CHECKFP-NEXT: ldaw sp, sp[65535]
 ; CHECKFP-NEXT: retsp 3398
 ;
 ; !FP + large frame: spill SR+SR+R4+LR = entsp 4 + 200000
 ; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4
-; CHECK-NEXT: .align 4
+; CHECK-NEXT: .p2align 2
 ; CHECK-NEXT: .LCPI[[CNST0:[0-9_]+]]:
 ; CHECK-NEXT: .long 200003
 ; CHECK-NEXT: .LCPI[[CNST1:[0-9_]+]]:
 ; CHECK-NEXT: .long 200002
 ; CHECK-NEXT: .text
 ; CHECK-LABEL: f6
 ; CHECK: entsp 65535
 ; CHECK-NEXT: .Ltmp{{[0-9]+}}

llvm/trunk/test/CodeGen/XCore/scavenging.ll

entry:
   %x1 = getelementptr [100 x i32], [100 x i32]* %x, i32 0, i32 0    ; <i32*> [#uses=1]
   call void @g(i32* %x1, i32* %1) nounwind
   ret void
 }
 declare void @g(i32*, i32*)
 
 
 ; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4
-; CHECK: .align  4
+; CHECK: .p2align  2
 ; CHECK: [[ARG5:.LCPI[0-9_]+]]:
 ; CHECK: .long   100003
 ; CHECK: [[INDEX0:.LCPI[0-9_]+]]:
 ; CHECK: .long   80002
 ; CHECK: [[INDEX1:.LCPI[0-9_]+]]:
 ; CHECK: .long   81002
 ; CHECK: [[INDEX2:.LCPI[0-9_]+]]:
 ; CHECK: .long   82002