[InstCombine] Fix dbg.declare -> dbg.value conversion before a load instruction

[loladiro]

Summary

llvm.dbg.value needs the actual loaded value as the first argument, rather than it's address.

[aprantl]

Interesting. On a first glance, this almost looks like a cut&paste error from the function above it.

[ I was thinking about whether it wouldn't be better to leave it as is and add an additional DW_OP_deref to the DIExpression. This has both the advantage and disadvantage that the lifetime of the address is indefinite, which could lead to more debuggable code because the variable is available for a longer range. It could also lead to more misleading debug info, if the code is performing calculations on the loaded value and the debug info is pointing the an old version of the variable in memory. ]

In cases where the alloca cannot be elided, the dbg.declare describing the alloca will also survive, so it makes no sense to describe the address twice. We should do the same thing we do for stores and just describe the value.

Can you add a comment to the code that indicates that this is now tracking the loaded value instead of the stack slot and why this is preferable?

thanks,
adrian

[loladiro]

Found a similar problem a couple lines down, I think this is the correct fix, but do have a look.

[loladiro]

Add comment re tracking the loaded value.

[loladiro]

Small typo in the test case

[aprantl]

lib/Transforms/Utils/Local.cpp

1127 ↗

(On Diff #39028)

Shouldn't the DW_OP_deref be the first instruction in the instruction stream?

1130 ↗

(On Diff #39028)

This is definitely the right thing to do here, but I remember adding code to SelectionDAG to recognize the case where a dbg.value describes an alloca and transform the dbg.value to be indirect (this was before we had DIExpression to express this).

Found it:

SelectionDAGBuilder.cpp:4507

if (N.getNode()) {
  // A dbg.value for an alloca is always indirect.
  bool IsIndirect = isa<AllocaInst>(V) || Offset != 0;
  if (!EmitFuncArgumentDbgValue(V, Variable, Expression, dl, Offset,
                                IsIndirect, N)) {
    SDV = DAG.getDbgValue(Variable, Expression, N.getNode(), N.getResNo(),
                          IsIndirect, Offset, dl, SDNodeOrder);
    DAG.AddDbgValue(SDV, N.getNode(), false);
  }
} else if (!V->use_empty() ) {

You'll need to update this as well.
(I couldn't find the equivalent code in FastISel.cpp:1170ff)

[loladiro]

lib/Transforms/Utils/Local.cpp

1127 ↗

(On Diff #39028)

Yes, I think you're right. For rome reason I had convinced myself of the opposite, but can't remember why.

1130 ↗

(On Diff #39028)

Will do, thanks.

[loladiro]

lib/Transforms/Utils/Local.cpp

1130 ↗

(On Diff #39028)

Is there any use still for the Offset field of llvm.dbg.value, shouldn't that always be taken care of by DW_OP_bit_piece now? Should I just remove the IsIndirect check completely?

[loladiro]

Reminder to look at the latest version of this when you get the chance.

[aprantl]

Sorry, this got buried in my inbox. LGTM with the pending changes mentioned inline.

lib/Transforms/Utils/Local.cpp

1127 ↗

(On Diff #39028)

The push_back should happen before the append (probably forgot to update the patch?).

1130 ↗

(On Diff #39028)

Yes. I have an open long-term-project to audit all remaining uses of Offset and replace them with DIExpressions and eventually remove the field entirely. Same goes for the IsIndirect flag.
Are there other uses remaining in SelectionDAG? Could we already remove it (in a separate commit)?

[loladiro]

lib/Transforms/Utils/Local.cpp

1127 ↗

(On Diff #39028)

Right, I was waiting to see what to do below.

1130 ↗

(On Diff #39028)

No, I think this is the only use. I'll update this patch to remove the AllocaInst case, and we can do the Offset case in a separate commit, making sure that there aren't any test cases which rely on it.

[loladiro]

Ok, this turned out a lot trickier than expected, because some tests were relying on the isIndirect setting for printing correctly (in comments). I updated the comment printing code to account for expressions, which fixed most of that, but there were a few instances in tests where the printed comment disagreed with what was actually in the DWARF (because it wasn't accounting for expressions when printing the comments). I think I fixed most of that, but please take a look at whether everything is still semantically correct. The one test I didn't know what to do with was debug-loc-asan.ll (deleted in this patch to have a full patch that passes tests, but if you let me know how to update it properly, I'll fix it).

[aprantl]

Thanks for all the extra work!

there were a few instances in tests where the printed comment disagreed with what was actually in the DWARF

With the recent improvements in llvm-dwarfdump, we can and should just update those testcases to use llc-dwarf | llvm-dwarfdump - --debug-dump=info and check for the expressions.

test/CodeGen/ARM/debug-info-blocks.ll

2 ↗

(On Diff #40887)

We should replace this by llc_dwarf | llvm-dwarfdump -debug-dump=info and check for the actual expression there.

test/DebugInfo/Mips/dsr-fixed-objects.ll

58 ↗

(On Diff #40887)

where does the extra byte come from?

58 ↗

(On Diff #40887)

Where does the extra byte come from? The op_deref?

test/DebugInfo/X86/reference-argument.ll

6 ↗

(On Diff #40887)

That comment and the CHECK seem to contradict each other?

test/DebugInfo/X86/vla.ll

3 ↗

(On Diff #40887)

Why did you have to remove the check for breg? Ism't the op_deref lowered to one?

[loladiro]

test/DebugInfo/Mips/dsr-fixed-objects.ll

58 ↗

(On Diff #40887)

Yeah, the IR was missing an DW_OP_deref. Fixing this, then the DWARF will stay the same.

test/DebugInfo/X86/reference-argument.ll

6 ↗

(On Diff #40887)

Not sure what to say about that. Both before and after the change

0x00000101:     DW_TAG_formal_parameter [16]
                  DW_AT_location [DW_FORM_block1]	(<0x02> 74 00 )
                  DW_AT_name [DW_FORM_strp]	( .debug_str[0x0000009f] = "v")
                  DW_AT_decl_file [DW_FORM_data1]	("aggregate-indirect-arg.cpp")
                  DW_AT_decl_line [DW_FORM_data1]	(22)
                  DW_AT_type [DW_FORM_ref4]	(cu + 0x0062 => {0x00000062})

Maybe you can take a look at the radar?

test/DebugInfo/X86/vla.ll

3 ↗

(On Diff #40887)

I was mistaken, the DW_OP_breg1 is there.

[loladiro]

Updated testcases as described in my reply to your review comments

[aprantl]

The source code that reference-argument.ll was created from is in the debuginfo-tests repository:

class SVal {
public:
  ~SVal() {}
  const void* Data;
  unsigned Kind;
};

void bar(SVal &v) {}
class A {
public:
  void foo(SVal v) { bar(v); }
};

int main() {
  SVal v;
  v.Data = 0;
  v.Kind = 2142;
  A a;
  a.foo(v);
  return 0;
}

[This IR output is highly questionable, because a function argument is described by an dbg.declare() which is not exactly documented behavior.] Anyway, RSI is carrying the pointer to v, which is a DW_TAG_reference_type, so the comment is correct and it should *not* have an extra DW_OP_deref on it.

[loladiro]

It looks like current clang is still generating an DW_OP_deref. I assume the right thing to do here is an dbg.value without the DW_OP_deref? If so I'll update this test case to do that and we should look at clang to change that there as well.

[loladiro]

Actually, no, I'm confused !62, has type !9, which is the class, not a reference thereto.

[loladiro]

Bump, can you shed light on my confusion above?

[aprantl]

Ah yes. Checking the comments in the assembler output is highly misleading.
I rewrite the test to use llvm-dwarfdump in r255912. Yes, the address should be indirect.

[aprantl]

The test still passes if we replace the sketchy dbg.declare with a dbg.value:

call void @llvm.dbg.value(metadata %class.SVal* %v, i64 0, metadata !62, metadata !DIExpression(DW_OP_deref)), !dbg !61

[loladiro]

Ok, rebased and changed the reference argument test case to use dbg.value

[aprantl]

Thanks! Two more inline comments, but otherwise good to go.

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

953 ↗

(On Diff #43217)

This comment is now obsolete.

lib/Transforms/Utils/Local.cpp

1126 ↗

(On Diff #43217)

Nitpick: DbgDeclareInst::getExpression() will return an empty DIExpression() and never a nullptr, so the if (DIExpr) should be redundant.

[aprantl]

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

4519 ↗

(On Diff #43217)

Can you remind me why we are ignoring Offset for the indirection flag here but don't on line 957?

[loladiro]

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

4519 ↗

(On Diff #43217)

Because I made a mistake. We should ignore it up there as well.

[loladiro]

Update to address the latest two review comments.

[aprantl]

LGTM

[loladiro]

Before I commit this, I wanted to point out that this still has the test/DebugInfo/X86/debug-loc-asan.ll test deleted. Thoughts on what to do with that?

[aprantl]

Oh right. The correct thing to do would be to recreate the IR from source (assuming that the stuff in Local affects the IR) and update the CHECKs as necessary.

[loladiro]

Well, the problem was that running the test case through a recent clang, actually produces very small IR:

; Function Attrs: nounwind sanitize_address uwtable
define i32 @_Z3bari(i32 %y) #0 !dbg !4 {
entry:
  %y.addr = alloca i32, align 4
  store i32 %y, i32* %y.addr, align 4
  call void @llvm.dbg.declare(metadata i32* %y.addr, metadata !11, metadata !12), !dbg !13
  %0 = load i32, i32* %y.addr, align 4, !dbg !14
  %add = add nsw i32 %0, 2, !dbg !15
  ret i32 %add, !dbg !16
}

[loladiro]

Ah, found it:
-mllvm -asan-skip-promotable-allocas=0

[loladiro]

Ok, I think I figured it out. The first comment in that test case (checking that it comes in a register)
is wrong, because we don't have a dbg.value for that and was based on the incorrect printing of
debug locations in comments (it might be a separate commit to make sure that dbg.value is actually there,
but that's not in the scope for this commit). Then, the CHECK for DEBUG_VALUE was also wrong, because
it's actually a double dereference. Fix that by just removing that check, since we do check the actual
DWARF later down and that's correct.

[aprantl]

test/DebugInfo/X86/debug-loc-asan.ll

12 ↗

(On Diff #43273)

This comment needs to be updated now. Otherwise this is good!

[loladiro]

Ok, one final update to the test case, so this should be good to go now.

llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp

if (Expr->isBitPiece())
     OS << " [bit_piece offset=" << Expr->getBitPieceOffset()
        << " size=" << Expr->getBitPieceSize() << "]";
   OS << " <- ";
 
   // The second operand is only an offset if it's an immediate.
   bool Deref = MI->getOperand(0).isReg() && MI->getOperand(1).isImm();
   int64_t Offset = Deref ? MI->getOperand(1).getImm() : 0;
 
+  for (unsigned i = 0; i < Expr->getNumElements(); ++i) {
+    if (Deref) {
+      // We currently don't support extra Offsets or derefs after the first
+      // one. Bail out early instead of emitting an incorrect comment
+      OS << " [complex expression]";
+      AP.OutStreamer->emitRawComment(OS.str());
+      return true;
+    }
+    uint64_t Op = Expr->getElement(i);
+    if (Op == dwarf::DW_OP_deref) {
+      Deref = true;
+      continue;
+    }
+    uint64_t ExtraOffset = Expr->getElement(i++);
+    if (Op == dwarf::DW_OP_plus)
+      Offset += ExtraOffset;
+    else {
+      assert(Op == dwarf::DW_OP_minus);
+      Offset -= ExtraOffset;
+    }
+  }
+
   // Register or immediate value. Register 0 means undef.
   if (MI->getOperand(0).isFPImm()) {
     APFloat APF = APFloat(MI->getOperand(0).getFPImm()->getValueAPF());
     if (MI->getOperand(0).getFPImm()->getType()->isFloatTy()) {
       OS << (double)APF.convertToFloat();
     } else if (MI->getOperand(0).getFPImm()->getType()->isDoubleTy()) {
       OS << APF.convertToDouble();
     } else {

llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

if (DDI.getDI()) {
     const DbgValueInst *DI = DDI.getDI();
     DebugLoc dl = DDI.getdl();
     unsigned DbgSDNodeOrder = DDI.getSDNodeOrder();
     DILocalVariable *Variable = DI->getVariable();
     DIExpression *Expr = DI->getExpression();
     assert(Variable->isValidLocationForIntrinsic(dl) &&
            "Expected inlined-at fields to agree");
     uint64_t Offset = DI->getOffset();
-    // A dbg.value for an alloca is always indirect.
-    bool IsIndirect = isa<AllocaInst>(V) || Offset != 0;
     SDDbgValue *SDV;
     if (Val.getNode()) {
-      if (!EmitFuncArgumentDbgValue(V, Variable, Expr, dl, Offset, IsIndirect,
+      if (!EmitFuncArgumentDbgValue(V, Variable, Expr, dl, Offset, false,
                                     Val)) {
         SDV = DAG.getDbgValue(Variable, Expr, Val.getNode(), Val.getResNo(),
-                              IsIndirect, Offset, dl, DbgSDNodeOrder);
+                              false, Offset, dl, DbgSDNodeOrder);
         DAG.AddDbgValue(SDV, Val.getNode(), false);
       }
     } else
       DEBUG(dbgs() << "Dropping debug info for " << *DI << "\n");
     DanglingDebugInfoMap[V] = DanglingDebugInfo();
   }
 }
 
case Intrinsic::dbg_value: {
     } else {
       // Do not use getValue() in here; we don't want to generate code at
       // this point if it hasn't been done yet.
       SDValue N = NodeMap[V];
       if (!N.getNode() && isa<Argument>(V))
         // Check unused arguments map.
         N = UnusedArgNodeMap[V];
       if (N.getNode()) {
-        // A dbg.value for an alloca is always indirect.
-        bool IsIndirect = isa<AllocaInst>(V) || Offset != 0;
         if (!EmitFuncArgumentDbgValue(V, Variable, Expression, dl, Offset,
-                                      IsIndirect, N)) {
+                                      false, N)) {
           SDV = DAG.getDbgValue(Variable, Expression, N.getNode(), N.getResNo(),
-                                IsIndirect, Offset, dl, SDNodeOrder);
+                                false, Offset, dl, SDNodeOrder);
           DAG.AddDbgValue(SDV, N.getNode(), false);
         }
       } else if (!V->use_empty() ) {
         // Do not call getValue(V) yet, as we don't want to generate code.
         // Remember it for later.
         DanglingDebugInfo DDI(&DI, dl, SDNodeOrder);
         DanglingDebugInfoMap[V] = DDI;
       } else {

llvm/trunk/lib/Transforms/Utils/Local.cpp

bool llvm::ConvertDebugDeclareToDebugValue(DbgDeclareInst *DDI,
                                            LoadInst *LI, DIBuilder &Builder) {
   auto *DIVar = DDI->getVariable();
   auto *DIExpr = DDI->getExpression();
   assert(DIVar && "Missing variable");
 
   if (LdStHasDebugValue(DIVar, LI))
     return true;
 
-  Builder.insertDbgValueIntrinsic(LI->getOperand(0), 0, DIVar, DIExpr,
-                                  DDI->getDebugLoc(), LI);
+  // We are now tracking the loaded value instead of the address. In the
+  // future if multi-location support is added to the IR, it might be
+  // preferable to keep tracking both the loaded value and the original
+  // address in case the alloca can not be elided.
+  Instruction *DbgValue = Builder.insertDbgValueIntrinsic(
+      LI, 0, DIVar, DIExpr, DDI->getDebugLoc(), (Instruction *)nullptr);
+  DbgValue->insertAfter(LI);
   return true;
 }
 
 /// Determine whether this alloca is either a VLA or an array.
 static bool isArray(AllocaInst *AI) {
   return AI->isArrayAllocation() ||
     AI->getType()->getElementType()->isArrayTy();
 }
if (AI && !isArray(AI)) {
         if (StoreInst *SI = dyn_cast<StoreInst>(U))
           ConvertDebugDeclareToDebugValue(DDI, SI, DIB);
         else if (LoadInst *LI = dyn_cast<LoadInst>(U))
           ConvertDebugDeclareToDebugValue(DDI, LI, DIB);
         else if (CallInst *CI = dyn_cast<CallInst>(U)) {
           // This is a call by-value or some other instruction that
           // takes a pointer to the variable. Insert a *value*
           // intrinsic that describes the alloca.
+          SmallVector<uint64_t, 1> NewDIExpr;
+          auto *DIExpr = DDI->getExpression();
+          NewDIExpr.push_back(dwarf::DW_OP_deref);
+          NewDIExpr.append(DIExpr->elements_begin(), DIExpr->elements_end());
           DIB.insertDbgValueIntrinsic(AI, 0, DDI->getVariable(),
-                                      DDI->getExpression(), DDI->getDebugLoc(),
-                                      CI);
+                                      DIB.createExpression(NewDIExpr),
+                                      DDI->getDebugLoc(), CI);
         }
       DDI->eraseFromParent();
     }
   }
   return true;
 }
 
 /// FindAllocaDbgDeclare - Finds the llvm.dbg.declare intrinsic describing the

llvm/trunk/test/CodeGen/ARM/debug-info-blocks.ll

-; RUN: llc -O0 < %s | FileCheck %s
-; CHECK: @DEBUG_VALUE: foobar_func_block_invoke_0:mydata <- [%SP+{{[0-9]+}}]
+; RUN: %llc_dwarf -filetype=obj -O0 < %s | llvm-dwarfdump  - | FileCheck %s
+
+; debug_info content
+; CHECK: DW_AT_name {{.*}} "foobar_func_block_invoke_0"
+; CHECK-NOT: DW_TAG_subprogram
+; CHECK: DW_TAG_variable
+; CHECK-NOT: DW_TAG
+; CHECK-NEXT: DW_AT_location [DW_FORM_sec_offset] ([[MYDATA_LOC:0x[0-9a-f]*]])
+; CHECK-NEXT: DW_AT_name {{.*}} "mydata"
+
+; debug_loc content
+; CHECK: .debug_loc contents:
+; CHECK: [[MYDATA_LOC]]: Beginning address offset: {{.*}}
+; CHECK-NOT: {{0x[0-9a-f]*}}: Beginning address offset
+; CHECK: Location description: {{.*}} 23 04 06 23 18
+; CHECK-NOT: {{0x[0-9a-f]*}}: Beginning address offset
+; CHECK: Location description: {{.*}} 23 04 06 23 18
+
 ; Radar 9331779
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
 target triple = "thumbv7-apple-ios"
 
 %0 = type opaque
 %1 = type { [4 x i32] }
 %2 = type <{ i8*, i32, i32, i8*, %struct.Re*, i8*, %3*, %struct.my_struct* }>
 %3 = type opaque

llvm/trunk/test/DebugInfo/AArch64/coalescing.ll

 !8 = !{null}
 !9 = !{!10}
 !10 = !DILocalVariable(name: "size", line: 4, scope: !4, file: !6, type: !11)
 !11 = !DIBasicType(tag: DW_TAG_base_type, name: "unsigned int", size: 32, align: 32, encoding: DW_ATE_unsigned)
 !12 = !{i32 2, !"Dwarf Version", i32 2}
 !13 = !{i32 2, !"Debug Info Version", i32 3}
 !14 = !{!"clang version 3.6.0 (trunk 223149) (llvm/trunk 223115)"}
 !15 = !DILocation(line: 5, column: 3, scope: !4)
-!16 = !DIExpression()
+!16 = !DIExpression(DW_OP_deref)
 !17 = !DILocation(line: 4, column: 12, scope: !4)
 !18 = !DILocation(line: 8, column: 1, scope: !4)

llvm/trunk/test/DebugInfo/Mips/dsr-fixed-objects.ll

 ; x -> DW_OP_reg1(51)
 ; F0: 0x00000014: Beginning address offset: 0x0000000000000028
 ; F0:                Ending address offset: 0x0000000000000030
 ; F0:                 Location description: 51
 
 define i32 @f0(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e) !dbg !4 {
 entry:
   %x = alloca i32, align 4
-  tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !9, metadata !26), !dbg !27
-  tail call void @llvm.dbg.value(metadata i32 %b, i64 0, metadata !10, metadata !26), !dbg !28
-  tail call void @llvm.dbg.value(metadata i32 %c, i64 0, metadata !11, metadata !26), !dbg !29
-  tail call void @llvm.dbg.value(metadata i32 %d, i64 0, metadata !12, metadata !26), !dbg !30
-  tail call void @llvm.dbg.value(metadata i32 %e, i64 0, metadata !13, metadata !26), !dbg !31
+  tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !9,  metadata !DIExpression()), !dbg !27
+  tail call void @llvm.dbg.value(metadata i32 %b, i64 0, metadata !10, metadata !DIExpression()), !dbg !28
+  tail call void @llvm.dbg.value(metadata i32 %c, i64 0, metadata !11, metadata !DIExpression()), !dbg !29
+  tail call void @llvm.dbg.value(metadata i32 %d, i64 0, metadata !12, metadata !DIExpression()), !dbg !30
+  tail call void @llvm.dbg.value(metadata i32 %e, i64 0, metadata !13, metadata !DIExpression()), !dbg !31
   %0 = bitcast i32* %x to i8*, !dbg !32
   call void @llvm.lifetime.start(i64 4, i8* %0) #4, !dbg !32
   %add = add nsw i32 %b, %a, !dbg !33
   %add1 = add nsw i32 %add, %c, !dbg !34
   %add2 = add nsw i32 %add1, %d, !dbg !35
   %add3 = add nsw i32 %add2, %e, !dbg !36
-  tail call void @llvm.dbg.value(metadata i32 %add3, i64 0, metadata !14, metadata !26), !dbg !37
+  tail call void @llvm.dbg.value(metadata i32 %add3, i64 0, metadata !14, metadata !DIExpression()), !dbg !37
   store i32 %add3, i32* %x, align 4, !dbg !37, !tbaa !38
   tail call void @llvm.dbg.value(metadata i32* %x, i64 0, metadata !14, metadata !26), !dbg !37
   call void @foo(i32* nonnull %x) #4, !dbg !42
   call void @llvm.dbg.value(metadata i32* %x, i64 0, metadata !14, metadata !26), !dbg !37
   %1 = load i32, i32* %x, align 4, !dbg !43, !tbaa !38
   call void @llvm.lifetime.end(i64 4, i8* %0) #4, !dbg !44
   ret i32 %1, !dbg !45
 }
 
 
 ; F1: DW_AT_location [DW_FORM_sec_offset]   (0x00000033)
 ; F1: DW_AT_name [DW_FORM_strp]     ( .debug_str[0x0000006b] = "x")
 
 ; x -> DW_OP_reg1(51)
 ; F1: 0x00000033: Beginning address offset: 0x0000000000000080
 ; F1:                Ending address offset: 0x0000000000000088
 ; F1:                 Location description: 51
 
 define i32 @f1(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e) !dbg !15 {
 entry:
   %x = alloca i32, align 16
-  tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !17, metadata !26), !dbg !46
-  tail call void @llvm.dbg.value(metadata i32 %b, i64 0, metadata !18, metadata !26), !dbg !47
-  tail call void @llvm.dbg.value(metadata i32 %c, i64 0, metadata !19, metadata !26), !dbg !48
-  tail call void @llvm.dbg.value(metadata i32 %d, i64 0, metadata !20, metadata !26), !dbg !49
-  tail call void @llvm.dbg.value(metadata i32 %e, i64 0, metadata !21, metadata !26), !dbg !50
+  tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !17, metadata !DIExpression()), !dbg !46
+  tail call void @llvm.dbg.value(metadata i32 %b, i64 0, metadata !18, metadata !DIExpression()), !dbg !47
+  tail call void @llvm.dbg.value(metadata i32 %c, i64 0, metadata !19, metadata !DIExpression()), !dbg !48
+  tail call void @llvm.dbg.value(metadata i32 %d, i64 0, metadata !20, metadata !DIExpression()), !dbg !49
+  tail call void @llvm.dbg.value(metadata i32 %e, i64 0, metadata !21, metadata !DIExpression()), !dbg !50
   %0 = bitcast i32* %x to i8*, !dbg !51
   call void @llvm.lifetime.start(i64 4, i8* %0) #4, !dbg !51
   %add = add nsw i32 %b, %a, !dbg !52
   %add1 = add nsw i32 %add, %c, !dbg !53
   %add2 = add nsw i32 %add1, %d, !dbg !54
   %add3 = add nsw i32 %add2, %e, !dbg !55
-  tail call void @llvm.dbg.value(metadata i32 %add3, i64 0, metadata !22, metadata !26), !dbg !56
+  tail call void @llvm.dbg.value(metadata i32 %add3, i64 0, metadata !22, metadata !DIExpression()), !dbg !56
   store i32 %add3, i32* %x, align 16, !dbg !56, !tbaa !38
   tail call void @llvm.dbg.value(metadata i32* %x, i64 0, metadata !22, metadata !26), !dbg !56
   call void @foo(i32* nonnull %x) #4, !dbg !57
   call void @llvm.dbg.value(metadata i32* %x, i64 0, metadata !22, metadata !26), !dbg !56
   %1 = load i32, i32* %x, align 16, !dbg !58, !tbaa !38
   call void @llvm.lifetime.end(i64 4, i8* %0) #4, !dbg !59
   ret i32 %1, !dbg !60
 }

 !18 = !DILocalVariable(name: "b", arg: 2, scope: !15, file: !1, line: 11, type: !7)
 !19 = !DILocalVariable(name: "c", arg: 3, scope: !15, file: !1, line: 11, type: !7)
 !20 = !DILocalVariable(name: "d", arg: 4, scope: !15, file: !1, line: 11, type: !7)
 !21 = !DILocalVariable(name: "e", arg: 5, scope: !15, file: !1, line: 11, type: !7)
 !22 = !DILocalVariable(name: "x", scope: !15, file: !1, line: 12, type: !7)
 !23 = !{i32 2, !"Dwarf Version", i32 4}
 !24 = !{i32 2, !"Debug Info Version", i32 3}
 !25 = !{!"clang version 3.8.0 (trunk 251783) (llvm/trunk 251781)"}
-!26 = !DIExpression()
+!26 = !DIExpression(DW_OP_deref)
 !27 = !DILocation(line: 4, column: 12, scope: !4)
 !28 = !DILocation(line: 4, column: 19, scope: !4)
 !29 = !DILocation(line: 4, column: 26, scope: !4)
 !30 = !DILocation(line: 4, column: 33, scope: !4)
 !31 = !DILocation(line: 4, column: 40, scope: !4)
 !32 = !DILocation(line: 5, column: 3, scope: !4)
 !33 = !DILocation(line: 5, column: 13, scope: !4)
 !34 = !DILocation(line: 5, column: 17, scope: !4)

llvm/trunk/test/DebugInfo/X86/array.ll

define void @f(i32* nocapture %p) #0 !dbg !4 {
   ret void, !dbg !34
 }
 
 ; Function Attrs: nounwind ssp uwtable
 define i32 @main(i32 %argc, i8** nocapture readnone %argv) #0 !dbg !12 {
   %array = alloca [4 x i32], align 16
   tail call void @llvm.dbg.value(metadata i32 %argc, i64 0, metadata !19, metadata !DIExpression()), !dbg !35
   tail call void @llvm.dbg.value(metadata i8** %argv, i64 0, metadata !20, metadata !DIExpression()), !dbg !35
-  tail call void @llvm.dbg.value(metadata [4 x i32]* %array, i64 0, metadata !21, metadata !DIExpression()), !dbg !36
+  tail call void @llvm.dbg.value(metadata [4 x i32]* %array, i64 0, metadata !21, metadata !DIExpression(DW_OP_deref)), !dbg !36
   %1 = bitcast [4 x i32]* %array to i8*, !dbg !36
   call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* bitcast ([4 x i32]* @main.array to i8*), i64 16, i32 16, i1 false), !dbg !36
-  tail call void @llvm.dbg.value(metadata [4 x i32]* %array, i64 0, metadata !21, metadata !DIExpression()), !dbg !36
+  tail call void @llvm.dbg.value(metadata [4 x i32]* %array, i64 0, metadata !21, metadata !DIExpression(DW_OP_deref)), !dbg !36
   %2 = getelementptr inbounds [4 x i32], [4 x i32]* %array, i64 0, i64 0, !dbg !37
   call void @f(i32* %2), !dbg !37
-  tail call void @llvm.dbg.value(metadata [4 x i32]* %array, i64 0, metadata !21, metadata !DIExpression()), !dbg !36
+  tail call void @llvm.dbg.value(metadata [4 x i32]* %array, i64 0, metadata !21, metadata !DIExpression(DW_OP_deref)), !dbg !36
   %3 = load i32, i32* %2, align 16, !dbg !38, !tbaa !30
   ret i32 %3, !dbg !38
 }
 
 ; Function Attrs: nounwind
 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #1
 
 ; Function Attrs: nounwind readnone

llvm/trunk/test/DebugInfo/X86/dbg-value-const-byref.ll

 entry:
   %i = alloca i32, align 4
   call void @llvm.dbg.value(metadata i32 3, i64 0, metadata !10, metadata !DIExpression()), !dbg !15
   %call = call i32 @f3(i32 3) #3, !dbg !16
   call void @llvm.dbg.value(metadata i32 7, i64 0, metadata !10, metadata !DIExpression()), !dbg !18
   %call1 = call i32 (...) @f1() #3, !dbg !19
   call void @llvm.dbg.value(metadata i32 %call1, i64 0, metadata !10, metadata !DIExpression()), !dbg !19
   store i32 %call1, i32* %i, align 4, !dbg !19, !tbaa !20
-  call void @llvm.dbg.value(metadata i32* %i, i64 0, metadata !10, metadata !DIExpression()), !dbg !24
+  call void @llvm.dbg.value(metadata i32* %i, i64 0, metadata !10, metadata !DIExpression(DW_OP_deref)), !dbg !24
   call void @f2(i32* %i) #3, !dbg !24
   ret i32 0, !dbg !25
 }
 
 declare i32 @f3(i32)
 
 declare i32 @f1(...)
 

llvm/trunk/test/DebugInfo/X86/debug-loc-asan.ll

 ; RUN: llc -O0 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
 
 ; Verify that we have correct debug info for local variables in code
 ; instrumented with AddressSanitizer.
 
 ; Generated from the source file test.cc:
 ; int bar(int y) {
 ;   return y + 2;
 ; }
-; with "clang++ -S -emit-llvm -fsanitize=address -O0 -g test.cc"
+; with "clang++ -S -emit-llvm -mllvm -asan-skip-promotable-allocas=0 -fsanitize=address -O0 -g test.cc"
 
-; First, argument variable "y" resides in %rdi:
-; CHECK: DEBUG_VALUE: bar:y <- %RDI
-
-; Then its address is stored in a location on a stack:
+; The address of the (potentially now malloc'ed) alloca ends up
+; in RDI, after which it is spilled to the stack. We record the
+; spill OFFSET on the stack for checking the debug info below.
+; CHECK: #DEBUG_VALUE: bar:y <- [%RDI+0]
 ; CHECK: movq %rdi, [[OFFSET:[0-9]+]](%rsp)
 ; CHECK-NEXT: [[START_LABEL:.Ltmp[0-9]+]]
-; CHECK-NEXT: DEBUG_VALUE: bar:y <- [%RSP+[[OFFSET]]]
 ; This location should be valid until the end of the function.
 
 ; CHECK: .Ldebug_loc{{[0-9]+}}:
 ; We expect two location ranges for the variable.
 
 ; First, its address is stored in %rdi:
 ; CHECK:      .quad .Lfunc_begin0-.Lfunc_begin0
 ; CHECK-NEXT: .quad [[START_LABEL]]-.Lfunc_begin0

llvm/trunk/test/DebugInfo/X86/op_deref.ll

 
 ; CHECK-NOT: DW_TAG
 ; CHECK: DW_AT_name [DW_FORM_strp]  ( .debug_str[0x00000067] = "vla")
 
 ; Unfortunately llvm-dwarfdump can't unparse a list of DW_AT_locations
 ; right now, so we check the asm output:
 ; RUN: llc -O0 -mtriple=x86_64-apple-darwin %s -o - -filetype=asm | FileCheck %s -check-prefix=ASM-CHECK
 ; vla should have a register-indirect address at one point.
-; ASM-CHECK: DEBUG_VALUE: vla <- %RCX
+; ASM-CHECK: DEBUG_VALUE: vla <- [%RCX+0]
 ; ASM-CHECK: DW_OP_breg2
 
 ; RUN: llvm-as %s -o - | llvm-dis - | FileCheck %s --check-prefix=PRETTY-PRINT
-; PRETTY-PRINT: DIExpression(DW_OP_deref, DW_OP_deref)
+; PRETTY-PRINT: DIExpression(DW_OP_deref)
 
 define void @testVLAwithSize(i32 %s) nounwind uwtable ssp !dbg !5 {
 entry:
   %s.addr = alloca i32, align 4
   %saved_stack = alloca i8*
   %i = alloca i32, align 4
   store i32 %s, i32* %s.addr, align 4
   call void @llvm.dbg.declare(metadata i32* %s.addr, metadata !10, metadata !DIExpression()), !dbg !11

 !22 = distinct !DILexicalBlock(line: 5, column: 3, file: !28, scope: !13)
 !23 = !DILocation(line: 6, column: 5, scope: !24)
 !24 = distinct !DILexicalBlock(line: 5, column: 27, file: !28, scope: !22)
 !25 = !DILocation(line: 7, column: 3, scope: !24)
 !26 = !DILocation(line: 5, column: 22, scope: !22)
 !27 = !DILocation(line: 8, column: 1, scope: !13)
 !28 = !DIFile(filename: "bar.c", directory: "/Users/echristo/tmp")
 !29 = !{i32 1, !"Debug Info Version", i32 3}
-!30 = !DIExpression(DW_OP_deref, DW_OP_deref)
+!30 = !DIExpression(DW_OP_deref)

llvm/trunk/test/DebugInfo/X86/reference-argument.ll

 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.9.0"
 
 %class.SVal = type { i8*, i32 }
 %class.A = type { i8 }
 
 declare void @_Z3barR4SVal(%class.SVal* %v)
 declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
 declare i32 @main()
 ; Function Attrs: nounwind ssp uwtable
 define linkonce_odr void @_ZN1A3fooE4SVal(%class.A* %this, %class.SVal* %v) nounwind ssp uwtable align 2 !dbg !35 {
 entry:
   %this.addr = alloca %class.A*, align 8
   store %class.A* %this, %class.A** %this.addr, align 8
   call void @llvm.dbg.declare(metadata %class.A** %this.addr, metadata !59, metadata !DIExpression()), !dbg !61
-  call void @llvm.dbg.declare(metadata %class.SVal* %v, metadata !62, metadata !DIExpression(DW_OP_deref)), !dbg !61
+  call void @llvm.dbg.value(metadata %class.SVal* %v, i64 0, metadata !62, metadata !DIExpression(DW_OP_deref)), !dbg !61
   %this1 = load %class.A*, %class.A** %this.addr
   call void @_Z3barR4SVal(%class.SVal* %v), !dbg !61
   ret void, !dbg !61
 }
 declare void @_ZN4SValD1Ev(%class.SVal* %this)
 declare void @_ZN4SValD2Ev(%class.SVal* %this)
 
 !llvm.dbg.cu = !{!0}

llvm/trunk/test/DebugInfo/X86/vla.ll

 ; RUN: llc -O0 -mtriple=x86_64-apple-darwin -filetype=asm %s -o - | FileCheck %s
 ; Ensure that we generate an indirect location for the variable length array a.
-; CHECK: ##DEBUG_VALUE: vla:a <- %RDX
+; CHECK: ##DEBUG_VALUE: vla:a <- [%RDX+0]
 ; CHECK: DW_OP_breg1
 ; rdar://problem/13658587
 ;
 ; generated from:
 ;
 ; int vla(int n) {
 ;   int a[n];
 ;   a[0] = 42;

llvm/trunk/test/Transforms/Util/simplify-dbg-declare-load.ll

+; RUN: opt -instcombine -S < %s | FileCheck %s
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-pc-linux-gnu"
+
+%foo = type { i64, i32, i32 }
+
+; Function Attrs: nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #0
+declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0
+
+; Function Attrs: sspreq
+define void @julia_fastshortest_6256() #1 {
+top:
+  %cp = alloca %foo, align 8
+  call void @llvm.dbg.declare(metadata %foo* %cp, metadata !1, metadata !16), !dbg !17
+  br i1 undef, label %idxend, label %fail
+
+fail:                                             ; preds = %top
+  unreachable
+
+idxend:                                           ; preds = %top
+; CHECK-NOT call void @llvm.dbg.value(metadata %foo* %cp, i64 0, metadata !1, metadata !16), !dbg !17
+  %0 = load volatile %foo, %foo* %cp, align 8
+; CHECK: call void @llvm.dbg.value(metadata %foo %0, i64 0, metadata !1, metadata !16), !dbg !17
+  store volatile %foo %0, %foo* undef, align 8
+  ret void
+}
+
+attributes #0 = { nounwind readnone }
+attributes #1 = { sspreq }
+
+!llvm.module.flags = !{!0}
+!llvm.dbg.cu = !{}
+
+!0 = !{i32 1, !"Debug Info Version", i32 3}
+!1 = !DILocalVariable(name: "cp", scope: !2, file: !3, line: 106, type: !12)
+!2 = distinct !DISubprogram(name: "fastshortest", linkageName: "julia_fastshortest_6256", scope: null, file: !3, type: !4, isLocal: false, isDefinition: true, isOptimized: true, variables: !11)
+!3 = !DIFile(filename: "grisu/fastshortest.jl", directory: ".")
+!4 = !DISubroutineType(types: !5)
+!5 = !{!6, !7}
+!6 = !DIBasicType(name: "Float64", size: 64, align: 64, encoding: DW_ATE_unsigned)
+!7 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !8, size: 64, align: 64)
+!8 = !DICompositeType(tag: DW_TAG_structure_type, name: "jl_value_t", file: !9, line: 71, align: 64, elements: !10)
+!9 = !DIFile(filename: "julia.h", directory: "")
+!10 = !{!7}
+!11 = !{}
+!12 = !DICompositeType(tag: DW_TAG_structure_type, name: "Float", size: 128, align: 64, elements: !13, runtimeLang: DW_LANG_Julia)
+!13 = !{!14, !15, !15}
+!14 = !DIBasicType(name: "UInt64", size: 64, align: 64, encoding: DW_ATE_unsigned)
+!15 = !DIBasicType(name: "Int32", size: 32, align: 32, encoding: DW_ATE_unsigned)
+!16 = !DIExpression()
+!17 = !DILocation(line: 106, scope: !2)