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Differential D14144

[4/4] Enable tests for invalid instructions to run on both ARMv7 and ARMv8
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Authored by tyomitch on Oct 28 2015, 3:09 AM.

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Reviewers
rengolin
jmolloy

Diff Detail

Event Timeline

tyomitch updated this revision to Diff 38642.Oct 28 2015, 3:09 AM
tyomitch retitled this revision from to [4/4] Enable tests for invalid instructions to run on both ARMv7 and ARMv8.
tyomitch added reviewers: jmolloy, rengolin.
tyomitch added a subscriber: llvm-commits.
Herald added subscribers: rengolin, aemerson. · View Herald TranscriptOct 28 2015, 3:09 AM
rengolin accepted this revision.Oct 28 2015, 4:03 AM
rengolin edited edge metadata.

LGTM. Thanks!

This revision is now accepted and ready to land.Oct 28 2015, 4:03 AM
tyomitch closed this revision.Oct 28 2015, 7:28 AM

Merged into r251516

Revision Contents

PathSize
test/
MC/
ARM/
64 lines
8 lines

Diff 38642

test/MC/ARM/diagnostics.s

@ RUN: not llvm-mc -triple=armv7-apple-darwin < %s 2> %t @ RUN: not llvm-mc -triple=armv7-apple-darwin < %s 2> %t
@ RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s @ RUN: FileCheck --check-prefix=CHECK-ERRORS --check-prefix=CHECK-ERRORS-V7 < %t %s
@ RUN: not llvm-mc -triple=armv8 < %s 2> %t @ RUN: not llvm-mc -triple=armv8 < %s 2> %t
@ RUN: FileCheck --check-prefix=CHECK-ERRORS-V8 < %t %s @ RUN: FileCheck --check-prefix=CHECK-ERRORS --check-prefix=CHECK-ERRORS-V8 < %t %s
@ Check for various assembly diagnostic messages on invalid input. @ Check for various assembly diagnostic messages on invalid input.
@ 's' bit on an instruction that can't accept it. @ 's' bit on an instruction that can't accept it.
mlss r1, r2, r3, r4 mlss r1, r2, r3, r4
@ CHECK-ERRORS: error: instruction 'mls' can not set flags, @ CHECK-ERRORS: error: instruction 'mls' can not set flags,
@ CHECK-ERRORS: but 's' suffix specified @ CHECK-ERRORS: but 's' suffix specified
▲ Show 20 Lines • Show All 80 Lines • ▼ Show 20 Lines@ CHECK-ERRORS: pld r4, [r5, r6, rrx #0]
@ Out of range 16-bit immediate on BKPT @ Out of range 16-bit immediate on BKPT
bkpt #65536 bkpt #65536
@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: error: invalid operand for instruction
@ Out of range immediates for v8 HLT instruction. @ Out of range immediates for v8 HLT instruction.
hlt #65536 hlt #65536
hlt #-1 hlt #-1
@CHECK-ERRORS-V8: error: invalid operand for instruction @CHECK-ERRORS: error: invalid operand for instruction
@CHECK-ERRORS-V8: hlt #65536 @CHECK-ERRORS: hlt #65536
@CHECK-ERRORS-V8: ^ @CHECK-ERRORS: ^
@CHECK-ERRORS-V8: error: invalid operand for instruction @CHECK-ERRORS: error: invalid operand for instruction
@CHECK-ERRORS-V8: hlt #-1 @CHECK-ERRORS: hlt #-1
@CHECK-ERRORS-V8: ^ @CHECK-ERRORS: ^
@ Illegal condition code for v8 HLT instruction. @ Illegal condition code for v8 HLT instruction.
hlteq #2 hlteq #2
hltlt #23 hltlt #23
@CHECK-ERRORS-V8: error: instruction 'hlt' is not predicable, but condition code specified @CHECK-ERRORS: error: instruction 'hlt' is not predicable, but condition code specified
@CHECK-ERRORS-V8: hlteq #2 @CHECK-ERRORS: hlteq #2
@CHECK-ERRORS-V8: ^ @CHECK-ERRORS: ^
@CHECK-ERRORS-V8: error: instruction 'hlt' is not predicable, but condition code specified @CHECK-ERRORS: error: instruction 'hlt' is not predicable, but condition code specified
@CHECK-ERRORS-V8: hltlt #23 @CHECK-ERRORS: hltlt #23
@CHECK-ERRORS-V8: ^ @CHECK-ERRORS: ^
@ Out of range 4 and 3 bit immediates on CDP[2] @ Out of range 4 and 3 bit immediates on CDP[2]
@ Out of range immediates for CDP/CDP2 @ Out of range immediates for CDP/CDP2
cdp p7, #2, c1, c1, c1, #8 cdp p7, #2, c1, c1, c1, #8
cdp p7, #1, c1, c1, c1, #8 cdp p7, #1, c1, c1, c1, #8
cdp2 p7, #2, c1, c1, c1, #8 cdp2 p7, #2, c1, c1, c1, #8
cdp2 p7, #1, c1, c1, c1, #8 cdp2 p7, #1, c1, c1, c1, #8
Show All 19 Lines@ CHECK-ERRORS: dbg #16
mcr2 p7, #1, r5, c1, c1, #8 mcr2 p7, #1, r5, c1, c1, #8
mcrr p7, #16, r5, r4, c1 mcrr p7, #16, r5, r4, c1
mcrr2 p7, #16, r5, r4, c1 mcrr2 p7, #16, r5, r4, c1
@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: error: immediate operand must be in the range [0,15] @ CHECK-ERRORS: error: immediate operand must be in the range [0,15]
@ CHECK-ERRORS: error: immediate operand must be in the range [0,15] @ CHECK-ERRORS-V7: error: immediate operand must be in the range [0,15]
@ CHECK-ERRORS-V8: error: invalid operand for instruction
@ p10 and p11 are reserved for NEON @ p10 and p11 are reserved for NEON
mcr p10, #2, r5, c1, c1, #4 mcr p10, #2, r5, c1, c1, #4
mcrr p11, #8, r5, r4, c1 mcrr p11, #8, r5, r4, c1
@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: error: invalid operand for instruction
@ Out of range immediate for MOV @ Out of range immediate for MOV
Show All 17 Lines@ CHECK-ERRORS: error: invalid operand for instruction
mrc2 p14, #0, r1, c1, c2, #9 mrc2 p14, #0, r1, c1, c2, #9
mrrc p7, #16, r5, r4, c1 mrrc p7, #16, r5, r4, c1
mrrc2 p7, #17, r5, r4, c1 mrrc2 p7, #17, r5, r4, c1
@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: error: immediate operand must be in the range [0,15] @ CHECK-ERRORS: error: immediate operand must be in the range [0,15]
@ CHECK-ERRORS: error: immediate operand must be in the range [0,15] @ CHECK-ERRORS-V7: error: immediate operand must be in the range [0,15]
@ CHECK-ERRORS-V8: error: invalid operand for instruction
@ Shifter operand validation for PKH instructions. @ Shifter operand validation for PKH instructions.
pkhbt r2, r2, r3, lsl #-1 pkhbt r2, r2, r3, lsl #-1
pkhbt r2, r2, r3, lsl #32 pkhbt r2, r2, r3, lsl #32
pkhtb r2, r2, r3, asr #0 pkhtb r2, r2, r3, asr #0
pkhtb r2, r2, r3, asr #33 pkhtb r2, r2, r3, asr #33
pkhbt r2, r2, r3, asr #3 pkhbt r2, r2, r3, asr #3
pkhtb r2, r2, r3, lsl #3 pkhtb r2, r2, r3, lsl #3
▲ Show 20 Lines • Show All 194 Lines • ▼ Show 20 Lines
@ CHECK-ERRORS: error: non-contiguous register range @ CHECK-ERRORS: error: non-contiguous register range
@ CHECK-ERRORS: vpush {s0, s3} @ CHECK-ERRORS: vpush {s0, s3}
@ CHECK-ERRORS: ^ @ CHECK-ERRORS: ^
@ Out of range coprocessor option immediate. @ Out of range coprocessor option immediate.
ldc2 p2, c8, [r1], { 256 } ldc2 p2, c8, [r1], { 256 }
ldc2 p2, c8, [r1], { -1 } ldc2 p2, c8, [r1], { -1 }
@ CHECK-ERRORS: error: coprocessor option must be an immediate in range [0, 255] @ CHECK-ERRORS-V7: error: coprocessor option must be an immediate in range [0, 255]
@ CHECK-ERRORS: ldc2 p2, c8, [r1], { 256 } @ CHECK-ERRORS-V7: ldc2 p2, c8, [r1], { 256 }
@ CHECK-ERRORS: ^ @ CHECK-ERRORS-V7: ^
@ CHECK-ERRORS: error: coprocessor option must be an immediate in range [0, 255] @ CHECK-ERRORS-V8: error: register expected
@ CHECK-ERRORS: ldc2 p2, c8, [r1], { -1 } @ CHECK-ERRORS-V7: error: coprocessor option must be an immediate in range [0, 255]
@ CHECK-ERRORS: ^ @ CHECK-ERRORS-V7: ldc2 p2, c8, [r1], { -1 }
@ CHECK-ERRORS-V7: ^
@ CHECK-ERRORS-V8: error: register expected
@ Bad CPS instruction format. @ Bad CPS instruction format.
cps f,#1 cps f,#1
@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: cps f,#1 @ CHECK-ERRORS: cps f,#1
@ CHECK-ERRORS: ^ @ CHECK-ERRORS: ^
@ Bad operands for msr @ Bad operands for msr
▲ Show 20 Lines • Show All 54 Lines • ▼ Show 20 Lines@ CHECK-ERRORS: error: writeback register not allowed in register list
vrintz.f32.f32 s0, s1 vrintz.f32.f32 s0, s1
vrintr.f32 s0, s1 vrintr.f32 s0, s1
vrintx.f64.f64 d2, d5 vrintx.f64.f64 d2, d5
vrintz.f64 d10, d9 vrintz.f64 d10, d9
vrinta.f32.f32 s6, s7 vrinta.f32.f32 s6, s7
vrintn.f32 s8, s9 vrintn.f32 s8, s9
vrintp.f64.f64 d10, d11 vrintp.f64.f64 d10, d11
vrintm.f64 d12, d13 vrintm.f64 d12, d13
@ CHECK-ERRORS: error: instruction requires: FPARMv8 @ CHECK-ERRORS-V7: error: instruction requires: FPARMv8
@ CHECK-ERRORS: error: instruction requires: FPARMv8 @ CHECK-ERRORS-V7: error: instruction requires: FPARMv8
@ CHECK-ERRORS: error: instruction requires: FPARMv8 @ CHECK-ERRORS-V7: error: instruction requires: FPARMv8
@ CHECK-ERRORS: error: instruction requires: FPARMv8 @ CHECK-ERRORS-V7: error: instruction requires: FPARMv8
@ CHECK-ERRORS: error: instruction requires: FPARMv8 @ CHECK-ERRORS-V7: error: instruction requires: FPARMv8
@ CHECK-ERRORS: error: instruction requires: FPARMv8 @ CHECK-ERRORS-V7: error: instruction requires: FPARMv8
@ CHECK-ERRORS: error: instruction requires: FPARMv8 @ CHECK-ERRORS-V7: error: instruction requires: FPARMv8
@ CHECK-ERRORS: error: instruction requires: FPARMv8 @ CHECK-ERRORS-V7: error: instruction requires: FPARMv8
stm sp!, {r0, pc}^ stm sp!, {r0, pc}^
ldm sp!, {r0}^ ldm sp!, {r0}^
@ CHECK-ERRORS: error: system STM cannot have writeback register @ CHECK-ERRORS: error: system STM cannot have writeback register
@ CHECK-ERRORS: error: writeback register only allowed on system LDM if PC in register-list @ CHECK-ERRORS: error: writeback register only allowed on system LDM if PC in register-list
foo2: foo2:
mov r0, foo2 mov r0, foo2
▲ Show 20 Lines • Show All 215 Lines • Show Last 20 Lines

test/MC/ARM/thumb2-diagnostics.s

@ RUN: not llvm-mc -triple=thumbv7-apple-darwin < %s 2> %t @ RUN: not llvm-mc -triple=thumbv7-apple-darwin < %s 2> %t
@ RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s @ RUN: FileCheck --check-prefix=CHECK-ERRORS --check-prefix=CHECK-ERRORS-V7 < %t %s
@ RUN: not llvm-mc -triple=thumbv8-apple-darwin < %s 2> %t
@ RUN: FileCheck --check-prefix=CHECK-ERRORS --check-prefix=CHECK-ERRORS-V8 < %t %s
@ Ill-formed IT block instructions. @ Ill-formed IT block instructions.
itet eq itet eq
addle r0, r1, r2 addle r0, r1, r2
nop nop
it le it le
iteeee gt iteeee gt
ittfe le ittfe le
Show All 25 Lines@ CHECK-ERRORS: ^
mrc2 p14, #0, r1, c1, c2, #9 mrc2 p14, #0, r1, c1, c2, #9
mrrc p7, #16, r5, r4, c1 mrrc p7, #16, r5, r4, c1
mrrc2 p7, #17, r5, r4, c1 mrrc2 p7, #17, r5, r4, c1
@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: error: invalid operand for instruction @ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: error: immediate operand must be in the range [0,15] @ CHECK-ERRORS: error: immediate operand must be in the range [0,15]
@ CHECK-ERRORS: error: immediate operand must be in the range [0,15] @ CHECK-ERRORS-V7: error: immediate operand must be in the range [0,15]
@ CHECK-ERRORS-V8: error: invalid operand for instruction
isb #-1 isb #-1
isb #16 isb #16
@ CHECK-ERRORS: error: immediate value out of range @ CHECK-ERRORS: error: immediate value out of range
@ CHECK-ERRORS: error: immediate value out of range @ CHECK-ERRORS: error: immediate value out of range
itt eq itt eq
bkpteq #1 bkpteq #1
▲ Show 20 Lines • Show All 48 Lines • Show Last 20 Lines