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Differential D14142

[2/4] Allow SP in rGPR, starting from ARMv8 (assembly)
AbandonedPublic

Authored by tyomitch on Oct 28 2015, 3:08 AM.

Details

Reviewers
rengolin
jmolloy

Diff Detail

Event Timeline

tyomitch updated this revision to Diff 38640.Oct 28 2015, 3:08 AM
tyomitch retitled this revision from to [2/4] Allow SP in rGPR, starting from ARMv8 (assembly).
tyomitch added reviewers: jmolloy, rengolin.
tyomitch added a subscriber: llvm-commits.
Herald added subscribers: rengolin, aemerson. · View Herald TranscriptOct 28 2015, 3:08 AM
rengolin added inline comments.Oct 28 2015, 3:57 AM
test/MC/ARM/basic-thumb2-instructions-v8.s
27

... in ARMv8 only

tyomitch added inline comments.Oct 28 2015, 4:09 AM
test/MC/ARM/basic-thumb2-instructions-v8.s
27

Well, the test has "v8" in the filename, and "@ New ARMv8 T32 encodings" as the very first line, so naturally, all of the test cases are ARMv8-specific.

rengolin added inline comments.Oct 28 2015, 4:12 AM
test/MC/ARM/basic-thumb2-instructions-v8.s
27

I know, but you're checking v7 in the same test...

tyomitch abandoned this revision.Oct 28 2015, 7:27 AM

Merged into r251516

Revision Contents

PathSize
lib/
Target/
ARM/
AsmParser/
4 lines
test/
MC/
ARM/
11 lines

Diff 38640

lib/Target/ARM/AsmParser/ARMAsmParser.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 10,005 Lines • ▼ Show 20 Lines if (Op.isImm()) {
const MCExpr *SOExpr = Op.getImm(); const MCExpr *SOExpr = Op.getImm();
int64_t Value; int64_t Value;
if (!SOExpr->evaluateAsAbsolute(Value)) if (!SOExpr->evaluateAsAbsolute(Value))
return Match_Success; return Match_Success;
assert((Value >= INT32_MIN && Value <= UINT32_MAX) && assert((Value >= INT32_MIN && Value <= UINT32_MAX) &&
"expression value must be representable in 32 bits"); "expression value must be representable in 32 bits");
} }
break; break;
case MCK_rGPR:
if (hasV8Ops() && Op.isReg() && Op.getReg() == ARM::SP)
return Match_Success;
break;
case MCK_GPRPair: case MCK_GPRPair:
if (Op.isReg() && if (Op.isReg() &&
MRI->getRegClass(ARM::GPRRegClassID).contains(Op.getReg())) MRI->getRegClass(ARM::GPRRegClassID).contains(Op.getReg()))
return Match_Success; return Match_Success;
break; break;
} }
return Match_InvalidOperand; return Match_InvalidOperand;
} }

test/MC/ARM/basic-thumb2-instructions-v8.s

Show All 18 Lines
@ CHECK-V8: hlt #24 @ encoding: [0x98,0xba] @ CHECK-V8: hlt #24 @ encoding: [0x98,0xba]
@ CHECK-V7: error: instruction requires: armv8 @ CHECK-V7: error: instruction requires: armv8
@ Can accept AL condition code @ Can accept AL condition code
hltal #24 hltal #24
@ CHECK-V8: hlt #24 @ encoding: [0x98,0xba] @ CHECK-V8: hlt #24 @ encoding: [0x98,0xba]
@ CHECK-V7: error: instruction requires: armv8 @ CHECK-V7: error: instruction requires: armv8
@ Can accept SP as rGPR
rengolinUnsubmitted
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... in ARMv8 only

rengolin: ... in ARMv8 only
tyomitchAuthorUnsubmitted
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Well, the test has "v8" in the filename, and "@ New ARMv8 T32 encodings" as the very first line, so naturally, all of the test cases are ARMv8-specific.

tyomitch: Well, the test has "v8" in the filename, and "@ New ARMv8 T32 encodings" as the very first line…
rengolinUnsubmitted
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I know, but you're checking v7 in the same test...

rengolin: I know, but you're checking v7 in the same test...
sbc.w r6, r3, sp, asr #16
and.w r6, r3, sp, asr #16
and sp, r0, #0
@ CHECK-V8: sbc.w r6, r3, sp, asr #16 @ encoding: [0x63,0xeb,0x2d,0x46]
@ CHECK-V8: and.w r6, r3, sp, asr #16 @ encoding: [0x03,0xea,0x2d,0x46]
@ CHECK-V8: and sp, r0, #0 @ encoding: [0x00,0xf0,0x00,0x0d]
@ CHECK-V7: error: using SP in this instruction requires ARMv8 or later
@ CHECK-V7: error: using SP in this instruction requires ARMv8 or later
@ CHECK-V7: error: invalid operand for instruction
@ DCPS{1,2,3} @ DCPS{1,2,3}
dcps1 dcps1
dcps2 dcps2
dcps3 dcps3
@ CHECK-V8: dcps1 @ encoding: [0x8f,0xf7,0x01,0x80] @ CHECK-V8: dcps1 @ encoding: [0x8f,0xf7,0x01,0x80]
@ CHECK-V8: dcps2 @ encoding: [0x8f,0xf7,0x02,0x80] @ CHECK-V8: dcps2 @ encoding: [0x8f,0xf7,0x02,0x80]
@ CHECK-V8: dcps3 @ encoding: [0x8f,0xf7,0x03,0x80] @ CHECK-V8: dcps3 @ encoding: [0x8f,0xf7,0x03,0x80]
@ CHECK-V7: error: instruction requires: armv8 @ CHECK-V7: error: instruction requires: armv8
▲ Show 20 Lines • Show All 53 Lines • Show Last 20 Lines