[LLVM] Fix Clang-tidy misc-use-override warnings, other minor fixes

[Eugene.Zelenko]

Summary

I checked this patch on my own build on RHEL 6. Regressions were OK.

Please check it in if it's OK, because I don't have SVN write access.

[hans]

Please keep the list cc'd on patches.

I have a few 80-column nits, but can fix those when committing.

For future patches, please generate the patch with more context (e.g. "git diff -U9999"); that way the context is available in Phabricator.

include/llvm/ExecutionEngine/RuntimeDyld.h

72 ↗

(On Diff #34383)

80 cols

lib/ExecutionEngine/MCJIT/MCJIT.h

231 ↗

(On Diff #34383)

This line was 80+ columns before, but we might as well fix it while here.

[hans]

LGTM

[hans]

Re-committed in r247298.

llvm/trunk/include/llvm/CodeGen/MIRParser/MIRParser.h

-//===- MIRParser.h - MIR serialization format parser ----------------------===//
+//===- MIRParser.h - MIR serialization format parser ------------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //

 /// This class initializes machine functions by applying the state loaded from
 /// a MIR file.
 class MIRParser : public MachineFunctionInitializer {
   std::unique_ptr<MIRParserImpl> Impl;
 
 public:
   MIRParser(std::unique_ptr<MIRParserImpl> Impl);
   MIRParser(const MIRParser &) = delete;
-  ~MIRParser();
+  ~MIRParser() override;
 
   /// Parse the optional LLVM IR module that's embedded in the MIR file.
   ///
   /// A new, empty module is created if the LLVM IR isn't present.
   /// Returns null if a parsing error occurred.
   std::unique_ptr<Module> parseLLVMModule();
 
   /// Initialize the machine function to the state that's described in the MIR

 ///
 /// \param Contents - The MemoryBuffer containing the machine level IR.
 /// \param Context - Context which will be used for the parsed LLVM IR module.
 std::unique_ptr<MIRParser>
 createMIRParser(std::unique_ptr<MemoryBuffer> Contents, LLVMContext &Context);
 
 } // end namespace llvm
 
-#endif
+#endif // LLVM_CODEGEN_MIRPARSER_MIRPARSER_H

llvm/trunk/include/llvm/ExecutionEngine/RuntimeDyld.h

public:
     typedef std::map<object::SectionRef, unsigned> ObjSectionToIDMap;
 
     LoadedObjectInfo(RuntimeDyldImpl &RTDyld, ObjSectionToIDMap ObjSecToIDMap)
       : RTDyld(RTDyld), ObjSecToIDMap(ObjSecToIDMap) { }
 
     virtual object::OwningBinary<object::ObjectFile>
     getObjectForDebug(const object::ObjectFile &Obj) const = 0;
 
-    uint64_t getSectionLoadAddress(const object::SectionRef &Sec) const;
+    uint64_t
+    getSectionLoadAddress(const object::SectionRef &Sec) const override;
 
   protected:
     virtual void anchor();
 
     RuntimeDyldImpl &RTDyld;
     ObjSectionToIDMap ObjSecToIDMap;
   };
 
public:
     std::unique_ptr<llvm::LoadedObjectInfo> clone() const override {
       return llvm::make_unique<Derived>(static_cast<const Derived &>(*this));
     }
   };
 
   /// \brief Memory Management.
   class MemoryManager {
   public:
-    virtual ~MemoryManager() {}
+    virtual ~MemoryManager() = default;
 
     /// Allocate a memory block of (at least) the given size suitable for
     /// executable code. The SectionID is a unique identifier assigned by the
     /// RuntimeDyld instance, and optionally recorded by the memory manager to
     /// access a loaded section.
     virtual uint8_t *allocateCodeSection(uintptr_t Size, unsigned Alignment,
                                          unsigned SectionID,
                                          StringRef SectionName) = 0;
public:
 
   private:
     virtual void anchor();
   };
 
   /// \brief Symbol resolution.
   class SymbolResolver {
   public:
-    virtual ~SymbolResolver() {}
+    virtual ~SymbolResolver() = default;
 
     /// This method returns the address of the specified function or variable.
     /// It is used to resolve symbols during module linking.
     ///
     /// If the returned symbol's address is equal to ~0ULL then RuntimeDyld will
     /// skip all relocations for that symbol, and the client will be responsible
     /// for handling them manually.
     virtual SymbolInfo findSymbol(const std::string &Name) = 0;
private:
   MemoryManager &MemMgr;
   SymbolResolver &Resolver;
   bool ProcessAllSections;
   RuntimeDyldCheckerImpl *Checker;
 };
 
 } // end namespace llvm
 
-#endif
+#endif // LLVM_EXECUTIONENGINE_RUNTIMEDYLD_H

llvm/trunk/include/llvm/Support/raw_ostream.h

 public:
   /// Construct a new raw_svector_ostream.
   ///
   /// \param O The vector to write to; this should generally have at least 128
   /// bytes free to avoid any extraneous memory overhead.
   explicit raw_svector_ostream(SmallVectorImpl<char> &O) : OS(O) {
     SetUnbuffered();
   }
-  ~raw_svector_ostream() override {}
+  ~raw_svector_ostream() override = default;
 
   void flush() = delete;
 
   /// Return a StringRef for the vector contents.
   StringRef str() { return StringRef(OS.data(), OS.size()); }
 };
 
 /// A raw_ostream that discards all output.

 };
 
 class buffer_ostream : public raw_svector_ostream {
   raw_ostream &OS;
   SmallVector<char, 0> Buffer;
 
 public:
   buffer_ostream(raw_ostream &OS) : raw_svector_ostream(Buffer), OS(OS) {}
-  ~buffer_ostream() { OS << str(); }
+  ~buffer_ostream() override { OS << str(); }
 };
 
 } // end llvm namespace
 
-#endif
+#endif // LLVM_SUPPORT_RAW_OSTREAM_H

llvm/trunk/include/llvm/TableGen/Record.h

 private:
   RecTyKind Kind;
   std::unique_ptr<ListRecTy> ListTy;
 
 public:
   RecTyKind getRecTyKind() const { return Kind; }
 
   RecTy(RecTyKind K) : Kind(K) {}
-  virtual ~RecTy() {}
+  virtual ~RecTy() = default;
 
   virtual std::string getAsString() const = 0;
   void print(raw_ostream &OS) const { OS << getAsString(); }
   void dump() const;
 
   /// typeIsConvertibleTo - Return true if all values of 'this' type can be
   /// converted to the specified type.
   virtual bool typeIsConvertibleTo(const RecTy *RHS) const;

 
 public:
   InitKind getKind() const { return Kind; }
 
 protected:
   explicit Init(InitKind K) : Kind(K) {}
 
 public:
-  virtual ~Init() {}
+  virtual ~Init() = default;
 
   /// isComplete - This virtual method should be overridden by values that may
   /// not be completely specified yet.
   virtual bool isComplete() const { return true; }
 
   /// print - Print out this value.
   void print(raw_ostream &OS) const { OS << getAsString(); }
 

 class TypedInit : public Init {
   RecTy *Ty;
 
   TypedInit(const TypedInit &Other) = delete;
   TypedInit &operator=(const TypedInit &Other) = delete;
 
 protected:
   explicit TypedInit(InitKind K, RecTy *T) : Init(K), Ty(T) {}
-  ~TypedInit() {
+  ~TypedInit() override {
     // If this is a DefInit we need to delete the RecordRecTy.
     if (getKind() == IK_DefInit)
       delete Ty;
   }
 
 public:
   static bool classof(const Init *I) {
     return I->getKind() >= IK_FirstTypedInit &&

 Init *QualifyName(Record &CurRec, MultiClass *CurMultiClass,
                   Init *Name, const std::string &Scoper);
 
 /// QualifyName - Return an Init with a qualifier prefix referring
 /// to CurRec's name.
 Init *QualifyName(Record &CurRec, MultiClass *CurMultiClass,
                   const std::string &Name, const std::string &Scoper);
 
-} // End llvm namespace
+} // end llvm namespace
 
-#endif
+#endif // LLVM_TABLEGEN_RECORD_H

llvm/trunk/lib/CodeGen/MIRPrintingPass.cpp

struct MIRPrintingPass : public MachineFunctionPass {
 
   const char *getPassName() const override { return "MIR Printing Pass"; }
 
   void getAnalysisUsage(AnalysisUsage &AU) const override {
     AU.setPreservesAll();
     MachineFunctionPass::getAnalysisUsage(AU);
   }
 
-  virtual bool runOnMachineFunction(MachineFunction &MF) override {
+  bool runOnMachineFunction(MachineFunction &MF) override {
     std::string Str;
     raw_string_ostream StrOS(Str);
     printMIR(StrOS, MF);
     MachineFunctions.append(StrOS.str());
     return false;
   }
 
-  virtual bool doFinalization(Module &M) override {
+  bool doFinalization(Module &M) override {
     printMIR(OS, M);
     OS << MachineFunctions;
     return false;
   }
 };
 
 char MIRPrintingPass::ID = 0;
 

llvm/trunk/lib/ExecutionEngine/MCJIT/MCJIT.h

public:
   void addObjectFile(std::unique_ptr<object::ObjectFile> O) override;
   void addObjectFile(object::OwningBinary<object::ObjectFile> O) override;
   void addArchive(object::OwningBinary<object::Archive> O) override;
   bool removeModule(Module *M) override;
 
   /// FindFunctionNamed - Search all of the active modules to find the function that
   /// defines FnName.  This is very slow operation and shouldn't be used for
   /// general code.
-  virtual Function *FindFunctionNamed(const char *FnName) override;
+  Function *FindFunctionNamed(const char *FnName) override;
 
-  /// FindGlobalVariableNamed - Search all of the active modules to find the global variable
-  /// that defines Name.  This is very slow operation and shouldn't be used for
-  /// general code.
-  virtual GlobalVariable *FindGlobalVariableNamed(const char *Name, bool AllowInternal = false) override;
+  /// FindGlobalVariableNamed - Search all of the active modules to find the
+  /// global variable that defines Name.  This is very slow operation and
+  /// shouldn't be used for general code.
+  GlobalVariable *FindGlobalVariableNamed(const char *Name,
+                                          bool AllowInternal = false) override;
 
   /// Sets the object manager that MCJIT should use to avoid compilation.
   void setObjectCache(ObjectCache *manager) override;
 
   void setProcessAllSections(bool ProcessAllSections) override {
     Dyld.setProcessAllSections(ProcessAllSections);
   }
 
void NotifyObjectEmitted(const object::ObjectFile& Obj,
                            const RuntimeDyld::LoadedObjectInfo &L);
   void NotifyFreeingObject(const object::ObjectFile& Obj);
 
   RuntimeDyld::SymbolInfo findExistingSymbol(const std::string &Name);
   Module *findModuleForSymbol(const std::string &Name,
                               bool CheckFunctionsOnly);
 };
 
-} // End llvm namespace
+} // end llvm namespace
 
-#endif
+#endif // LLVM_LIB_EXECUTIONENGINE_MCJIT_MCJIT_H

llvm/trunk/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp

private:
     }
 
     std::vector<unsigned> BusyRegs;
   };
 
   X86AddressSanitizer(const MCSubtargetInfo &STI)
       : X86AsmInstrumentation(STI), RepPrefix(false), OrigSPOffset(0) {}
 
-  virtual ~X86AddressSanitizer() {}
+  ~X86AddressSanitizer() override = default;
 
   // X86AsmInstrumentation implementation:
-  virtual void InstrumentAndEmitInstruction(const MCInst &Inst,
-                                            OperandVector &Operands,
-                                            MCContext &Ctx,
-                                            const MCInstrInfo &MII,
-                                            MCStreamer &Out) override {
+  void InstrumentAndEmitInstruction(const MCInst &Inst,
     InstrumentMOVS(Inst, Operands, Ctx, MII, Out);
     if (RepPrefix)
       EmitInstruction(Out, MCInstBuilder(X86::REP_PREFIX));
 
     InstrumentMOV(Inst, Operands, Ctx, MII, Out);
 
     RepPrefix = (Inst.getOpcode() == X86::REP_PREFIX);
     if (!RepPrefix)

 
 class X86AddressSanitizer32 : public X86AddressSanitizer {
 public:
   static const long kShadowOffset = 0x20000000;
 
   X86AddressSanitizer32(const MCSubtargetInfo &STI)
       : X86AddressSanitizer(STI) {}
 
-  virtual ~X86AddressSanitizer32() {}
+  ~X86AddressSanitizer32() override = default;
 
   unsigned GetFrameReg(const MCContext &Ctx, MCStreamer &Out) {
     unsigned FrameReg = GetFrameRegGeneric(Ctx, Out);
     if (FrameReg == X86::NoRegister)
       return FrameReg;
     return getX86SubSuperRegister(FrameReg, MVT::i32);
   }
 
void StoreFlags(MCStreamer &Out) {
     OrigSPOffset -= 4;
   }
 
   void RestoreFlags(MCStreamer &Out) {
     EmitInstruction(Out, MCInstBuilder(X86::POPF32));
     OrigSPOffset += 4;
   }
 
-  virtual void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
-                                            MCContext &Ctx,
-                                            MCStreamer &Out) override {
+  void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
     unsigned LocalFrameReg = RegCtx.ChooseFrameReg(MVT::i32);
     assert(LocalFrameReg != X86::NoRegister);
 
     const MCRegisterInfo *MRI = Ctx.getRegisterInfo();
     unsigned FrameReg = GetFrameReg(Ctx, Out);
     if (MRI && FrameReg != X86::NoRegister) {
       SpillReg(Out, LocalFrameReg);
       if (FrameReg == X86::ESP) {
void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
 
     SpillReg(Out, RegCtx.AddressReg(MVT::i32));
     SpillReg(Out, RegCtx.ShadowReg(MVT::i32));
     if (RegCtx.ScratchReg(MVT::i32) != X86::NoRegister)
       SpillReg(Out, RegCtx.ScratchReg(MVT::i32));
     StoreFlags(Out);
   }
 
-  virtual void InstrumentMemOperandEpilogue(const RegisterContext &RegCtx,
-                                            MCContext &Ctx,
-                                            MCStreamer &Out) override {
+  void InstrumentMemOperandEpilogue(const RegisterContext &RegCtx,
     unsigned LocalFrameReg = RegCtx.ChooseFrameReg(MVT::i32);
     assert(LocalFrameReg != X86::NoRegister);
 
     RestoreFlags(Out);
     if (RegCtx.ScratchReg(MVT::i32) != X86::NoRegister)
       RestoreReg(Out, RegCtx.ScratchReg(MVT::i32));
     RestoreReg(Out, RegCtx.ShadowReg(MVT::i32));
     RestoreReg(Out, RegCtx.AddressReg(MVT::i32));
 
     unsigned FrameReg = GetFrameReg(Ctx, Out);
     if (Ctx.getRegisterInfo() && FrameReg != X86::NoRegister) {
       RestoreReg(Out, LocalFrameReg);
       Out.EmitCFIRestoreState();
       if (FrameReg == X86::ESP)
         Out.EmitCFIAdjustCfaOffset(-4 /* byte size of the LocalFrameReg */);
     }
   }
 
-  virtual void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
-                                         bool IsWrite,
-                                         const RegisterContext &RegCtx,
-                                         MCContext &Ctx,
-                                         MCStreamer &Out) override;
-  virtual void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
-                                         bool IsWrite,
-                                         const RegisterContext &RegCtx,
-                                         MCContext &Ctx,
-                                         MCStreamer &Out) override;
-  virtual void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
-                                  MCStreamer &Out) override;
+  void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
+  void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
+  void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
 
 private:
   void EmitCallAsanReport(unsigned AccessSize, bool IsWrite, MCContext &Ctx,
                           MCStreamer &Out, const RegisterContext &RegCtx) {
     EmitInstruction(Out, MCInstBuilder(X86::CLD));
     EmitInstruction(Out, MCInstBuilder(X86::MMX_EMMS));
 
     EmitInstruction(Out, MCInstBuilder(X86::AND64ri8)

 
 class X86AddressSanitizer64 : public X86AddressSanitizer {
 public:
   static const long kShadowOffset = 0x7fff8000;
 
   X86AddressSanitizer64(const MCSubtargetInfo &STI)
       : X86AddressSanitizer(STI) {}
 
-  virtual ~X86AddressSanitizer64() {}
+  ~X86AddressSanitizer64() override = default;
 
   unsigned GetFrameReg(const MCContext &Ctx, MCStreamer &Out) {
     unsigned FrameReg = GetFrameRegGeneric(Ctx, Out);
     if (FrameReg == X86::NoRegister)
       return FrameReg;
     return getX86SubSuperRegister(FrameReg, MVT::i64);
   }
 
void StoreFlags(MCStreamer &Out) {
     OrigSPOffset -= 8;
   }
 
   void RestoreFlags(MCStreamer &Out) {
     EmitInstruction(Out, MCInstBuilder(X86::POPF64));
     OrigSPOffset += 8;
   }
 
-  virtual void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
-                                            MCContext &Ctx,
-                                            MCStreamer &Out) override {
+  void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
     unsigned LocalFrameReg = RegCtx.ChooseFrameReg(MVT::i64);
     assert(LocalFrameReg != X86::NoRegister);
 
     const MCRegisterInfo *MRI = Ctx.getRegisterInfo();
     unsigned FrameReg = GetFrameReg(Ctx, Out);
     if (MRI && FrameReg != X86::NoRegister) {
       SpillReg(Out, X86::RBP);
       if (FrameReg == X86::RSP) {
void InstrumentMemOperandPrologue(const RegisterContext &RegCtx,
     EmitAdjustRSP(Ctx, Out, -128);
     SpillReg(Out, RegCtx.ShadowReg(MVT::i64));
     SpillReg(Out, RegCtx.AddressReg(MVT::i64));
     if (RegCtx.ScratchReg(MVT::i64) != X86::NoRegister)
       SpillReg(Out, RegCtx.ScratchReg(MVT::i64));
     StoreFlags(Out);
   }
 
-  virtual void InstrumentMemOperandEpilogue(const RegisterContext &RegCtx,
-                                            MCContext &Ctx,
-                                            MCStreamer &Out) override {
+  void InstrumentMemOperandEpilogue(const RegisterContext &RegCtx,
     unsigned LocalFrameReg = RegCtx.ChooseFrameReg(MVT::i64);
     assert(LocalFrameReg != X86::NoRegister);
 
     RestoreFlags(Out);
     if (RegCtx.ScratchReg(MVT::i64) != X86::NoRegister)
       RestoreReg(Out, RegCtx.ScratchReg(MVT::i64));
     RestoreReg(Out, RegCtx.AddressReg(MVT::i64));
     RestoreReg(Out, RegCtx.ShadowReg(MVT::i64));
     EmitAdjustRSP(Ctx, Out, 128);
 
     unsigned FrameReg = GetFrameReg(Ctx, Out);
     if (Ctx.getRegisterInfo() && FrameReg != X86::NoRegister) {
       RestoreReg(Out, LocalFrameReg);
       Out.EmitCFIRestoreState();
       if (FrameReg == X86::RSP)
         Out.EmitCFIAdjustCfaOffset(-8 /* byte size of the LocalFrameReg */);
     }
   }
 
-  virtual void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
-                                         bool IsWrite,
-                                         const RegisterContext &RegCtx,
-                                         MCContext &Ctx,
-                                         MCStreamer &Out) override;
-  virtual void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
-                                         bool IsWrite,
-                                         const RegisterContext &RegCtx,
-                                         MCContext &Ctx,
-                                         MCStreamer &Out) override;
-  virtual void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
-                                  MCStreamer &Out) override;
+  void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
+  void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
+  void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
+                      MCStreamer &Out) override;
 
 private:
   void EmitAdjustRSP(MCContext &Ctx, MCStreamer &Out, long Offset) {
     const MCExpr *Disp = MCConstantExpr::create(Offset, Ctx);
     std::unique_ptr<X86Operand> Op(
         X86Operand::CreateMem(getPointerWidth(), 0, Disp, X86::RSP, 0, 1,
                               SMLoc(), SMLoc()));
     EmitLEA(*Op, MVT::i64, X86::RSP, Out);
if (ClAsanInstrumentAssembly && hasCompilerRTSupport &&
     if (STI.getFeatureBits()[X86::Mode32Bit] != 0)
       return new X86AddressSanitizer32(STI);
     if (STI.getFeatureBits()[X86::Mode64Bit] != 0)
       return new X86AddressSanitizer64(STI);
   }
   return new X86AsmInstrumentation(STI);
 }
 
-} // End llvm namespace
+} // end llvm namespace

llvm/trunk/lib/Transforms/Instrumentation/SafeStack.cpp

void moveDynamicAllocasToUnsafeStack(Function &F, Value *UnsafeStackPtr,
                                        ArrayRef<AllocaInst *> DynamicAllocas);
 
 public:
   static char ID; // Pass identification, replacement for typeid.
   SafeStack() : FunctionPass(ID), DL(nullptr) {
     initializeSafeStackPass(*PassRegistry::getPassRegistry());
   }
 
-  virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+  void getAnalysisUsage(AnalysisUsage &AU) const override {
     AU.addRequired<AAResultsWrapperPass>();
   }
 
-  virtual bool doInitialization(Module &M) {
+  bool doInitialization(Module &M) override {
     DL = &M.getDataLayout();
 
     StackPtrTy = Type::getInt8PtrTy(M.getContext());
     IntPtrTy = DL->getIntPtrType(M.getContext());
     Int32Ty = Type::getInt32Ty(M.getContext());
     Int8Ty = Type::getInt8Ty(M.getContext());
 
     return false;
   }
 
-  bool runOnFunction(Function &F);
-
+  bool runOnFunction(Function &F) override;
 }; // class SafeStack
 
 Constant *SafeStack::getOrCreateUnsafeStackPtr(Module &M) {
   // The unsafe stack pointer is stored in a global variable with a magic name.
   const char *kUnsafeStackPtrVar = "__safestack_unsafe_stack_ptr";
 
   auto UnsafeStackPtr =
       dyn_cast_or_null<GlobalVariable>(M.getNamedValue(kUnsafeStackPtrVar));

llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp

-//===- InstrInfoEmitter.cpp - Generate a Instruction Set Desc. ------------===//
+//===- InstrInfoEmitter.cpp - Generate a Instruction Set Desc. --*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This tablegen backend is responsible for emitting a description of the target
 // instruction set for the code generator.
 //
 //===----------------------------------------------------------------------===//
 
-
 #include "CodeGenDAGPatterns.h"
 #include "CodeGenSchedule.h"
 #include "CodeGenTarget.h"
 #include "SequenceToOffsetTable.h"
 #include "TableGenBackends.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
 #include "llvm/TableGen/TableGenBackend.h"
 #include <algorithm>
 #include <cstdio>
 #include <map>
 #include <vector>
+
 using namespace llvm;
 
 namespace {
 class InstrInfoEmitter {
   RecordKeeper &Records;
   CodeGenDAGPatterns CDP;
   const CodeGenSchedModels &SchedModels;
 
void initOperandMapData(
             OpNameMapTy &OperandMap);
   void emitOperandNameMappings(raw_ostream &OS, const CodeGenTarget &Target,
             const std::vector<const CodeGenInstruction*> &NumberedInstructions);
 
   // Operand information.
   void EmitOperandInfo(raw_ostream &OS, OperandInfoMapTy &OperandInfoIDs);
   std::vector<std::string> GetOperandInfo(const CodeGenInstruction &Inst);
 };
-} // End anonymous namespace
+} // end anonymous namespace
 
 static void PrintDefList(const std::vector<Record*> &Uses,
                          unsigned Num, raw_ostream &OS) {
   OS << "static const uint16_t ImplicitList" << Num << "[] = { ";
   for (unsigned i = 0, e = Uses.size(); i != e; ++i)
     OS << getQualifiedName(Uses[i]) << ", ";
   OS << "0 };\n";
 }
for (const CodeGenInstruction *Inst : Target.instructions()) {
     N = ++OperandListNum;
     OS << "static const MCOperandInfo OperandInfo" << N << "[] = { ";
     for (const std::string &Info : OperandInfo)
       OS << "{ " << Info << " }, ";
     OS << "};\n";
   }
 }
 
-
 /// Initialize data structures for generating operand name mappings.
 /// 
 /// \param Operands [out] A map used to generate the OpName enum with operand
 ///        names as its keys and operand enum values as its values.
 /// \param OperandMap [out] A map for representing the operand name mappings for
 ///        each instructions.  This is used to generate the OperandMap table as
 ///        well as the getNamedOperandIdx() function.
 void InstrInfoEmitter::initOperandMapData(
void InstrInfoEmitter::emitOperandNameMappings(raw_ostream &OS,
   OS << "namespace " << Namespace << " {\n";
   OS << "namespace " << OpNameNS << " { \n";
   OS << "enum {\n";
   for (const auto &Op : Operands)
     OS << "  " << Op.first << " = " << Op.second << ",\n";
 
   OS << "OPERAND_LAST";
   OS << "\n};\n";
-  OS << "} // End namespace OpName\n";
-  OS << "} // End namespace " << Namespace << "\n";
-  OS << "} // End namespace llvm\n";
+  OS << "} // end namespace OpName\n";
+  OS << "} // end namespace " << Namespace << "\n";
+  OS << "} // end namespace llvm\n";
   OS << "#endif //GET_INSTRINFO_OPERAND_ENUM\n";
 
   OS << "#ifdef GET_INSTRINFO_NAMED_OPS\n";
   OS << "#undef GET_INSTRINFO_NAMED_OPS\n";
   OS << "namespace llvm {\n";
   OS << "namespace " << Namespace << " {\n";
   OS << "LLVM_READONLY\n";
   OS << "int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) {\n";
if (!Operands.empty()) {
     }
     OS << "    default: return -1;\n";
     OS << "  }\n";
   } else {
     // There are no operands, so no need to emit anything
     OS << "  return -1;\n";
   }
   OS << "}\n";
-  OS << "} // End namespace " << Namespace << "\n";
-  OS << "} // End namespace llvm\n";
+  OS << "} // end namespace " << Namespace << "\n";
+  OS << "} // end namespace llvm\n";
   OS << "#endif //GET_INSTRINFO_NAMED_OPS\n";
 
 }
 
 /// Generate an enum for all the operand types for this target, under the
 /// llvm::TargetNamespace::OpTypes namespace.
 /// Operand types are all definitions derived of the Operand Target.td class.
 void InstrInfoEmitter::emitOperandTypesEnum(raw_ostream &OS,
void InstrInfoEmitter::emitOperandTypesEnum(raw_ostream &OS,
   unsigned EnumVal = 0;
   for (const Record *Op : Operands) {
     if (!Op->isAnonymous())
       OS << "  " << Op->getName() << " = " << EnumVal << ",\n";
     ++EnumVal;
   }
 
   OS << "  OPERAND_TYPE_LIST_END" << "\n};\n";
-  OS << "} // End namespace OpTypes\n";
-  OS << "} // End namespace " << Namespace << "\n";
-  OS << "} // End namespace llvm\n";
+  OS << "} // end namespace OpTypes\n";
+  OS << "} // end namespace " << Namespace << "\n";
+  OS << "} // end namespace llvm\n";
   OS << "#endif // GET_INSTRINFO_OPERAND_TYPES_ENUM\n";
 }
 
 //===----------------------------------------------------------------------===//
 // Main Output.
 //===----------------------------------------------------------------------===//
 
 // run - Emit the main instruction description records for the target...
void InstrInfoEmitter::run(raw_ostream &OS) {
 
   // MCInstrInfo initialization routine.
   OS << "static inline void Init" << TargetName
      << "MCInstrInfo(MCInstrInfo *II) {\n";
   OS << "  II->InitMCInstrInfo(" << TargetName << "Insts, "
      << TargetName << "InstrNameIndices, " << TargetName << "InstrNameData, "
      << NumberedInstructions.size() << ");\n}\n\n";
 
-  OS << "} // End llvm namespace \n";
+  OS << "} // end llvm namespace \n";
 
   OS << "#endif // GET_INSTRINFO_MC_DESC\n\n";
 
   // Create a TargetInstrInfo subclass to hide the MC layer initialization.
   OS << "\n#ifdef GET_INSTRINFO_HEADER\n";
   OS << "#undef GET_INSTRINFO_HEADER\n";
 
   std::string ClassName = TargetName + "GenInstrInfo";
   OS << "namespace llvm {\n";
   OS << "struct " << ClassName << " : public TargetInstrInfo {\n"
      << "  explicit " << ClassName
      << "(int CFSetupOpcode = -1, int CFDestroyOpcode = -1);\n"
-     << "  virtual ~" << ClassName << "();\n"
+     << "  ~" << ClassName << "() override = default;\n"
      << "};\n";
-  OS << "} // End llvm namespace \n";
+  OS << "} // end llvm namespace \n";
 
   OS << "#endif // GET_INSTRINFO_HEADER\n\n";
 
   OS << "\n#ifdef GET_INSTRINFO_CTOR_DTOR\n";
   OS << "#undef GET_INSTRINFO_CTOR_DTOR\n";
 
   OS << "namespace llvm {\n";
   OS << "extern const MCInstrDesc " << TargetName << "Insts[];\n";
   OS << "extern const unsigned " << TargetName << "InstrNameIndices[];\n";
   OS << "extern const char " << TargetName << "InstrNameData[];\n";
   OS << ClassName << "::" << ClassName
      << "(int CFSetupOpcode, int CFDestroyOpcode)\n"
      << "  : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode) {\n"
      << "  InitMCInstrInfo(" << TargetName << "Insts, " << TargetName
      << "InstrNameIndices, " << TargetName << "InstrNameData, "
-     << NumberedInstructions.size() << ");\n}\n"
-     << ClassName << "::~" << ClassName << "() {}\n";
-  OS << "} // End llvm namespace \n";
+     << NumberedInstructions.size() << ");\n}\n";
+  OS << "} // end llvm namespace \n";
 
   OS << "#endif // GET_INSTRINFO_CTOR_DTOR\n\n";
 
   emitOperandNameMappings(OS, Target, NumberedInstructions);
 
   emitOperandTypesEnum(OS, Target);
 }
 
void InstrInfoEmitter::emitEnums(raw_ostream &OS) {
   OS << "  };\n\n";
   OS << "namespace Sched {\n";
   OS << "  enum {\n";
   Num = 0;
   for (const auto &Class : SchedModels.explicit_classes())
     OS << "    " << Class.Name << "\t= " << Num++ << ",\n";
   OS << "    SCHED_LIST_END = " << SchedModels.numInstrSchedClasses() << "\n";
   OS << "  };\n";
-  OS << "} // End Sched namespace\n";
-  OS << "} // End " << Namespace << " namespace\n";
-  OS << "} // End llvm namespace \n";
+  OS << "} // end Sched namespace\n";
+  OS << "} // end " << Namespace << " namespace\n";
+  OS << "} // end llvm namespace \n";
 
   OS << "#endif // GET_INSTRINFO_ENUM\n\n";
 }
 
 namespace llvm {
 
 void EmitInstrInfo(RecordKeeper &RK, raw_ostream &OS) {
   InstrInfoEmitter(RK).run(OS);
   EmitMapTable(RK, OS);
 }
 
-} // End llvm namespace
+} // end llvm namespace