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[NVPTX] Let NVPTX backend detect integer min and max patterns.
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Authored by broune on Aug 26 2015, 12:04 PM.

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Summary

Let NVPTX backend detect integer min and max patterns during isel and emit intrinsics that enable hardware support.

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broune updated this revision to Diff 33233.Aug 26 2015, 12:04 PM
broune retitled this revision from to [NVPTX] Let NVPTX backend detect integer min and max patterns..
broune updated this object.
broune added a reviewer: jholewinski.
broune added subscribers: eliben, jingyue, meheff, llvm-commits.
jingyue added inline comments.Aug 26 2015, 12:50 PM
lib/Target/NVPTX/NVPTXISelLowering.cpp
4084

These cases require some mental effort to reason about, although I struggled through them :)

It might be better to do this:

SDNode larger; // The larger operand when the condition is true. 
if (op is LT, LE, ULT, or ULE) {
  larger = RHS; 
} else {
  larger = LHS;
}

IsSigned = LT or LE or GT or GE;
IsMax = (Larger == True); // IsMax iff the instruction returns the larger one when the condition is true.
meheff edited edge metadata.Aug 26 2015, 1:42 PM

I agree with Jingyue's cleanup suggestion. Otherwise LGTM.

broune updated this revision to Diff 33247.Aug 26 2015, 2:18 PM
broune edited edge metadata.

Use isSignedIntSetCC() to simplify logic.

broune marked an inline comment as done.Aug 26 2015, 2:20 PM
broune added inline comments.
lib/Target/NVPTX/NVPTXISelLowering.cpp
4084

I found isSignedIntSetCC which makes the logic simpler. I kept the switch, as I need to ensure that only these codes are used, not e.g. eq.

jingyue accepted this revision.Aug 26 2015, 2:22 PM
jingyue edited edge metadata.
This revision is now accepted and ready to land.Aug 26 2015, 2:22 PM
arsenm added a subscriber: arsenm.Aug 26 2015, 2:50 PM

If you make the generic min/max nodes legal, you don't need to do this pattern matching yourself

broune marked an inline comment as done.Aug 26 2015, 4:14 PM

If you make the generic min/max nodes legal, you don't need to do this pattern matching yourself

Thanks for the tip and, yes, using the generic min/max nodes would have been my preferred solution. However, I couldn't find documentation that clearly explained how tablegen for NVPTX exactly works and it seemed like I'd need to use tablegen to tell LLVM how to emit code from the generic min/max. Also, the generic code for detecting min/max patterns that I found was in DAGCombiner, which only works for floating point and not, as here, for integers, so I'd have to add that and ensure that I didn't mess up any other backend. DAGCombiner also requires hasOneUse() for the condition, which is not what I wanted here. The direct solution here was by comparison quite straightforward, so this time I decided to go for the easy solution.

broune closed this revision.Aug 26 2015, 4:22 PM