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Differential D12274

AVX-512: valignq/d intrinsic (Clang)
ClosedPublic

Authored by igorb on Aug 23 2015, 10:32 PM.

Details

Reviewers
AsafBadouh
delena
Commits
rGb5ba2319f6e9: AVX-512: Changed cnt parameter in valignq/d intrinsic from i8 to i32 according…
rC246430: AVX-512: Changed cnt parameter in valignq/d intrinsic from i8 to i32 according…
rL246430: AVX-512: Changed cnt parameter in valignq/d intrinsic from i8 to i32…
Summary

AVX-512: Changed cnt parameter in valignq/d intrinsic from i8 to i32 according to the Intel Spec

Diff Detail

Repository
rL LLVM

Event Timeline

igorb updated this revision to Diff 32932.Aug 23 2015, 10:32 PM
igorb retitled this revision from to AVX-512: valignq/d intrinsic (Clang).
igorb updated this object.
igorb added reviewers: delena, AsafBadouh.
igorb set the repository for this revision to rL LLVM.
igorb added a subscriber: llvm-commits.
igorb added a parent revision: D12270: AVX512 : vpalignr implementation.Aug 23 2015, 10:39 PM
vsk added a subscriber: vsk.Aug 24 2015, 5:07 PM

This change looks fine. I'm curious though -- the spec uses "int" for "cnt" in the Compiler Intrinsic Equivalent section, but "imm8" for the instruction encoding. Why are they different?

delena edited edge metadata.Aug 31 2015, 2:21 AM

LGTM

Closed by commit rL246430: AVX-512: Changed cnt parameter in valignq/d intrinsic from i8 to i32… (authored by ibreger). · Explain WhyAug 31 2015, 4:16 AM
This revision was automatically updated to reflect the committed changes.
igorb added a comment.Aug 31 2015, 5:26 AM
In D12274#231679, @vsk wrote:

This change looks fine. I'm curious though -- the spec uses "int" for "cnt" in the Compiler Intrinsic Equivalent section, but "imm8" for the instruction encoding. Why are they different?

This is according to Spec.

Revision Contents

PathSize
cfe/
trunk/
include/
clang/
Basic/
4 lines

Diff 33564

cfe/trunk/include/clang/Basic/BuiltinsX86.def

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TARGET_BUILTIN(__builtin_ia32_storeupd512_mask, "vv*V8dUc", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_storeupd512_mask, "vv*V8dUc", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_storeapd512_mask, "vv*V8dUc", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_storeapd512_mask, "vv*V8dUc", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_storeups512_mask, "vv*V16fUs", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_storeups512_mask, "vv*V16fUs", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_storeaps512_mask, "vv*V16fUs", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_storeaps512_mask, "vv*V16fUs", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_vpermt2vard512_mask, "V16iV16iV16iV16iUs", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_vpermt2vard512_mask, "V16iV16iV16iV16iUs", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_vpermt2varq512_mask, "V8LLiV8LLiV8LLiV8LLiUc", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_vpermt2varq512_mask, "V8LLiV8LLiV8LLiV8LLiUc", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_vpermt2varps512_mask, "V16fV16iV16fV16fUs", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_vpermt2varps512_mask, "V16fV16iV16fV16fUs", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_vpermt2varpd512_mask, "V8dV8LLiV8dV8dUc", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_vpermt2varpd512_mask, "V8dV8LLiV8dV8dUc", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_alignq512_mask, "V8LLiV8LLiV8LLiIcV8LLiUc", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_alignq512_mask, "V8LLiV8LLiV8LLiIiV8LLiUc", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_alignd512_mask, "V16iV16iV16iIcV16iUs", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_alignd512_mask, "V16iV16iV16iIiV16iUs", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_extractf64x4_mask, "V4dV8dIcV4dUc", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_extractf64x4_mask, "V4dV8dIcV4dUc", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_extractf32x4_mask, "V4fV16fIcV4fUc", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_extractf32x4_mask, "V4fV16fIcV4fUc", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_gathersiv8df, "V8dV8dvC*V8iUcIi", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_gathersiv8df, "V8dV8dvC*V8iUcIi", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_gathersiv16sf, "V16fV16fvC*UsIi", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_gathersiv16sf, "V16fV16fvC*UsIi", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_gatherdiv8df, "V8dV8dvC*V8LLiUcIi", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_gatherdiv8df, "V8dV8dvC*V8LLiUcIi", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_gatherdiv16sf, "V8fV8fvC*V8LLiUcIi", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_gatherdiv16sf, "V8fV8fvC*V8LLiUcIi", "", "avx512f")
TARGET_BUILTIN(__builtin_ia32_gathersiv8di, "V8LLiV8LLivC*V8iUcIi", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_gathersiv8di, "V8LLiV8LLivC*V8iUcIi", "", "avx512f")
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