[NVPTX] Added an option to run NVVMReflect pass.

[tra]

Summary

The pass is needed to remove __nvvm_reflect calls after we link in libdevice bitcode that comes with CUDA.
http://llvm.org/docs/NVPTXUsage.html#linking-with-libdevice

[echristo]

Testcase to make sure it's running?

-eric

[tra]

Added test case to verify that nvptx-enable-reflect option works.

[echristo]

I guess that's one way. I was hoping for a basic functionality test?

-eric

[tra]

In D11663#231506, @echristo wrote:

I guess that's one way. I was hoping for a basic functionality test?

NVVMReflect pass functionality is already tested in test/CodeGen/NVPTX/nvvm-reflect.ll

In addition, tests in D11664 (clang-side counterpart of this patch) verify end-to-end functionality which ensures that __nvvm_reflect() is eliminated when -nvptx-enable-reflect option is passed.

[echristo]

Seems this could be unified with with the nvvm-reflect-enable option in the pass itself? Actually, is there any reason this shouldn't be on by default for the backend? (i.e. am I missing something here?)

-eric

[tra]

In D11663#241611, @echristo wrote:

Seems this could be unified with with the nvvm-reflect-enable option in the pass itself? Actually, is there any reason this shouldn't be on by default for the backend? (i.e. am I missing something here?)

Your point makes sense as linking with libdevice will be the common case for compiling real CUDA apps.
Adding NVVMReflect pass unconditionally would break whoever may want to compile their own libdevice variant.
It can be easily fixed with -nvvm-reflect-enable=0, so it should not be too big of a deal.

[tra]

On second thought, adding NVVMReflect pass with *default* settings unconditionally may make is hard to replace it with the one that takes optional StringMap. I don't think we need that now, but if/when that happens we can make NVVMReflect pass conditional then.

[tra]

Added NVVMReflect pass unconditionally.
Removed command-line option.
If NVVMReflect has to be disabled, it can be done with -nvvm-reflect-enable=0 option.

[echristo]

LGTM. Thanks.

llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp

void NVPTXPassConfig::addIRPasses() {
   // around after register allocation (which in our case, is *all* registers).
   // We explicitly disable them here.  We do, however, need some functionality
   // of the PrologEpilogCodeInserter pass, so we emulate that behavior in the
   // NVPTXPrologEpilog pass (see NVPTXPrologEpilogPass.cpp).
   disablePass(&PrologEpilogCodeInserterID);
   disablePass(&MachineCopyPropagationID);
   disablePass(&TailDuplicateID);
 
+  addPass(createNVVMReflectPass());
   addPass(createNVPTXImageOptimizerPass());
   addPass(createNVPTXAssignValidGlobalNamesPass());
   addPass(createGenericToNVVMPass());
 
   // === Propagate special address spaces ===
   addPass(createNVPTXLowerKernelArgsPass(&getNVPTXTargetMachine()));
   // NVPTXLowerKernelArgs emits alloca for byval parameters which can often
   // be eliminated by SROA.