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Adding support for TBYTE type for MS inline asm
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Authored by myatsina on Jul 16 2015, 2:13 AM.

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rnk
mcrosier

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rG69e40a4c8547: [X86] Add support for tbyte memory operand size for Intel-syntax x86 assembly

Summary

Adding support for TBYTE type for MS inline asm

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Repository: rL LLVM

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myatsina updated this revision to Diff 29875.Jul 16 2015, 2:13 AM

myatsina retitled this revision from to Adding support for TBYTE type for MS inline asm.

myatsina updated this object.

myatsina added a reviewer: mcrosier.

myatsina set the repository for this revision to rL LLVM.

myatsina added a subscriber: llvm-commits.

lgtm

This revision is now accepted and ready to land.Jul 16 2015, 1:20 PM

I haven't been following the Intel syntax for some time. AFAICT from my searches on Google, TBYTE is a replacement for XWORD. Can you point me to some documentation? The implementation is fine, but I want to be sure TBYTE is in the standard before adding it.

Or I'll just trust Reid as he's the true owner of MS inline asm.. :)

In D11257#206642, @mcrosier wrote:

I haven't been following the Intel syntax for some time. AFAICT from my searches on Google, TBYTE is a replacement for XWORD. Can you point me to some documentation? The implementation is fine, but I want to be sure TBYTE is in the standard before adding it.

Microsoft documents this here: https://msdn.microsoft.com/en-us/library/e3zfxb7e.aspx

Committed by Michael Kuperstein in revision 242639

Revision Contents

Path

Size

lib/

Target/

X86/

AsmParser/

	X86AsmParser.cpp
	X86AsmParser.cpp (revision 242128)

1 line

test/

MC/

X86/

	intel-syntax.s
	intel-syntax.s (revision 242128)

2 lines

Diff 29875

lib/Target/X86/AsmParser/X86AsmParser.cpp

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	/// getIntelMemOperandSize - Return intel memory operand size.			/// getIntelMemOperandSize - Return intel memory operand size.
	static unsigned getIntelMemOperandSize(StringRef OpStr) {			static unsigned getIntelMemOperandSize(StringRef OpStr) {
	unsigned Size = StringSwitch<unsigned>(OpStr)			unsigned Size = StringSwitch<unsigned>(OpStr)
	.Cases("BYTE", "byte", 8)			.Cases("BYTE", "byte", 8)
	.Cases("WORD", "word", 16)			.Cases("WORD", "word", 16)
	.Cases("DWORD", "dword", 32)			.Cases("DWORD", "dword", 32)
	.Cases("QWORD", "qword", 64)			.Cases("QWORD", "qword", 64)
	.Cases("XWORD", "xword", 80)			.Cases("XWORD", "xword", 80)
				.Cases("TBYTE", "tbyte", 80)
	.Cases("XMMWORD", "xmmword", 128)			.Cases("XMMWORD", "xmmword", 128)
	.Cases("YMMWORD", "ymmword", 256)			.Cases("YMMWORD", "ymmword", 256)
	.Cases("ZMMWORD", "zmmword", 512)			.Cases("ZMMWORD", "zmmword", 512)
	.Cases("OPAQUE", "opaque", -1U) // needs to be non-zero, but doesn't matter			.Cases("OPAQUE", "opaque", -1U) // needs to be non-zero, but doesn't matter
	.Default(0);			.Default(0);
	return Size;			return Size;
	}			}

	▲ Show 20 Lines • Show All 1,934 Lines • Show Last 20 Lines

test/MC/X86/intel-syntax.s

	Show First 20 Lines • Show All 629 Lines • ▼ Show 20 Lines
	add dword ptr [rax], 1			add dword ptr [rax], 1
	add word ptr [rax], 1			add word ptr [rax], 1
	add byte ptr [rax], 1			add byte ptr [rax], 1
	// CHECK: addq $1, (%rax)			// CHECK: addq $1, (%rax)
	// CHECK: addl $1, (%rax)			// CHECK: addl $1, (%rax)
	// CHECK: addw $1, (%rax)			// CHECK: addw $1, (%rax)
	// CHECK: addb $1, (%rax)			// CHECK: addb $1, (%rax)

				fstp tbyte ptr [rax]
	fstp xword ptr [rax]			fstp xword ptr [rax]
	fstp qword ptr [rax]			fstp qword ptr [rax]
	fstp dword ptr [rax]			fstp dword ptr [rax]
	// CHECK: fstpt (%rax)			// CHECK: fstpt (%rax)
				// CHECK: fstpt (%rax)
	// CHECK: fstpl (%rax)			// CHECK: fstpl (%rax)
	// CHECK: fstps (%rax)			// CHECK: fstps (%rax)

	fxsave [eax]			fxsave [eax]
	fsave [eax]			fsave [eax]
	fxrstor [eax]			fxrstor [eax]
	frstor [eax]			frstor [eax]
	// CHECK: fxsave (%eax)			// CHECK: fxsave (%eax)
	Show All 18 Lines