WebAssembly: fix build breakage.

[jfb]

Summary

processFunctionBeforeCalleeSavedScan was renamed to determineCalleeSaves and now takes a BitVector parameter as of rL242165, reviewed in http://reviews.llvm.org/D10909

WebAssembly is still marked as experimental and therefore doesn't build by default. It does, however, grep by default! I notice that processFunctionBeforeCalleeSavedScan is still mentioned in a few comments and error messages, which I also fixed.

[sunfish]

lgtm

[MatzeB]

For the record: When I started working on this stuff WebAssembly was not in tree yet. I did not grep again after rebasing my patch, sorry.

• Matthias

[jfb]

In D11199#205080, @MatzeB wrote:

For the record: When I started working on this stuff WebAssembly was not in tree yet. I did not grep again after rebasing my patch, sorry.

• Matthias

No worries, I went for snarky amusement!

llvm/trunk/include/llvm/Target/TargetRegisterInfo.h

virtual bool requiresVirtualBaseRegisters(const MachineFunction &MF) const {
     return false;
   }
 
   /// hasReservedSpillSlot - Return true if target has reserved a spill slot in
   /// the stack frame of the given function for the specified register. e.g. On
   /// x86, if the frame register is required, the first fixed stack object is
   /// reserved as its spill slot. This tells PEI not to create a new stack frame
   /// object for the given register. It should be called only after
-  /// processFunctionBeforeCalleeSavedScan().
+  /// determineCalleeSaves().
   virtual bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg,
                                     int &FrameIdx) const {
     return false;
   }
 
   /// trackLivenessAfterRegAlloc - returns true if the live-ins should be tracked
   /// after register allocation.
   virtual bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const {

llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp

void AArch64FrameLowering::determineCalleeSaves(MachineFunction &MF,
   if (RegInfo->needsStackRealignment(MF) && !RegInfo->hasBasePointer(MF))
     SavedRegs.set(AArch64::X9);
 
   // If any callee-saved registers are used, the frame cannot be eliminated.
   unsigned NumGPRSpilled = 0;
   unsigned NumFPRSpilled = 0;
   bool ExtraCSSpill = false;
   bool CanEliminateFrame = true;
-  DEBUG(dbgs() << "*** processFunctionBeforeCalleeSavedScan\nUsed CSRs:");
+  DEBUG(dbgs() << "*** determineCalleeSaves\nUsed CSRs:");
   const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF);
 
   // Check pairs of consecutive callee-saved registers.
   for (unsigned i = 0; CSRegs[i]; i += 2) {
     assert(CSRegs[i + 1] && "Odd number of callee-saved registers!");
 
     const unsigned OddReg = CSRegs[i];
     const unsigned EvenReg = CSRegs[i + 1];

llvm/trunk/lib/Target/AArch64/AArch64MachineFunctionInfo.h

class AArch64FunctionInfo : public MachineFunctionInfo {
   unsigned BytesInStackArgArea;
 
   /// The number of bytes to restore to deallocate space for incoming
   /// arguments. Canonically 0 in the C calling convention, but non-zero when
   /// callee is expected to pop the args.
   unsigned ArgumentStackToRestore;
 
   /// HasStackFrame - True if this function has a stack frame. Set by
-  /// processFunctionBeforeCalleeSavedScan().
+  /// determineCalleeSaves().
   bool HasStackFrame;
 
   /// \brief Amount of stack frame size, not including callee-saved registers.
   unsigned LocalStackSize;
 
   /// \brief Number of TLS accesses using the special (combinable)
   /// _TLS_MODULE_BASE_ symbol.
   unsigned NumLocalDynamicTLSAccesses;

llvm/trunk/lib/Target/ARM/ARMMachineFunctionInfo.h

class ARMFunctionInfo : public MachineFunctionInfo {
   /// VarArgsRegSaveSize - Size of the register save area for vararg functions.
   ///
   unsigned ArgRegsSaveSize;
 
   /// ReturnRegsCount - Number of registers used up in the return.
   unsigned ReturnRegsCount;
 
   /// HasStackFrame - True if this function has a stack frame. Set by
-  /// processFunctionBeforeCalleeSavedScan().
+  /// determineCalleeSaves().
   bool HasStackFrame;
 
   /// RestoreSPFromFP - True if epilogue should restore SP from FP. Set by
   /// emitPrologue.
   bool RestoreSPFromFP;
 
   /// LRSpilledForFarJump - True if the LR register has been for spilled to
   /// enable far jump.

llvm/trunk/lib/Target/WebAssembly/WebAssemblyFrameLowering.h

public:
 
   /// These methods insert prolog and epilog code into the function.
   void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
   void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
 
   bool hasFP(const MachineFunction &MF) const override;
   bool hasReservedCallFrame(const MachineFunction &MF) const override;
 
-  void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
-                                            RegScavenger *RS) const override;
+  void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
+                            RegScavenger *RS = nullptr) const override;
 };
 
 } // end namespace llvm
 
 #endif

llvm/trunk/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp

void WebAssemblyFrameLowering::emitPrologue(MachineFunction &MF,
   llvm_unreachable("TODO: implement emitPrologue");
 }
 
 void WebAssemblyFrameLowering::emitEpilogue(MachineFunction &MF,
                                             MachineBasicBlock &MBB) const {
   llvm_unreachable("TODO: implement emitEpilogue");
 }
 
-void WebAssemblyFrameLowering::processFunctionBeforeCalleeSavedScan(
-    MachineFunction &MF, RegScavenger *RS) const {
-  llvm_unreachable("TODO: implement processFunctionBeforeCalleeSavedScan");
+void WebAssemblyFrameLowering::determineCalleeSaves(MachineFunction &MF,
+                                                    BitVector &SavedRegs,
+                                                    RegScavenger *RS) const {
+  llvm_unreachable("TODO: implement determineCalleeSaves");
 }

llvm/trunk/test/CodeGen/AArch64/arm64-spill-lr.ll

 ; RUN: llc -mtriple=arm64-apple-ios < %s
 @bar = common global i32 0, align 4
 
-; Leaf function which uses all callee-saved registers and allocates >= 256 bytes on the stack
-; this will cause processFunctionBeforeCalleeSavedScan() to spill LR as an additional scratch
-; register.
+; Leaf function which uses all callee-saved registers and allocates >= 256 bytes
+; on the stack this will cause determineCalleeSaves() to spill LR as an
+; additional scratch register.
 ;
 ; This is a crash-only regression test for rdar://15124582.
 define i32 @foo(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) nounwind {
 entry:
   %stack = alloca [128 x i32], align 4
   %0 = bitcast [128 x i32]* %stack to i8*
   %idxprom = sext i32 %a to i64
   %arrayidx = getelementptr inbounds [128 x i32], [128 x i32]* %stack, i64 0, i64 %idxprom