[ARM/AARCH64] Make test MachineBranchProb.ll more robust and re-enable for ARM/AArch64

Balaram Makam · Balaram Makam · commit 7c79470c71e1 · 2017-10-05T18:33:34.000Z
Summary: Make test robust enough to not fail due to CFG changes and re-enable for ARM/AArch64. Reviewers: rovka, fhahn Reviewed By: fhahn Subscribers: fhahn, aemerson, rengolin, mcrosier, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D38590 llvm-svn: 315002
diff --git a/llvm/test/CodeGen/Generic/MachineBranchProb.ll b/llvm/test/CodeGen/Generic/MachineBranchProb.ll
@@ -1,15 +1,14 @@
 ; RUN: llc < %s -print-machineinstrs=expand-isel-pseudos -o /dev/null 2>&1 | FileCheck %s
 
-; ARM & AArch64 run an extra SimplifyCFG which disrupts this test.
-; UNSUPPORTED: arm,aarch64
-
 ; Hexagon runs passes that renumber the basic blocks, causing this test
 ; to fail.
 ; XFAIL: hexagon
 
 ; Bug: PR31899
 ; XFAIL: avr
 
+declare void @foo()
+
 ; Make sure we have the correct weight attached to each successor.
 define i32 @test2(i32 %x) nounwind uwtable readnone ssp {
 ; CHECK-LABEL: Machine code for function test2:
@@ -29,6 +28,8 @@ entry:
 ; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}36.36%) BB#3({{[0-9a-fx/= ]+}}63.64%)
 
 sw.bb:
+; this call will prevent simplifyCFG from optimizing the block away in ARM/AArch64.
+  tail call void @foo()
   br label %return
 
 sw.bb1:
