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petar-jovanovicpetar-jovanovic
committedJun 7, 2017
[mips][dsp] Modify repl.ph to accept signed immediate values
Changed immediate type for repl.ph from uimm10 to simm10 as per the specs. Repl.qb still accepts uimm8. Both instructions now mimic the behaviour of GNU as. Patch by Stefan Maksimovic. Differential Revision: https://reviews.llvm.org/D33594 llvm-svn: 304918
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llvmorg-21-initllvmorg-5.0.0-rc1
1 parent af515d9 commit 2f5f8e9

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6 files changed

+20
-7
lines changed

6 files changed

+20
-7
lines changed
 

‎llvm/lib/Target/Mips/MipsDSPInstrInfo.td

+3-2
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@ def immZExt4 : ImmLeaf<i32, [{return isUInt<4>(Imm);}]>;
1919
def immZExt8 : ImmLeaf<i32, [{return isUInt<8>(Imm);}]>;
2020
def immZExt10 : ImmLeaf<i32, [{return isUInt<10>(Imm);}]>;
2121
def immSExt6 : ImmLeaf<i32, [{return isInt<6>(Imm);}]>;
22+
def immSExt10 : ImmLeaf<i32, [{return isInt<10>(Imm);}]>;
2223

2324
// Mips-specific dsp nodes
2425
def SDT_MipsExtr : SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisSameAs<0, 1>,
@@ -851,8 +852,8 @@ class PACKRL_PH_DESC : CMP_EQ_QB_R3_DESC_BASE<"packrl.ph", int_mips_packrl_ph,
851852
class REPL_QB_DESC : REPL_DESC_BASE<"repl.qb", int_mips_repl_qb, uimm8,
852853
immZExt8, NoItinerary, DSPROpnd>;
853854

854-
class REPL_PH_DESC : REPL_DESC_BASE<"repl.ph", int_mips_repl_ph, uimm10,
855-
immZExt10, NoItinerary, DSPROpnd>;
855+
class REPL_PH_DESC : REPL_DESC_BASE<"repl.ph", int_mips_repl_ph, simm10,
856+
immSExt10, NoItinerary, DSPROpnd>;
856857

857858
class REPLV_QB_DESC : ABSQ_S_PH_R2_DESC_BASE<"replv.qb", int_mips_repl_qb,
858859
NoItinerary, DSPROpnd, GPR32Opnd>;

‎llvm/test/CodeGen/Mips/dsp-r1.ll

+11-1
Original file line numberDiff line numberDiff line change
@@ -1172,9 +1172,19 @@ entry:
11721172
ret { i32 } %.fca.0.insert
11731173
}
11741174

1175+
define { i32 } @test__builtin_mips_repl_ph2(i32 %i0) nounwind readnone {
1176+
entry:
1177+
; CHECK: repl.ph
1178+
1179+
%0 = tail call <2 x i16> @llvm.mips.repl.ph(i32 -2)
1180+
%1 = bitcast <2 x i16> %0 to i32
1181+
%.fca.0.insert = insertvalue { i32 } undef, i32 %1, 0
1182+
ret { i32 } %.fca.0.insert
1183+
}
1184+
11751185
declare <2 x i16> @llvm.mips.repl.ph(i32) nounwind readnone
11761186

1177-
define { i32 } @test__builtin_mips_repl_ph2(i32 %i0, i32 %a0) nounwind readnone {
1187+
define { i32 } @test__builtin_mips_repl_ph3(i32 %i0, i32 %a0) nounwind readnone {
11781188
entry:
11791189
; CHECK: replv.ph
11801190

‎llvm/test/MC/Disassembler/Mips/micromips-dsp/valid.txt

+1-1
Original file line numberDiff line numberDiff line change
@@ -94,7 +94,7 @@
9494
0x00 0x01 0x70 0x7c # CHECK: mtlo $1, $ac1
9595
0x00 0x22 0xf1 0x3c # CHECK: raddu.w.qb $1, $2
9696
0x00 0x20 0x86 0x7c # CHECK: rddsp $1, 2
97-
0x02 0x00 0x08 0x3d # CHECK: repl.ph $1, 512
97+
0x00 0x02 0x08 0x3d # CHECK: repl.ph $1, 2
9898
0x00 0x30 0x05 0xfc # CHECK: repl.qb $1, 128
9999
0x00 0x22 0x03 0x3c # CHECK: replv.ph $1, $2
100100
0x00 0x22 0x13 0x3c # CHECK: replv.qb $1, $2

‎llvm/test/MC/Mips/dsp/invalid.s

+2-2
Original file line numberDiff line numberDiff line change
@@ -31,8 +31,8 @@
3131
shilo $ac1, -64 # CHECK: :[[@LINE]]:15: error: expected 6-bit signed immediate
3232
repl.qb $2, -1 # CHECK: :[[@LINE]]:15: error: expected 8-bit unsigned immediate
3333
repl.qb $2, 256 # CHECK: :[[@LINE]]:15: error: expected 8-bit unsigned immediate
34-
repl.ph $2, -1 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
35-
repl.ph $2, 1024 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
34+
repl.ph $2, -513 # CHECK: :[[@LINE]]:15: error: expected 10-bit signed immediate
35+
repl.ph $2, 512 # CHECK: :[[@LINE]]:15: error: expected 10-bit signed immediate
3636
rddsp $2, -1 # CHECK: :[[@LINE]]:13: error: expected 10-bit unsigned immediate
3737
rddsp $2, 1024 # CHECK: :[[@LINE]]:13: error: expected 10-bit unsigned immediate
3838
wrdsp $5, -1 # CHECK: :[[@LINE]]:13: error: expected 10-bit unsigned immediate

‎llvm/test/MC/Mips/micromips-dsp/invalid.s

+2
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 -mattr=micromips -mattr=+dsp 2>%t1
22
# RUN: FileCheck %s < %t1
33

4+
repl.ph $2, -513 # CHECK: :[[@LINE]]:15: error: expected 10-bit signed immediate
5+
repl.ph $2, 512 # CHECK: :[[@LINE]]:15: error: expected 10-bit signed immediate
46
shll.ph $3, $4, 16 # CHECK: :[[@LINE]]:19: error: expected 4-bit unsigned immediate
57
shll.ph $3, $4, -1 # CHECK: :[[@LINE]]:19: error: expected 4-bit unsigned immediate
68
shll_s.ph $3, $4, 16 # CHECK: :[[@LINE]]:21: error: expected 4-bit unsigned immediate

‎llvm/test/MC/Mips/micromips-dsp/valid.s

+1-1
Original file line numberDiff line numberDiff line change
@@ -95,7 +95,7 @@
9595
mtlo $1, $ac1 # CHECK: mtlo $1, $ac1 # encoding: [0x00,0x01,0x70,0x7c]
9696
raddu.w.qb $1, $2 # CHECK: raddu.w.qb $1, $2 # encoding: [0x00,0x22,0xf1,0x3c]
9797
rddsp $1, 2 # CHECK: rddsp $1, 2 # encoding: [0x00,0x20,0x86,0x7c]
98-
repl.ph $1, 512 # CHECK: repl.ph $1, 512 # encoding: [0x02,0x00,0x08,0x3d]
98+
repl.ph $1, 2 # CHECK: repl.ph $1, 2 # encoding: [0x00,0x02,0x08,0x3d]
9999
repl.qb $1, 128 # CHECK: repl.qb $1, 128 # encoding: [0x00,0x30,0x05,0xfc]
100100
replv.ph $1, $2 # CHECK: replv.ph $1, $2 # encoding: [0x00,0x22,0x03,0x3c]
101101
replv.qb $1, $2 # CHECK: replv.qb $1, $2 # encoding: [0x00,0x22,0x13,0x3c]

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