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Zlatko BuljanZlatko Buljan
Zlatko Buljan
authored and
Zlatko Buljan
committedNov 17, 2015
[mips][microMIPS] Implement SUBQ[_S].PH, SUBQ_S.W, SUBQH[_R].PH, SUBQH[_R].W, SUBU[_S].PH, SUBU[_S].QB and SUBUH[_R].QB instructions
Differential Revision: http://reviews.llvm.org/D14114 llvm-svn: 253329
·
llvmorg-21-initllvmorg-3.8.0-rc1
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6 files changed

+75
-13
lines changed

6 files changed

+75
-13
lines changed
 

‎llvm/lib/Target/Mips/MicroMipsDSPInstrInfo.td

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -77,6 +77,19 @@ class PRECEU_PH_QBL_MM_ENC : POOL32A_2R_FMT<"preceu.ph.qbl", 0b1011000100>;
7777
class PRECEU_PH_QBLA_MM_ENC : POOL32A_2R_FMT<"preceu.ph.qbla", 0b1011001100>;
7878
class PRECEU_PH_QBR_MM_ENC : POOL32A_2R_FMT<"preceu.ph.qbr", 0b1101000100>;
7979
class PRECEU_PH_QBRA_MM_ENC : POOL32A_2R_FMT<"preceu.ph.qbra", 0b1101001100>;
80+
class SUBQ_PH_MM_ENC : POOL32A_3R_FMT<"subq.ph", 0b01000001101>;
81+
class SUBQ_S_PH_MM_ENC : POOL32A_3R_FMT<"subq_s.ph", 0b11000001101>;
82+
class SUBQ_S_W_MM_ENC : POOL32A_3RB0_FMT<"subq_s.w", 0b1101000101>;
83+
class SUBQH_PH_MMR2_ENC : POOL32A_3R_FMT<"subqh.ph", 0b01001001101>;
84+
class SUBQH_R_PH_MMR2_ENC : POOL32A_3R_FMT<"subqh_r.ph", 0b11001001101>;
85+
class SUBQH_W_MMR2_ENC : POOL32A_3R_FMT<"subqh.w", 0b01010001101>;
86+
class SUBQH_R_W_MMR2_ENC : POOL32A_3R_FMT<"subqh_r.w", 0b11010001101>;
87+
class SUBU_PH_MMR2_ENC : POOL32A_3R_FMT<"subu.ph", 0b01100001101>;
88+
class SUBU_S_PH_MMR2_ENC : POOL32A_3R_FMT<"subu_s.ph", 0b11100001101>;
89+
class SUBU_QB_MM_ENC : POOL32A_3R_FMT<"subu.qb", 0b01011001101>;
90+
class SUBU_S_QB_MM_ENC : POOL32A_3R_FMT<"subu_s.qb", 0b11011001101>;
91+
class SUBUH_QB_MMR2_ENC : POOL32A_3R_FMT<"subuh.qb", 0b01101001101>;
92+
class SUBUH_R_QB_MMR2_ENC : POOL32A_3R_FMT<"subuh_r.qb", 0b11101001101>;
8093

8194
// Instruction desc.
8295
class ABSQ_S_PH_MM_R2_DESC_BASE<string opstr, SDPatternOperator OpNode,
@@ -234,6 +247,11 @@ def PRECEU_PH_QBL_MM : DspMMRel, PRECEU_PH_QBL_MM_ENC, PRECEU_PH_QBL_MM_DESC;
234247
def PRECEU_PH_QBLA_MM : DspMMRel, PRECEU_PH_QBLA_MM_ENC, PRECEU_PH_QBLA_MM_DESC;
235248
def PRECEU_PH_QBR_MM : DspMMRel, PRECEU_PH_QBR_MM_ENC, PRECEU_PH_QBR_MM_DESC;
236249
def PRECEU_PH_QBRA_MM : DspMMRel, PRECEU_PH_QBRA_MM_ENC, PRECEU_PH_QBRA_MM_DESC;
250+
def SUBQ_PH_MM : DspMMRel, SUBQ_PH_MM_ENC, SUBQ_PH_DESC;
251+
def SUBQ_S_PH_MM : DspMMRel, SUBQ_S_PH_MM_ENC, SUBQ_S_PH_DESC;
252+
def SUBQ_S_W_MM : DspMMRel, SUBQ_S_W_MM_ENC, SUBQ_S_W_DESC;
253+
def SUBU_QB_MM : DspMMRel, SUBU_QB_MM_ENC, SUBU_QB_DESC;
254+
def SUBU_S_QB_MM : DspMMRel, SUBU_S_QB_MM_ENC, SUBU_S_QB_DESC;
237255
// microMIPS DSP Rev 2
238256
def ABSQ_S_QB_MMR2 : DspMMRel, ABSQ_S_QB_MMR2_ENC, ABSQ_S_QB_MMR2_DESC,
239257
ISA_DSPR2;
@@ -259,3 +277,11 @@ def SHRAV_R_QB_MMR2 : DspMMRel, SHRAV_R_QB_MMR2_ENC, SHRAV_R_QB_MMR2_DESC,
259277
ISA_DSPR2;
260278
def SHRL_PH_MMR2 : DspMMRel, SHRL_PH_MMR2_ENC, SHRL_PH_MMR2_DESC, ISA_DSPR2;
261279
def SHRLV_PH_MMR2 : DspMMRel, SHRLV_PH_MMR2_ENC, SHRLV_PH_MMR2_DESC, ISA_DSPR2;
280+
def SUBQH_PH_MMR2 : DspMMRel, SUBQH_PH_MMR2_ENC, SUBQH_PH_DESC, ISA_DSPR2;
281+
def SUBQH_R_PH_MMR2 : DspMMRel, SUBQH_R_PH_MMR2_ENC, SUBQH_R_PH_DESC, ISA_DSPR2;
282+
def SUBQH_W_MMR2 : DspMMRel, SUBQH_W_MMR2_ENC, SUBQH_W_DESC, ISA_DSPR2;
283+
def SUBQH_R_W_MMR2 : DspMMRel, SUBQH_R_W_MMR2_ENC, SUBQH_R_W_DESC, ISA_DSPR2;
284+
def SUBU_PH_MMR2 : DspMMRel, SUBU_PH_MMR2_ENC, SUBU_PH_DESC, ISA_DSPR2;
285+
def SUBU_S_PH_MMR2 : DspMMRel, SUBU_S_PH_MMR2_ENC, SUBU_S_PH_DESC, ISA_DSPR2;
286+
def SUBUH_QB_MMR2 : DspMMRel, SUBUH_QB_MMR2_ENC, SUBUH_QB_DESC, ISA_DSPR2;
287+
def SUBUH_R_QB_MMR2 : DspMMRel, SUBUH_R_QB_MMR2_ENC, SUBUH_R_QB_DESC, ISA_DSPR2;

‎llvm/lib/Target/Mips/MipsDSPInstrInfo.td

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1089,14 +1089,14 @@ def BPOSGE32_PSEUDO : BPOSGE32_PSEUDO_DESC_BASE<int_mips_bposge32,
10891089
// MIPS DSP Rev 1
10901090
def ADDU_QB : DspMMRel, ADDU_QB_ENC, ADDU_QB_DESC;
10911091
def ADDU_S_QB : DspMMRel, ADDU_S_QB_ENC, ADDU_S_QB_DESC;
1092-
def SUBU_QB : SUBU_QB_ENC, SUBU_QB_DESC;
1093-
def SUBU_S_QB : SUBU_S_QB_ENC, SUBU_S_QB_DESC;
1092+
def SUBU_QB : DspMMRel, SUBU_QB_ENC, SUBU_QB_DESC;
1093+
def SUBU_S_QB : DspMMRel, SUBU_S_QB_ENC, SUBU_S_QB_DESC;
10941094
def ADDQ_PH : DspMMRel, ADDQ_PH_ENC, ADDQ_PH_DESC;
10951095
def ADDQ_S_PH : DspMMRel, ADDQ_S_PH_ENC, ADDQ_S_PH_DESC;
1096-
def SUBQ_PH : SUBQ_PH_ENC, SUBQ_PH_DESC;
1097-
def SUBQ_S_PH : SUBQ_S_PH_ENC, SUBQ_S_PH_DESC;
1096+
def SUBQ_PH : DspMMRel, SUBQ_PH_ENC, SUBQ_PH_DESC;
1097+
def SUBQ_S_PH : DspMMRel, SUBQ_S_PH_ENC, SUBQ_S_PH_DESC;
10981098
def ADDQ_S_W : DspMMRel, ADDQ_S_W_ENC, ADDQ_S_W_DESC;
1099-
def SUBQ_S_W : SUBQ_S_W_ENC, SUBQ_S_W_DESC;
1099+
def SUBQ_S_W : DspMMRel, SUBQ_S_W_ENC, SUBQ_S_W_DESC;
11001100
def ADDSC : DspMMRel, ADDSC_ENC, ADDSC_DESC;
11011101
def ADDWC : DspMMRel, ADDWC_ENC, ADDWC_DESC;
11021102
def MODSUB : MODSUB_ENC, MODSUB_DESC;
@@ -1206,24 +1206,24 @@ let Predicates = [HasDSPR2] in {
12061206

12071207
def ADDU_PH : DspMMRel, ADDU_PH_ENC, ADDU_PH_DESC;
12081208
def ADDU_S_PH : DspMMRel, ADDU_S_PH_ENC, ADDU_S_PH_DESC;
1209-
def SUBU_PH : SUBU_PH_ENC, SUBU_PH_DESC;
1210-
def SUBU_S_PH : SUBU_S_PH_ENC, SUBU_S_PH_DESC;
1209+
def SUBU_PH : DspMMRel, SUBU_PH_ENC, SUBU_PH_DESC;
1210+
def SUBU_S_PH : DspMMRel, SUBU_S_PH_ENC, SUBU_S_PH_DESC;
12111211
def CMPGDU_EQ_QB : CMPGDU_EQ_QB_ENC, CMPGDU_EQ_QB_DESC;
12121212
def CMPGDU_LT_QB : CMPGDU_LT_QB_ENC, CMPGDU_LT_QB_DESC;
12131213
def CMPGDU_LE_QB : CMPGDU_LE_QB_ENC, CMPGDU_LE_QB_DESC;
12141214
def ABSQ_S_QB : DspMMRel, ABSQ_S_QB_ENC, ABSQ_S_QB_DESC;
12151215
def ADDUH_QB : DspMMRel, ADDUH_QB_ENC, ADDUH_QB_DESC;
12161216
def ADDUH_R_QB : DspMMRel, ADDUH_R_QB_ENC, ADDUH_R_QB_DESC;
1217-
def SUBUH_QB : SUBUH_QB_ENC, SUBUH_QB_DESC;
1218-
def SUBUH_R_QB : SUBUH_R_QB_ENC, SUBUH_R_QB_DESC;
1217+
def SUBUH_QB : DspMMRel, SUBUH_QB_ENC, SUBUH_QB_DESC;
1218+
def SUBUH_R_QB : DspMMRel, SUBUH_R_QB_ENC, SUBUH_R_QB_DESC;
12191219
def ADDQH_PH : DspMMRel, ADDQH_PH_ENC, ADDQH_PH_DESC;
12201220
def ADDQH_R_PH : DspMMRel, ADDQH_R_PH_ENC, ADDQH_R_PH_DESC;
1221-
def SUBQH_PH : SUBQH_PH_ENC, SUBQH_PH_DESC;
1222-
def SUBQH_R_PH : SUBQH_R_PH_ENC, SUBQH_R_PH_DESC;
1221+
def SUBQH_PH : DspMMRel, SUBQH_PH_ENC, SUBQH_PH_DESC;
1222+
def SUBQH_R_PH : DspMMRel, SUBQH_R_PH_ENC, SUBQH_R_PH_DESC;
12231223
def ADDQH_W : DspMMRel, ADDQH_W_ENC, ADDQH_W_DESC;
12241224
def ADDQH_R_W : DspMMRel, ADDQH_R_W_ENC, ADDQH_R_W_DESC;
1225-
def SUBQH_W : SUBQH_W_ENC, SUBQH_W_DESC;
1226-
def SUBQH_R_W : SUBQH_R_W_ENC, SUBQH_R_W_DESC;
1225+
def SUBQH_W : DspMMRel, SUBQH_W_ENC, SUBQH_W_DESC;
1226+
def SUBQH_R_W : DspMMRel, SUBQH_R_W_ENC, SUBQH_R_W_DESC;
12271227
def MUL_PH : MUL_PH_ENC, MUL_PH_DESC;
12281228
def MUL_S_PH : MUL_S_PH_ENC, MUL_S_PH_DESC;
12291229
def MULQ_S_W : MULQ_S_W_ENC, MULQ_S_W_DESC;

‎llvm/test/MC/Disassembler/Mips/micromips-dsp/valid.txt

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -46,3 +46,8 @@
4646
0x00 0x64 0x2a 0xf5 # CHECK: shra_r.w $3, $4, 5
4747
0x00 0x64 0xb8 0x7c # CHECK: shrl.qb $3, $4, 5
4848
0x00 0x85 0x1b 0x55 # CHECK: shrlv.qb $3, $4, $5
49+
0x00 0xa4 0x1a 0x0d # CHECK: subq.ph $3, $4, $5
50+
0x00 0xa4 0x1e 0x0d # CHECK: subq_s.ph $3, $4, $5
51+
0x00 0xa4 0x1b 0x45 # CHECK: subq_s.w $3, $4, $5
52+
0x00 0xa4 0x1a 0xcd # CHECK: subu.qb $3, $4, $5
53+
0x00 0xa4 0x1e 0xcd # CHECK: subu_s.qb $3, $4, $5

‎llvm/test/MC/Disassembler/Mips/micromips-dspr2/valid.txt

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -65,3 +65,16 @@
6565
0x00 0x64 0xb8 0x7c # CHECK: shrl.qb $3, $4, 5
6666
0x00 0x85 0x1b 0x15 # CHECK: shrlv.ph $3, $4, $5
6767
0x00 0x85 0x1b 0x55 # CHECK: shrlv.qb $3, $4, $5
68+
0x00 0xa4 0x1a 0x0d # CHECK: subq.ph $3, $4, $5
69+
0x00 0xa4 0x1e 0x0d # CHECK: subq_s.ph $3, $4, $5
70+
0x00 0xa4 0x1b 0x45 # CHECK: subq_s.w $3, $4, $5
71+
0x00 0xa4 0x1a 0x4d # CHECK: subqh.ph $3, $4, $5
72+
0x00 0xa4 0x1e 0x4d # CHECK: subqh_r.ph $3, $4, $5
73+
0x00 0xa4 0x1a 0x8d # CHECK: subqh.w $3, $4, $5
74+
0x00 0xa4 0x1e 0x8d # CHECK: subqh_r.w $3, $4, $5
75+
0x00 0xa4 0x1b 0x0d # CHECK: subu.ph $3, $4, $5
76+
0x00 0xa4 0x1f 0x0d # CHECK: subu_s.ph $3, $4, $5
77+
0x00 0xa4 0x1a 0xcd # CHECK: subu.qb $3, $4, $5
78+
0x00 0xa4 0x1e 0xcd # CHECK: subu_s.qb $3, $4, $5
79+
0x00 0xa4 0x1b 0x4d # CHECK: subuh.qb $3, $4, $5
80+
0x00 0xa4 0x1f 0x4d # CHECK: subuh_r.qb $3, $4, $5

‎llvm/test/MC/Mips/micromips-dsp/valid.s

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -47,3 +47,8 @@
4747
shra_r.w $3, $4, 5 # CHECK: shra_r.w $3, $4, 5 # encoding: [0x00,0x64,0x2a,0xf5]
4848
shrl.qb $3, $4, 5 # CHECK: shrl.qb $3, $4, 5 # encoding: [0x00,0x64,0xb8,0x7c]
4949
shrlv.qb $3, $4, $5 # CHECK: shrlv.qb $3, $4, $5 # encoding: [0x00,0x85,0x1b,0x55]
50+
subq.ph $3, $4, $5 # CHECK: subq.ph $3, $4, $5 # encoding: [0x00,0xa4,0x1a,0x0d]
51+
subq_s.ph $3, $4, $5 # CHECK: subq_s.ph $3, $4, $5 # encoding: [0x00,0xa4,0x1e,0x0d]
52+
subq_s.w $3, $4, $5 # CHECK: subq_s.w $3, $4, $5 # encoding: [0x00,0xa4,0x1b,0x45]
53+
subu.qb $3, $4, $5 # CHECK: subu.qb $3, $4, $5 # encoding: [0x00,0xa4,0x1a,0xcd]
54+
subu_s.qb $3, $4, $5 # CHECK: subu_s.qb $3, $4, $5 # encoding: [0x00,0xa4,0x1e,0xcd]

‎llvm/test/MC/Mips/micromips-dspr2/valid.s

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -66,3 +66,16 @@
6666
shrl.qb $3, $4, 5 # CHECK: shrl.qb $3, $4, 5 # encoding: [0x00,0x64,0xb8,0x7c]
6767
shrlv.ph $3, $4, $5 # CHECK: shrlv.ph $3, $4, $5 # encoding: [0x00,0x85,0x1b,0x15]
6868
shrlv.qb $3, $4, $5 # CHECK: shrlv.qb $3, $4, $5 # encoding: [0x00,0x85,0x1b,0x55]
69+
subq.ph $3, $4, $5 # CHECK: subq.ph $3, $4, $5 # encoding: [0x00,0xa4,0x1a,0x0d]
70+
subq_s.ph $3, $4, $5 # CHECK: subq_s.ph $3, $4, $5 # encoding: [0x00,0xa4,0x1e,0x0d]
71+
subq_s.w $3, $4, $5 # CHECK: subq_s.w $3, $4, $5 # encoding: [0x00,0xa4,0x1b,0x45]
72+
subqh.ph $3, $4, $5 # CHECK: subqh.ph $3, $4, $5 # encoding: [0x00,0xa4,0x1a,0x4d]
73+
subqh_r.ph $3, $4, $5 # CHECK: subqh_r.ph $3, $4, $5 # encoding: [0x00,0xa4,0x1e,0x4d]
74+
subqh.w $3, $4, $5 # CHECK: subqh.w $3, $4, $5 # encoding: [0x00,0xa4,0x1a,0x8d]
75+
subqh_r.w $3, $4, $5 # CHECK: subqh_r.w $3, $4, $5 # encoding: [0x00,0xa4,0x1e,0x8d]
76+
subu.ph $3, $4, $5 # CHECK: subu.ph $3, $4, $5 # encoding: [0x00,0xa4,0x1b,0x0d]
77+
subu_s.ph $3, $4, $5 # CHECK: subu_s.ph $3, $4, $5 # encoding: [0x00,0xa4,0x1f,0x0d]
78+
subu.qb $3, $4, $5 # CHECK: subu.qb $3, $4, $5 # encoding: [0x00,0xa4,0x1a,0xcd]
79+
subu_s.qb $3, $4, $5 # CHECK: subu_s.qb $3, $4, $5 # encoding: [0x00,0xa4,0x1e,0xcd]
80+
subuh.qb $3, $4, $5 # CHECK: subuh.qb $3, $4, $5 # encoding: [0x00,0xa4,0x1b,0x4d]
81+
subuh_r.qb $3, $4, $5 # CHECK: subuh_r.qb $3, $4, $5 # encoding: [0x00,0xa4,0x1f,0x4d]

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