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petar-jovanovicpetar-jovanovic
committedMay 28, 2015
[Mips64] Add support for MCJIT for MIPS64r2 and MIPS64r6
Add support for resolving MIPS64r2 and MIPS64r6 relocations in MCJIT. Patch by Vladimir Radosavljevic. Differential Revision: http://reviews.llvm.org/D9667 llvm-svn: 238424
1 parent fb7d5b8 commit 9720283

32 files changed

+469
-33
lines changed
 

‎llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -149,6 +149,7 @@ RuntimeDyldImpl::loadObjectImpl(const object::ObjectFile &Obj) {
149149
// Save information about our target
150150
Arch = (Triple::ArchType)Obj.getArch();
151151
IsTargetLittleEndian = Obj.isLittleEndian();
152+
setMipsABI(Obj);
152153

153154
// Compute the memory size required to load all sections to be loaded
154155
// and pass this information to the memory manager
@@ -689,7 +690,7 @@ uint8_t *RuntimeDyldImpl::createStubFunction(uint8_t *Addr,
689690
// and stubs for branches Thumb - ARM and ARM - Thumb.
690691
writeBytesUnaligned(0xe51ff004, Addr, 4); // ldr pc,<label>
691692
return Addr + 4;
692-
} else if (Arch == Triple::mipsel || Arch == Triple::mips) {
693+
} else if (IsMipsO32ABI) {
693694
// 0: 3c190000 lui t9,%hi(addr).
694695
// 4: 27390000 addiu t9,t9,%lo(addr).
695696
// 8: 03200008 jr t9.

‎llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp

Lines changed: 247 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -507,6 +507,199 @@ void RuntimeDyldELF::resolveMIPSRelocation(const SectionEntry &Section,
507507
}
508508
}
509509

510+
void RuntimeDyldELF::setMipsABI(const ObjectFile &Obj) {
511+
if (!StringRef(Triple::getArchTypePrefix(Arch)).equals("mips")) {
512+
IsMipsO32ABI = false;
513+
IsMipsN64ABI = false;
514+
return;
515+
}
516+
unsigned AbiVariant;
517+
Obj.getPlatformFlags(AbiVariant);
518+
IsMipsO32ABI = AbiVariant & ELF::EF_MIPS_ABI_O32;
519+
IsMipsN64ABI = Obj.getFileFormatName().equals("ELF64-mips");
520+
if (AbiVariant & ELF::EF_MIPS_ABI2)
521+
llvm_unreachable("Mips N32 ABI is not supported yet");
522+
}
523+
524+
void RuntimeDyldELF::resolveMIPS64Relocation(const SectionEntry &Section,
525+
uint64_t Offset, uint64_t Value,
526+
uint32_t Type, int64_t Addend,
527+
uint64_t SymOffset,
528+
SID SectionID) {
529+
uint32_t r_type = Type & 0xff;
530+
uint32_t r_type2 = (Type >> 8) & 0xff;
531+
uint32_t r_type3 = (Type >> 16) & 0xff;
532+
533+
// RelType is used to keep information for which relocation type we are
534+
// applying relocation.
535+
uint32_t RelType = r_type;
536+
int64_t CalculatedValue = evaluateMIPS64Relocation(Section, Offset, Value,
537+
RelType, Addend,
538+
SymOffset, SectionID);
539+
if (r_type2 != ELF::R_MIPS_NONE) {
540+
RelType = r_type2;
541+
CalculatedValue = evaluateMIPS64Relocation(Section, Offset, 0, RelType,
542+
CalculatedValue, SymOffset,
543+
SectionID);
544+
}
545+
if (r_type3 != ELF::R_MIPS_NONE) {
546+
RelType = r_type3;
547+
CalculatedValue = evaluateMIPS64Relocation(Section, Offset, 0, RelType,
548+
CalculatedValue, SymOffset,
549+
SectionID);
550+
}
551+
applyMIPS64Relocation(Section.Address + Offset, CalculatedValue, RelType);
552+
}
553+
554+
int64_t
555+
RuntimeDyldELF::evaluateMIPS64Relocation(const SectionEntry &Section,
556+
uint64_t Offset, uint64_t Value,
557+
uint32_t Type, int64_t Addend,
558+
uint64_t SymOffset, SID SectionID) {
559+
560+
DEBUG(dbgs() << "evaluateMIPS64Relocation, LocalAddress: 0x"
561+
<< format("%llx", Section.Address + Offset)
562+
<< " FinalAddress: 0x"
563+
<< format("%llx", Section.LoadAddress + Offset)
564+
<< " Value: 0x" << format("%llx", Value) << " Type: 0x"
565+
<< format("%x", Type) << " Addend: 0x" << format("%llx", Addend)
566+
<< " SymOffset: " << format("%x", SymOffset)
567+
<< "\n");
568+
569+
switch (Type) {
570+
default:
571+
llvm_unreachable("Not implemented relocation type!");
572+
break;
573+
case ELF::R_MIPS_JALR:
574+
case ELF::R_MIPS_NONE:
575+
break;
576+
case ELF::R_MIPS_32:
577+
case ELF::R_MIPS_64:
578+
return Value + Addend;
579+
case ELF::R_MIPS_26:
580+
return ((Value + Addend) >> 2) & 0x3ffffff;
581+
case ELF::R_MIPS_GPREL16: {
582+
uint64_t GOTAddr = getSectionLoadAddress(SectionToGOTMap[SectionID]);
583+
return Value + Addend - (GOTAddr + 0x7ff0);
584+
}
585+
case ELF::R_MIPS_SUB:
586+
return Value - Addend;
587+
case ELF::R_MIPS_HI16:
588+
// Get the higher 16-bits. Also add 1 if bit 15 is 1.
589+
return ((Value + Addend + 0x8000) >> 16) & 0xffff;
590+
case ELF::R_MIPS_LO16:
591+
return (Value + Addend) & 0xffff;
592+
case ELF::R_MIPS_CALL16:
593+
case ELF::R_MIPS_GOT_DISP:
594+
case ELF::R_MIPS_GOT_PAGE: {
595+
uint8_t *LocalGOTAddr =
596+
getSectionAddress(SectionToGOTMap[SectionID]) + SymOffset;
597+
uint64_t GOTEntry = readBytesUnaligned(LocalGOTAddr, 8);
598+
599+
Value += Addend;
600+
if (Type == ELF::R_MIPS_GOT_PAGE)
601+
Value = (Value + 0x8000) & ~0xffff;
602+
603+
if (GOTEntry)
604+
assert(GOTEntry == Value &&
605+
"GOT entry has two different addresses.");
606+
else
607+
writeBytesUnaligned(Value, LocalGOTAddr, 8);
608+
609+
return (SymOffset - 0x7ff0) & 0xffff;
610+
}
611+
case ELF::R_MIPS_GOT_OFST: {
612+
int64_t page = (Value + Addend + 0x8000) & ~0xffff;
613+
return (Value + Addend - page) & 0xffff;
614+
}
615+
case ELF::R_MIPS_GPREL32: {
616+
uint64_t GOTAddr = getSectionLoadAddress(SectionToGOTMap[SectionID]);
617+
return Value + Addend - (GOTAddr + 0x7ff0);
618+
}
619+
case ELF::R_MIPS_PC16: {
620+
uint64_t FinalAddress = (Section.LoadAddress + Offset);
621+
return ((Value + Addend - FinalAddress - 4) >> 2) & 0xffff;
622+
}
623+
case ELF::R_MIPS_PC18_S3: {
624+
uint64_t FinalAddress = (Section.LoadAddress + Offset);
625+
return ((Value + Addend - ((FinalAddress | 7) ^ 7)) >> 3) & 0x3ffff;
626+
}
627+
case ELF::R_MIPS_PC19_S2: {
628+
uint64_t FinalAddress = (Section.LoadAddress + Offset);
629+
return ((Value + Addend - FinalAddress) >> 2) & 0x7ffff;
630+
}
631+
case ELF::R_MIPS_PC21_S2: {
632+
uint64_t FinalAddress = (Section.LoadAddress + Offset);
633+
return ((Value + Addend - FinalAddress) >> 2) & 0x1fffff;
634+
}
635+
case ELF::R_MIPS_PC26_S2: {
636+
uint64_t FinalAddress = (Section.LoadAddress + Offset);
637+
return ((Value + Addend - FinalAddress) >> 2) & 0x3ffffff;
638+
}
639+
case ELF::R_MIPS_PCHI16: {
640+
uint64_t FinalAddress = (Section.LoadAddress + Offset);
641+
return ((Value + Addend - FinalAddress + 0x8000) >> 16) & 0xffff;
642+
}
643+
case ELF::R_MIPS_PCLO16: {
644+
uint64_t FinalAddress = (Section.LoadAddress + Offset);
645+
return (Value + Addend - FinalAddress) & 0xffff;
646+
}
647+
}
648+
return 0;
649+
}
650+
651+
void RuntimeDyldELF::applyMIPS64Relocation(uint8_t *TargetPtr,
652+
int64_t CalculatedValue,
653+
uint32_t Type) {
654+
uint32_t Insn = readBytesUnaligned(TargetPtr, 4);
655+
656+
switch (Type) {
657+
default:
658+
break;
659+
case ELF::R_MIPS_32:
660+
case ELF::R_MIPS_GPREL32:
661+
writeBytesUnaligned(CalculatedValue & 0xffffffff, TargetPtr, 4);
662+
break;
663+
case ELF::R_MIPS_64:
664+
case ELF::R_MIPS_SUB:
665+
writeBytesUnaligned(CalculatedValue, TargetPtr, 8);
666+
break;
667+
case ELF::R_MIPS_26:
668+
case ELF::R_MIPS_PC26_S2:
669+
Insn = (Insn & 0xfc000000) | CalculatedValue;
670+
writeBytesUnaligned(Insn, TargetPtr, 4);
671+
break;
672+
case ELF::R_MIPS_GPREL16:
673+
Insn = (Insn & 0xffff0000) | (CalculatedValue & 0xffff);
674+
writeBytesUnaligned(Insn, TargetPtr, 4);
675+
break;
676+
case ELF::R_MIPS_HI16:
677+
case ELF::R_MIPS_LO16:
678+
case ELF::R_MIPS_PCHI16:
679+
case ELF::R_MIPS_PCLO16:
680+
case ELF::R_MIPS_PC16:
681+
case ELF::R_MIPS_CALL16:
682+
case ELF::R_MIPS_GOT_DISP:
683+
case ELF::R_MIPS_GOT_PAGE:
684+
case ELF::R_MIPS_GOT_OFST:
685+
Insn = (Insn & 0xffff0000) | CalculatedValue;
686+
writeBytesUnaligned(Insn, TargetPtr, 4);
687+
break;
688+
case ELF::R_MIPS_PC18_S3:
689+
Insn = (Insn & 0xfffc0000) | CalculatedValue;
690+
writeBytesUnaligned(Insn, TargetPtr, 4);
691+
break;
692+
case ELF::R_MIPS_PC19_S2:
693+
Insn = (Insn & 0xfff80000) | CalculatedValue;
694+
writeBytesUnaligned(Insn, TargetPtr, 4);
695+
break;
696+
case ELF::R_MIPS_PC21_S2:
697+
Insn = (Insn & 0xffe00000) | CalculatedValue;
698+
writeBytesUnaligned(Insn, TargetPtr, 4);
699+
break;
700+
}
701+
}
702+
510703
// Return the .TOC. section and offset.
511704
void RuntimeDyldELF::findPPC64TOCSection(const ObjectFile &Obj,
512705
ObjSectionToIDMap &LocalSections,
@@ -784,13 +977,13 @@ void RuntimeDyldELF::resolveRelocation(const RelocationEntry &RE,
784977
uint64_t Value) {
785978
const SectionEntry &Section = Sections[RE.SectionID];
786979
return resolveRelocation(Section, RE.Offset, Value, RE.RelType, RE.Addend,
787-
RE.SymOffset);
980+
RE.SymOffset, RE.SectionID);
788981
}
789982

790983
void RuntimeDyldELF::resolveRelocation(const SectionEntry &Section,
791984
uint64_t Offset, uint64_t Value,
792985
uint32_t Type, int64_t Addend,
793-
uint64_t SymOffset) {
986+
uint64_t SymOffset, SID SectionID) {
794987
switch (Arch) {
795988
case Triple::x86_64:
796989
resolveX86_64Relocation(Section, Offset, Value, Type, Addend, SymOffset);
@@ -812,8 +1005,16 @@ void RuntimeDyldELF::resolveRelocation(const SectionEntry &Section,
8121005
break;
8131006
case Triple::mips: // Fall through.
8141007
case Triple::mipsel:
815-
resolveMIPSRelocation(Section, Offset, (uint32_t)(Value & 0xffffffffL),
816-
Type, (uint32_t)(Addend & 0xffffffffL));
1008+
case Triple::mips64:
1009+
case Triple::mips64el:
1010+
if (IsMipsO32ABI)
1011+
resolveMIPSRelocation(Section, Offset, (uint32_t)(Value & 0xffffffffL),
1012+
Type, (uint32_t)(Addend & 0xffffffffL));
1013+
else if (IsMipsN64ABI)
1014+
resolveMIPS64Relocation(Section, Offset, Value, Type, Addend, SymOffset,
1015+
SectionID);
1016+
else
1017+
llvm_unreachable("Mips ABI not handled");
8171018
break;
8181019
case Triple::ppc64: // Fall through.
8191020
case Triple::ppc64le:
@@ -999,7 +1200,7 @@ relocation_iterator RuntimeDyldELF::processRelocationRef(
9991200
}
10001201
processSimpleRelocation(SectionID, Offset, RelType, Value);
10011202
}
1002-
} else if ((Arch == Triple::mipsel || Arch == Triple::mips)) {
1203+
} else if (IsMipsO32ABI) {
10031204
uint32_t *Placeholder = reinterpret_cast<uint32_t*>(computePlaceholderAddress(SectionID, Offset));
10041205
if (RelType == ELF::R_MIPS_26) {
10051206
// This is an Mips branch relocation, need to use a stub function.
@@ -1054,6 +1255,23 @@ relocation_iterator RuntimeDyldELF::processRelocationRef(
10541255
Value.Addend += *Placeholder;
10551256
processSimpleRelocation(SectionID, Offset, RelType, Value);
10561257
}
1258+
} else if (IsMipsN64ABI) {
1259+
uint32_t r_type = RelType & 0xff;
1260+
RelocationEntry RE(SectionID, Offset, RelType, Value.Addend);
1261+
if (r_type == ELF::R_MIPS_CALL16 || r_type == ELF::R_MIPS_GOT_PAGE
1262+
|| r_type == ELF::R_MIPS_GOT_DISP) {
1263+
StringMap<uint64_t>::iterator i = GOTSymbolOffsets.find(TargetName);
1264+
if (i != GOTSymbolOffsets.end())
1265+
RE.SymOffset = i->second;
1266+
else {
1267+
RE.SymOffset = allocateGOTEntries(SectionID, 1);
1268+
GOTSymbolOffsets[TargetName] = RE.SymOffset;
1269+
}
1270+
}
1271+
if (Value.SymbolName)
1272+
addRelocationForSymbol(RE, Value.SymbolName);
1273+
else
1274+
addRelocationForSection(RE, Value.SectionID);
10571275
} else if (Arch == Triple::ppc64 || Arch == Triple::ppc64le) {
10581276
if (RelType == ELF::R_PPC64_REL24) {
10591277
// Determine ABI variant in use for this object.
@@ -1356,9 +1574,18 @@ size_t RuntimeDyldELF::getGOTEntrySize() {
13561574
case Triple::x86:
13571575
case Triple::arm:
13581576
case Triple::thumb:
1577+
Result = sizeof(uint32_t);
1578+
break;
13591579
case Triple::mips:
13601580
case Triple::mipsel:
1361-
Result = sizeof(uint32_t);
1581+
case Triple::mips64:
1582+
case Triple::mips64el:
1583+
if (IsMipsO32ABI)
1584+
Result = sizeof(uint32_t);
1585+
else if (IsMipsN64ABI)
1586+
Result = sizeof(uint64_t);
1587+
else
1588+
llvm_unreachable("Mips ABI not handled");
13621589
break;
13631590
default:
13641591
llvm_unreachable("Unsupported CPU type!");
@@ -1413,6 +1640,20 @@ void RuntimeDyldELF::finalizeLoad(const ObjectFile &Obj,
14131640
// For now, initialize all GOT entries to zero. We'll fill them in as
14141641
// needed when GOT-based relocations are applied.
14151642
memset(Addr, 0, TotalSize);
1643+
if (IsMipsN64ABI) {
1644+
// To correctly resolve Mips GOT relocations, we need a mapping from
1645+
// object's sections to GOTs.
1646+
for (section_iterator SI = Obj.section_begin(), SE = Obj.section_end();
1647+
SI != SE; ++SI) {
1648+
if (SI->relocation_begin() != SI->relocation_end()) {
1649+
section_iterator RelocatedSection = SI->getRelocatedSection();
1650+
ObjSectionToIDMap::iterator i = SectionMap.find(*RelocatedSection);
1651+
assert (i != SectionMap.end());
1652+
SectionToGOTMap[i->second] = GOTSectionID;
1653+
}
1654+
}
1655+
GOTSymbolOffsets.clear();
1656+
}
14161657
}
14171658

14181659
// Look for and record the EH frame section.

‎llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.h

Lines changed: 23 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@ class RuntimeDyldELF : public RuntimeDyldImpl {
2525

2626
void resolveRelocation(const SectionEntry &Section, uint64_t Offset,
2727
uint64_t Value, uint32_t Type, int64_t Addend,
28-
uint64_t SymOffset = 0);
28+
uint64_t SymOffset = 0, SID SectionID = 0);
2929

3030
void resolveX86_64Relocation(const SectionEntry &Section, uint64_t Offset,
3131
uint64_t Value, uint32_t Type, int64_t Addend,
@@ -49,12 +49,24 @@ class RuntimeDyldELF : public RuntimeDyldImpl {
4949
void resolveSystemZRelocation(const SectionEntry &Section, uint64_t Offset,
5050
uint64_t Value, uint32_t Type, int64_t Addend);
5151

52+
void resolveMIPS64Relocation(const SectionEntry &Section, uint64_t Offset,
53+
uint64_t Value, uint32_t Type, int64_t Addend,
54+
uint64_t SymOffset, SID SectionID);
55+
56+
int64_t evaluateMIPS64Relocation(const SectionEntry &Section,
57+
uint64_t Offset, uint64_t Value,
58+
uint32_t Type, int64_t Addend,
59+
uint64_t SymOffset, SID SectionID);
60+
61+
void applyMIPS64Relocation(uint8_t *TargetPtr, int64_t CalculatedValue,
62+
uint32_t Type);
63+
5264
unsigned getMaxStubSize() override {
5365
if (Arch == Triple::aarch64 || Arch == Triple::aarch64_be)
5466
return 20; // movz; movk; movk; movk; br
5567
if (Arch == Triple::arm || Arch == Triple::thumb)
5668
return 8; // 32-bit instruction and 32-bit address
57-
else if (Arch == Triple::mipsel || Arch == Triple::mips)
69+
else if (IsMipsO32ABI)
5870
return 16;
5971
else if (Arch == Triple::ppc64 || Arch == Triple::ppc64le)
6072
return 44;
@@ -73,6 +85,8 @@ class RuntimeDyldELF : public RuntimeDyldImpl {
7385
return 1;
7486
}
7587

88+
void setMipsABI(const ObjectFile &Obj) override;
89+
7690
void findPPC64TOCSection(const ObjectFile &Obj,
7791
ObjSectionToIDMap &LocalSections,
7892
RelocationValueRef &Rel);
@@ -114,6 +128,13 @@ class RuntimeDyldELF : public RuntimeDyldImpl {
114128
// that consume more than one slot)
115129
unsigned CurrentGOTIndex;
116130

131+
// A map from section to a GOT section that has entries for section's GOT
132+
// relocations. (Mips64 specific)
133+
DenseMap<SID, SID> SectionToGOTMap;
134+
135+
// A map to avoid duplicate got entries (Mips64 specific)
136+
StringMap<uint64_t> GOTSymbolOffsets;
137+
117138
// When a module is loaded we save the SectionID of the EH frame section
118139
// in a table until we receive a request to register all unregistered
119140
// EH frame sections with the memory manager.

‎llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -236,6 +236,8 @@ class RuntimeDyldImpl {
236236

237237
Triple::ArchType Arch;
238238
bool IsTargetLittleEndian;
239+
bool IsMipsO32ABI;
240+
bool IsMipsN64ABI;
239241

240242
// True if all sections should be passed to the memory manager, false if only
241243
// sections containing relocations should be. Defaults to 'false'.
@@ -303,6 +305,11 @@ class RuntimeDyldImpl {
303305
*(Addr + 7) = Value & 0xFF;
304306
}
305307

308+
virtual void setMipsABI(const ObjectFile &Obj) {
309+
IsMipsO32ABI = false;
310+
IsMipsN64ABI = false;
311+
}
312+
306313
/// Endian-aware read Read the least significant Size bytes from Src.
307314
uint64_t readBytesUnaligned(uint8_t *Src, unsigned Size) const;
308315

‎llvm/lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -23,9 +23,9 @@ extern "C" void LLVMInitializeMipsTargetInfo() {
2323
/*HasJIT=*/true> Y(TheMipselTarget, "mipsel", "Mipsel");
2424

2525
RegisterTarget<Triple::mips64,
26-
/*HasJIT=*/false> A(TheMips64Target, "mips64", "Mips64 [experimental]");
26+
/*HasJIT=*/true> A(TheMips64Target, "mips64", "Mips64 [experimental]");
2727

2828
RegisterTarget<Triple::mips64el,
29-
/*HasJIT=*/false> B(TheMips64elTarget,
29+
/*HasJIT=*/true> B(TheMips64elTarget,
3030
"mips64el", "Mips64el [experimental]");
3131
}

‎llvm/test/ExecutionEngine/MCJIT/cross-module-sm-pic-a.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -extra-module=%p/Inputs/cross-module-b.ll -relocation-model=pic -code-model=small %s > /dev/null
2-
; XFAIL: mips, i686, i386
2+
; XFAIL: mips-, mipsel-, i686, i386
33

44
declare i32 @FB()
55

‎llvm/test/ExecutionEngine/MCJIT/eh-lg-pic.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -relocation-model=pic -code-model=large %s
2-
; XFAIL: cygwin, win32, mingw, mips, i686, i386, aarch64, arm, asan, msan
2+
; XFAIL: cygwin, win32, mingw, mips-, mipsel-, i686, i386, aarch64, arm, asan, msan
33
declare i8* @__cxa_allocate_exception(i64)
44
declare void @__cxa_throw(i8*, i8*, i8*)
55
declare i32 @__gxx_personality_v0(...)

‎llvm/test/ExecutionEngine/MCJIT/eh-sm-pic.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -relocation-model=pic -code-model=small %s
2-
; XFAIL: cygwin, win32, mingw, mips, i686, i386, darwin, aarch64, arm, asan, msan
2+
; XFAIL: cygwin, win32, mingw, mips-, mipsel-, i686, i386, darwin, aarch64, arm, asan, msan
33
declare i8* @__cxa_allocate_exception(i64)
44
declare void @__cxa_throw(i8*, i8*, i8*)
55
declare i32 @__gxx_personality_v0(...)

‎llvm/test/ExecutionEngine/MCJIT/multi-module-sm-pic-a.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -extra-module=%p/Inputs/multi-module-b.ll -extra-module=%p/Inputs/multi-module-c.ll -relocation-model=pic -code-model=small %s > /dev/null
2-
; XFAIL: mips, i686, i386
2+
; XFAIL: mips-, mipsel-, i686, i386
33

44
declare i32 @FB()
55

‎llvm/test/ExecutionEngine/MCJIT/remote/cross-module-sm-pic-a.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -extra-module=%p/Inputs/cross-module-b.ll -disable-lazy-compilation=true -remote-mcjit -mcjit-remote-process=lli-child-target%exeext -relocation-model=pic -code-model=small %s > /dev/null
2-
; XFAIL: mips, i686, i386, arm
2+
; XFAIL: mips-, mipsel-, i686, i386, arm
33

44
declare i32 @FB()
55

‎llvm/test/ExecutionEngine/MCJIT/remote/multi-module-sm-pic-a.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -extra-module=%p/Inputs/multi-module-b.ll -extra-module=%p/Inputs/multi-module-c.ll -disable-lazy-compilation=true -remote-mcjit -mcjit-remote-process=lli-child-target%exeext -relocation-model=pic -code-model=small %s > /dev/null
2-
; XFAIL: mips, i686, i386, arm
2+
; XFAIL: mips-, mipsel-, i686, i386, arm
33

44
declare i32 @FB()
55

‎llvm/test/ExecutionEngine/MCJIT/remote/test-global-init-nonzero-sm-pic.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -remote-mcjit -relocation-model=pic -code-model=small %s > /dev/null
2-
; XFAIL: mips, aarch64, arm, i686, i386
2+
; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
33

44
@count = global i32 1, align 4
55

‎llvm/test/ExecutionEngine/MCJIT/remote/test-ptr-reloc-sm-pic.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -remote-mcjit -O0 -relocation-model=pic -code-model=small %s
2-
; XFAIL: mips, aarch64, arm, i686, i386
2+
; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
33

44
@.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
55
@ptr = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0), align 4

‎llvm/test/ExecutionEngine/MCJIT/stubs-sm-pic.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -disable-lazy-compilation=false -relocation-model=pic -code-model=small %s
2-
; XFAIL: mips, i686, i386, aarch64, arm
2+
; XFAIL: mips-, mipsel-, i686, i386, aarch64, arm
33

44
define i32 @main() nounwind {
55
entry:

‎llvm/test/ExecutionEngine/MCJIT/test-global-init-nonzero-sm-pic.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -relocation-model=pic -code-model=small %s > /dev/null
2-
; XFAIL: mips, aarch64, arm, i686, i386
2+
; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
33

44
@count = global i32 1, align 4
55

‎llvm/test/ExecutionEngine/MCJIT/test-ptr-reloc-sm-pic.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -O0 -relocation-model=pic -code-model=small %s
2-
; XFAIL: mips, aarch64, arm, i686, i386
2+
; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
33

44
@.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
55
@ptr = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0), align 4

‎llvm/test/ExecutionEngine/OrcMCJIT/cross-module-sm-pic-a.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -jit-kind=orc-mcjit -extra-module=%p/Inputs/cross-module-b.ll -relocation-model=pic -code-model=small %s > /dev/null
2-
; XFAIL: mips, i686, i386
2+
; XFAIL: mips-, mipsel-, i686, i386
33

44
declare i32 @FB()
55

‎llvm/test/ExecutionEngine/OrcMCJIT/eh-lg-pic.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -jit-kind=orc-mcjit -relocation-model=pic -code-model=large %s
2-
; XFAIL: cygwin, win32, mingw, mips, i686, i386, aarch64, arm, asan, msan
2+
; XFAIL: cygwin, win32, mingw, mips-, mipsel-, i686, i386, aarch64, arm, asan, msan
33
declare i8* @__cxa_allocate_exception(i64)
44
declare void @__cxa_throw(i8*, i8*, i8*)
55
declare i32 @__gxx_personality_v0(...)

‎llvm/test/ExecutionEngine/OrcMCJIT/eh-sm-pic.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -jit-kind=orc-mcjit -relocation-model=pic -code-model=small %s
2-
; XFAIL: cygwin, win32, mingw, mips, i686, i386, darwin, aarch64, arm, asan, msan
2+
; XFAIL: cygwin, win32, mingw, mips-, mipsel-, i686, i386, darwin, aarch64, arm, asan, msan
33
declare i8* @__cxa_allocate_exception(i64)
44
declare void @__cxa_throw(i8*, i8*, i8*)
55
declare i32 @__gxx_personality_v0(...)

‎llvm/test/ExecutionEngine/OrcMCJIT/multi-module-sm-pic-a.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -jit-kind=orc-mcjit -extra-module=%p/Inputs/multi-module-b.ll -extra-module=%p/Inputs/multi-module-c.ll -relocation-model=pic -code-model=small %s > /dev/null
2-
; XFAIL: mips, i686, i386
2+
; XFAIL: mips-, mipsel-, i686, i386
33

44
declare i32 @FB()
55

‎llvm/test/ExecutionEngine/OrcMCJIT/remote/cross-module-sm-pic-a.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -jit-kind=orc-mcjit -extra-module=%p/Inputs/cross-module-b.ll -disable-lazy-compilation=true -remote-mcjit -mcjit-remote-process=lli-child-target%exeext -relocation-model=pic -code-model=small %s > /dev/null
2-
; XFAIL: mips, i686, i386, arm
2+
; XFAIL: mips-, mipsel-, i686, i386, arm
33

44
declare i32 @FB()
55

‎llvm/test/ExecutionEngine/OrcMCJIT/remote/multi-module-sm-pic-a.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -jit-kind=orc-mcjit -extra-module=%p/Inputs/multi-module-b.ll -extra-module=%p/Inputs/multi-module-c.ll -disable-lazy-compilation=true -remote-mcjit -mcjit-remote-process=lli-child-target%exeext -relocation-model=pic -code-model=small %s > /dev/null
2-
; XFAIL: mips, i686, i386, arm
2+
; XFAIL: mips-, mipsel-, i686, i386, arm
33

44
declare i32 @FB()
55

‎llvm/test/ExecutionEngine/OrcMCJIT/remote/test-global-init-nonzero-sm-pic.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -jit-kind=orc-mcjit -remote-mcjit -relocation-model=pic -code-model=small %s > /dev/null
2-
; XFAIL: mips, aarch64, arm, i686, i386
2+
; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
33

44
@count = global i32 1, align 4
55

‎llvm/test/ExecutionEngine/OrcMCJIT/remote/test-ptr-reloc-sm-pic.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -jit-kind=orc-mcjit -remote-mcjit -O0 -relocation-model=pic -code-model=small %s
2-
; XFAIL: mips, aarch64, arm, i686, i386
2+
; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
33

44
@.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
55
@ptr = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0), align 4

‎llvm/test/ExecutionEngine/OrcMCJIT/stubs-sm-pic.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -jit-kind=orc-mcjit -disable-lazy-compilation=false -relocation-model=pic -code-model=small %s
2-
; XFAIL: mips, i686, i386, aarch64, arm
2+
; XFAIL: mips-, mipsel-, i686, i386, aarch64, arm
33

44
define i32 @main() nounwind {
55
entry:

‎llvm/test/ExecutionEngine/OrcMCJIT/test-global-init-nonzero-sm-pic.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -jit-kind=orc-mcjit -relocation-model=pic -code-model=small %s > /dev/null
2-
; XFAIL: mips, aarch64, arm, i686, i386
2+
; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
33

44
@count = global i32 1, align 4
55

‎llvm/test/ExecutionEngine/OrcMCJIT/test-ptr-reloc-sm-pic.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: %lli -jit-kind=orc-mcjit -O0 -relocation-model=pic -code-model=small %s
2-
; XFAIL: mips, aarch64, arm, i686, i386
2+
; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
33

44
@.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
55
@ptr = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0), align 4

‎llvm/test/ExecutionEngine/RuntimeDyld/Mips/ELF_Mips64r2N64_PIC_relocations.s

Lines changed: 155 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,155 @@
1+
# RUN: llvm-mc -triple=mips64el-unknown-linux -relocation-model=pic -code-model=small -filetype=obj -o %T/test_ELF_Mips64N64.o %s
2+
# RUN: llc -mtriple=mips64el-unknown-linux -relocation-model=pic -filetype=obj -o %T/test_ELF_ExternalFunction_Mips64N64.o %S/Inputs/ExternalFunction.ll
3+
# RUN: llvm-rtdyld -triple=mips64el-unknown-linux -verify -map-section test_ELF_Mips64N64.o,.text=0x1000 -map-section test_ELF_ExternalFunction_Mips64N64.o,.text=0x10000 -check=%s %/T/test_ELF_Mips64N64.o %T/test_ELF_ExternalFunction_Mips64N64.o
4+
5+
.text
6+
.abicalls
7+
.section .mdebug.abi64,"",@progbits
8+
.nan legacy
9+
.file "ELF_Mips64N64_PIC_relocations.ll"
10+
.text
11+
.globl bar
12+
.align 3
13+
.type bar,@function
14+
.set nomicromips
15+
.set nomips16
16+
.ent bar
17+
bar:
18+
.frame $fp,40,$ra
19+
.mask 0x00000000,0
20+
.fmask 0x00000000,0
21+
.set noreorder
22+
.set nomacro
23+
.set noat
24+
daddiu $sp, $sp, -40
25+
sd $ra, 32($sp)
26+
sd $fp, 24($sp)
27+
move $fp, $sp
28+
sd $4, 16($fp)
29+
lb $2, 0($4)
30+
sd $4, 8($fp)
31+
32+
# Test R_MIPS_26 relocation.
33+
# rtdyld-check: decode_operand(insn1, 0)[25:0] = foo
34+
insn1:
35+
jal foo
36+
nop
37+
38+
# Test R_MIPS_PC16 relocation.
39+
# rtdyld-check: decode_operand(insn2, 1)[15:0] = foo - insn2
40+
insn2:
41+
bal foo
42+
nop
43+
44+
move $sp, $fp
45+
ld $ra, 32($sp)
46+
ld $fp, 24($sp)
47+
daddiu $sp, $sp, 32
48+
jr $ra
49+
nop
50+
.set at
51+
.set macro
52+
.set reorder
53+
.end bar
54+
$func_end0:
55+
.size bar, ($func_end0)-bar
56+
57+
.globl main
58+
.align 3
59+
.type main,@function
60+
.set nomicromips
61+
.set nomips16
62+
.ent main
63+
main:
64+
.frame $fp,32,$ra
65+
.mask 0x00000000,0
66+
.fmask 0x00000000,0
67+
.set noreorder
68+
.set nomacro
69+
.set noat
70+
daddiu $sp, $sp, -32
71+
sd $ra, 24($sp)
72+
sd $fp, 16($sp)
73+
sd $gp, 8($sp)
74+
move $fp, $sp
75+
76+
# Check upper 16-bits of offset between the address of main function
77+
# and the global offset table.
78+
# rtdyld-check: decode_operand(insn3, 1)[15:0] = ((section_addr(test_ELF_Mips64N64.o, .got) + 0x7ff0) - main + 0x8000)[31:16]
79+
insn3:
80+
lui $1, %hi(%neg(%gp_rel(main)))
81+
daddu $1, $1, $25
82+
83+
# Check lower 16-bits of offset between the address of main function
84+
# and the global offset table.
85+
# rtdyld-check: decode_operand(insn4, 2)[15:0] = ((section_addr(test_ELF_Mips64N64.o, .got) + 0x7ff0) - main)[15:0]
86+
insn4:
87+
daddiu $1, $1, %lo(%neg(%gp_rel(main)))
88+
sw $zero, 4($fp)
89+
90+
# $gp register contains address of the .got section + 0x7FF0. 0x7FF0 is
91+
# the offset of $gp from the beginning of the .got section. Check that we are
92+
# loading address of the page pointer from correct offset. In this case
93+
# the page pointer is the first entry in the .got section, so offset will be
94+
# 0 - 0x7FF0.
95+
# rtdyld-check: decode_operand(insn5, 2)[15:0] = 0x8010
96+
#
97+
# Check that the global offset table contains the page pointer.
98+
# rtdyld-check: *{8}(section_addr(test_ELF_Mips64N64.o, .got)) = (_str + 0x8000) & 0xffffffffffff0000
99+
insn5:
100+
ld $25, %got_page(_str)($1)
101+
102+
# Check the offset of _str from the page pointer.
103+
# rtdyld-check: decode_operand(insn6, 2)[15:0] = _str[15:0]
104+
insn6:
105+
daddiu $25, $25, %got_ofst(_str)
106+
107+
# Check that we are loading address of var from correct offset. In this case
108+
# var is the second entry in the .got section, so offset will be 8 - 0x7FF0.
109+
# rtdyld-check: decode_operand(insn7, 2)[15:0] = 0x8018
110+
#
111+
# Check that the global offset table contains the address of the var.
112+
# rtdyld-check: *{8}(section_addr(test_ELF_Mips64N64.o, .got) + 8) = var
113+
insn7:
114+
ld $2, %got_disp(var)($1)
115+
sd $25, 0($2)
116+
117+
# Check that we are loading address of bar from correct offset. In this case
118+
# bar is the third entry in the .got section, so offset will be 16 - 0x7FF0.
119+
# rtdyld-check: decode_operand(insn8, 2)[15:0] = 0x8020
120+
#
121+
# Check that the global offset table contains the address of the bar.
122+
# rtdyld-check: *{8}(section_addr(test_ELF_Mips64N64.o, .got) + 16) = bar
123+
insn8:
124+
ld $2, %call16(bar)($1)
125+
126+
move $4, $25
127+
move $gp, $1
128+
move $25, $2
129+
jalr $25
130+
nop
131+
move $sp, $fp
132+
ld $gp, 8($sp)
133+
ld $fp, 16($sp)
134+
ld $ra, 24($sp)
135+
daddiu $sp, $sp, 32
136+
jr $ra
137+
nop
138+
.set at
139+
.set macro
140+
.set reorder
141+
.end main
142+
$func_end1:
143+
.size main, ($func_end1)-main
144+
145+
.type _str,@object
146+
.section .rodata.str1.1,"aMS",@progbits,1
147+
_str:
148+
.asciz "test"
149+
.size _str, 5
150+
151+
.type var,@object
152+
.comm var,8,8
153+
154+
.section ".note.GNU-stack","",@progbits
155+
.text

‎llvm/test/ExecutionEngine/RuntimeDyld/Mips/Inputs/ExternalFunction.ll

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,4 @@
1+
define void @foo() {
2+
entry:
3+
ret void
4+
}

‎llvm/test/ExecutionEngine/RuntimeDyld/Mips/lit.local.cfg

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,3 @@
1+
if not 'Mips' in config.root.targets:
2+
config.unsupported = True
3+

‎llvm/unittests/ExecutionEngine/MCJIT/MCJITCAPITest.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -127,6 +127,8 @@ class MCJITCAPITest : public testing::Test, public MCJITTestAPICommon {
127127
SupportedArchs.push_back(Triple::aarch64);
128128
SupportedArchs.push_back(Triple::arm);
129129
SupportedArchs.push_back(Triple::mips);
130+
SupportedArchs.push_back(Triple::mips64);
131+
SupportedArchs.push_back(Triple::mips64el);
130132
SupportedArchs.push_back(Triple::x86);
131133
SupportedArchs.push_back(Triple::x86_64);
132134

‎llvm/unittests/ExecutionEngine/MCJIT/MCJITTestBase.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -298,6 +298,8 @@ class MCJITTestBase : public MCJITTestAPICommon, public TrivialModuleBuilder {
298298
SupportedArchs.push_back(Triple::arm);
299299
SupportedArchs.push_back(Triple::mips);
300300
SupportedArchs.push_back(Triple::mipsel);
301+
SupportedArchs.push_back(Triple::mips64);
302+
SupportedArchs.push_back(Triple::mips64el);
301303
SupportedArchs.push_back(Triple::x86);
302304
SupportedArchs.push_back(Triple::x86_64);
303305

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