Page MenuHomePhabricator

Sparc: Prefer reg+reg address encoding when only one register used.
ClosedPublic

Authored by jyknight on Mar 31 2015, 3:14 PM.

Details

Summary

Reg+%g0 is preferred to Reg+imm0 by the manual, and is what GCC produces.

Futhermore, reg+imm is invalid for the (not yet supported) "alternate address space" instructions.

Diff Detail

Repository
rL LLVM

Event Timeline

jyknight updated this revision to Diff 23011.Mar 31 2015, 3:14 PM
jyknight retitled this revision from to Sparc: Prefer reg+reg address encoding when only one register used..
jyknight updated this object.
jyknight edited the test plan for this revision. (Show Details)
jyknight set the repository for this revision to rL LLVM.
jyknight added a subscriber: Unknown Object (MLST).
jyknight updated this revision to Diff 23417.Apr 8 2015, 7:40 AM
jyknight updated this object.

(No real changes; just rebased to not be on top of the LDD/STD patch)

venkatra accepted this revision.Apr 28 2015, 7:27 PM
venkatra edited edge metadata.

LGTM.

This revision is now accepted and ready to land.Apr 28 2015, 7:27 PM
This revision was automatically updated to reflect the committed changes.