[asan-assembly-instrumentation] Added instrumentation for REP MOVS.

[ygorshenin]

Summary

[asan-assembly-instrumentation] Added instrumentation for REP MOVS.

[eugenis]

lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp

54

InstrumentMOVS has a return value that you probably want to check here for early exit.

181

In memcpy() we check shadow for entire source and destination ranges. I guess it's not easy to do efficiently in asm, but at least leave a FIXME.

Also, this code does push eax/ecx/edx/flags four times - once for each InstrumentMemOperand. Factor prologue/epilogue generation out of InstrumentMemOperand?

lib/Target/X86/AsmParser/X86AsmParser.cpp

2287

This looks too complex, with some of the original instructions emitted directly in AsmParser, and some (REP) in instrumentation code. Could we always emit original instruction (as needed) in InstrumentInstruction?

test/Instrumentation/AddressSanitizer/X86/asm_rep_movs.ll

72

get rid of this metadata if it's not used in the test

[ygorshenin]

Fixes.

[ygorshenin]

PTAL

lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp

54

I'd prefer to get rid of return values for Instrument*() methods, as they're complicate the logic.

181

I've added FIXME comments for both issues. Would you mind if I'll resolve second issue in a next CL?

lib/Target/X86/AsmParser/X86AsmParser.cpp

2287

Done.

test/Instrumentation/AddressSanitizer/X86/asm_rep_movs.ll

72

Done.

[eugenis]

lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp

176

Don't really need a return here.

181

OK

614–621

Don't you need to emit the original instruction here?

[ygorshenin]

Fixes.

[ygorshenin]

PTAL

lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp

176

Done.

614–621

Yes, I need. Fixed + fixed test.

[eugenis]

LGTM

[eugenis]

r214395.

lib/Target/X86/AsmParser/X86AsmInstrumentation.h

 X86AsmInstrumentation *
 CreateX86AsmInstrumentation(const MCTargetOptions &MCOptions,
                             const MCContext &Ctx, const MCSubtargetInfo &STI);
 
 class X86AsmInstrumentation {
 public:
   virtual ~X86AsmInstrumentation();
 
-  // Instruments Inst. Should be called just before the original
-  // instruction is sent to Out.
-  virtual void InstrumentInstruction(
+  // Tries to instrument and emit instruction.
+  virtual void InstrumentAndEmitInstruction(
       const MCInst &Inst,
-      SmallVectorImpl<std::unique_ptr<MCParsedAsmOperand>> &Operands,
+      SmallVectorImpl<std::unique_ptr<MCParsedAsmOperand> > &Operands,
       MCContext &Ctx, const MCInstrInfo &MII, MCStreamer &Out);
 
 protected:
   friend X86AsmInstrumentation *
   CreateX86AsmInstrumentation(const MCTargetOptions &MCOptions,
                               const MCContext &Ctx, const MCSubtargetInfo &STI);
 
-  X86AsmInstrumentation();
+  X86AsmInstrumentation(const MCSubtargetInfo &STI);
+
+  void EmitInstruction(MCStreamer &Out, const MCInst &Inst);
+
+  const MCSubtargetInfo &STI;
 };
 
 } // End llvm namespace
 
 #endif // X86_ASM_INSTRUMENTATION_H

lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp

 
 std::string FuncName(unsigned AccessSize, bool IsWrite) {
   return std::string("__asan_report_") + (IsWrite ? "store" : "load") +
          utostr(AccessSize);
 }
 
 class X86AddressSanitizer : public X86AsmInstrumentation {
 public:
-  X86AddressSanitizer(const MCSubtargetInfo &STI) : STI(STI) {}
+  X86AddressSanitizer(const MCSubtargetInfo &STI)
+      : X86AsmInstrumentation(STI), RepPrefix(false) {}
   virtual ~X86AddressSanitizer() {}
 
   // X86AsmInstrumentation implementation:
-  virtual void InstrumentInstruction(
+  virtual void InstrumentAndEmitInstruction(
       const MCInst &Inst, OperandVector &Operands, MCContext &Ctx,
       const MCInstrInfo &MII, MCStreamer &Out) override {
+    InstrumentMOVS(Inst, Operands, Ctx, MII, Out);
+    if (RepPrefix)
+      EmitInstruction(Out, MCInstBuilder(X86::REP_PREFIX));
+
     InstrumentMOV(Inst, Operands, Ctx, MII, Out);
+
+    RepPrefix = (Inst.getOpcode() == X86::REP_PREFIX);
+    if (!RepPrefix)
+      EmitInstruction(Out, Inst);
   }
 
   // Should be implemented differently in x86_32 and x86_64 subclasses.
   virtual void InstrumentMemOperandSmallImpl(
       X86Operand &Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx,
       MCStreamer &Out) = 0;
   virtual void InstrumentMemOperandLargeImpl(
       X86Operand &Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx,
       MCStreamer &Out) = 0;
+  virtual void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
+                                  MCStreamer &Out) = 0;
 
   void InstrumentMemOperand(MCParsedAsmOperand &Op, unsigned AccessSize,
                             bool IsWrite, MCContext &Ctx, MCStreamer &Out);
+  void InstrumentMOVSBase(unsigned DstReg, unsigned SrcReg, unsigned CntReg,
+                          unsigned AccessSize, MCContext &Ctx, MCStreamer &Out);
+  void InstrumentMOVS(const MCInst &Inst, OperandVector &Operands,
+                      MCContext &Ctx, const MCInstrInfo &MII, MCStreamer &Out);
   void InstrumentMOV(const MCInst &Inst, OperandVector &Operands,
                      MCContext &Ctx, const MCInstrInfo &MII, MCStreamer &Out);
-  void EmitInstruction(MCStreamer &Out, const MCInst &Inst) {
-    Out.EmitInstruction(Inst, STI);
-  }
 
   void EmitLabel(MCStreamer &Out, MCSymbol *Label) { Out.EmitLabel(Label); }
 
 protected:
-  const MCSubtargetInfo &STI;
+  // True when previous instruction was actually REP prefix.
+  bool RepPrefix;
 };
 
 void X86AddressSanitizer::InstrumentMemOperand(
     MCParsedAsmOperand &Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx,
     MCStreamer &Out) {
   assert(Op.isMem() && "Op should be a memory operand.");
   assert((AccessSize & (AccessSize - 1)) == 0 && AccessSize <= 16 &&
          "AccessSize should be a power of two, less or equal than 16.");
 
   X86Operand &MemOp = static_cast<X86Operand &>(Op);
   // FIXME: get rid of this limitation.
   if (IsStackReg(MemOp.getMemBaseReg()) || IsStackReg(MemOp.getMemIndexReg()))
     return;
 
   // FIXME: take into account load/store alignment.
   if (AccessSize < 8)
     InstrumentMemOperandSmallImpl(MemOp, AccessSize, IsWrite, Ctx, Out);
   else
     InstrumentMemOperandLargeImpl(MemOp, AccessSize, IsWrite, Ctx, Out);
 }
 
+void X86AddressSanitizer::InstrumentMOVSBase(
+    unsigned DstReg, unsigned SrcReg, unsigned CntReg, unsigned AccessSize,
+    MCContext &Ctx, MCStreamer &Out) {
+  // FIXME: check whole ranges [DstReg .. DstReg + AccessSize * (CntReg - 1)]
+  // and [SrcReg .. SrcReg + AccessSize * (CntReg - 1)].
+
+  // FIXME: extract prolog and epilogue from InstrumentMemOperand()
+  // and optimize this sequence of InstrumentMemOperand() calls.
+
+  // Test (%SrcReg)
+  {
+    const MCExpr *Disp = MCConstantExpr::Create(0, Ctx);
+    std::unique_ptr<X86Operand> Op(X86Operand::CreateMem(
+        0, Disp, SrcReg, 0, AccessSize, SMLoc(), SMLoc()));
+    InstrumentMemOperand(*Op, AccessSize, false /* IsWrite */, Ctx, Out);
+  }
+
+  // Test -1(%SrcReg, %CntReg, AccessSize)
+  {
+    const MCExpr *Disp = MCConstantExpr::Create(-1, Ctx);
+    std::unique_ptr<X86Operand> Op(X86Operand::CreateMem(
+        0, Disp, SrcReg, CntReg, AccessSize, SMLoc(), SMLoc()));
+    InstrumentMemOperand(*Op, AccessSize, false /* IsWrite */, Ctx, Out);
+  }
+
+  // Test (%DstReg)
+  {
+    const MCExpr *Disp = MCConstantExpr::Create(0, Ctx);
+    std::unique_ptr<X86Operand> Op(X86Operand::CreateMem(
+        0, Disp, DstReg, 0, AccessSize, SMLoc(), SMLoc()));
+    InstrumentMemOperand(*Op, AccessSize, true /* IsWrite */, Ctx, Out);
+  }
+
+  // Test -1(%DstReg, %CntReg, AccessSize)
+  {
+    const MCExpr *Disp = MCConstantExpr::Create(-1, Ctx);
+    std::unique_ptr<X86Operand> Op(X86Operand::CreateMem(
+        0, Disp, DstReg, CntReg, AccessSize, SMLoc(), SMLoc()));
+    InstrumentMemOperand(*Op, AccessSize, true /* IsWrite */, Ctx, Out);
+  }
+}
+
+void X86AddressSanitizer::InstrumentMOVS(
+    const MCInst &Inst, OperandVector &Operands, MCContext &Ctx,
+    const MCInstrInfo &MII, MCStreamer &Out) {
+  // Access size in bytes.
+  unsigned AccessSize = 0;
+
+  switch (Inst.getOpcode()) {
+  case X86::MOVSB:
+    AccessSize = 1;
+    break;
+  case X86::MOVSW:
+    AccessSize = 2;
+    break;
+  case X86::MOVSL:
+    AccessSize = 4;
+    break;
+  case X86::MOVSQ:
+    AccessSize = 8;
+    break;
+  default:
+    return;
+  }
+
+  InstrumentMOVSImpl(AccessSize, Ctx, Out);
+}
+
 void X86AddressSanitizer::InstrumentMOV(
     const MCInst &Inst, OperandVector &Operands, MCContext &Ctx,
     const MCInstrInfo &MII, MCStreamer &Out) {
   // Access size in bytes.
   unsigned AccessSize = 0;
 
   switch (Inst.getOpcode()) {
   case X86::MOV8mi:
   case X86::MOV8mr:
   case X86::MOV8rm:
     AccessSize = 1;
     break;
public:
   virtual ~X86AddressSanitizer32() {}
 
   virtual void InstrumentMemOperandSmallImpl(
       X86Operand &Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx,
       MCStreamer &Out) override;
   virtual void InstrumentMemOperandLargeImpl(
       X86Operand &Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx,
       MCStreamer &Out) override;
+  virtual void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
+                                  MCStreamer &Out) override;
 
- private:
   void EmitCallAsanReport(MCContext &Ctx, MCStreamer &Out, unsigned AccessSize,
                           bool IsWrite, unsigned AddressReg) {
     EmitInstruction(Out, MCInstBuilder(X86::CLD));
     EmitInstruction(Out, MCInstBuilder(X86::MMX_EMMS));
 
     EmitInstruction(Out, MCInstBuilder(X86::AND64ri8).addReg(X86::ESP)
                              .addReg(X86::ESP).addImm(-16));
     EmitInstruction(Out, MCInstBuilder(X86::PUSH32r).addReg(AddressReg));
 
-
-    const std::string& Fn = FuncName(AccessSize, IsWrite);
+    const std::string &Fn = FuncName(AccessSize, IsWrite);
     MCSymbol *FnSym = Ctx.GetOrCreateSymbol(StringRef(Fn));
     const MCSymbolRefExpr *FnExpr =
         MCSymbolRefExpr::Create(FnSym, MCSymbolRefExpr::VK_PLT, Ctx);
     EmitInstruction(Out, MCInstBuilder(X86::CALLpcrel32).addExpr(FnExpr));
   }
 };
 
 void X86AddressSanitizer32::InstrumentMemOperandSmallImpl(
void X86AddressSanitizer32::InstrumentMemOperandLargeImpl(
   }
   EmitInstruction(
       Out, MCInstBuilder(X86::MOV32rr).addReg(X86::ECX).addReg(X86::EAX));
   EmitInstruction(Out, MCInstBuilder(X86::SHR32ri).addReg(X86::ECX)
                            .addReg(X86::ECX).addImm(3));
   {
     MCInst Inst;
     switch (AccessSize) {
-      case 8:
-        Inst.setOpcode(X86::CMP8mi);
-        break;
-      case 16:
-        Inst.setOpcode(X86::CMP16mi);
-        break;
-      default:
-        assert(false && "Incorrect access size");
-        break;
     }
     const MCExpr *Disp = MCConstantExpr::Create(kShadowOffset, Ctx);
     std::unique_ptr<X86Operand> Op(
         X86Operand::CreateMem(0, Disp, X86::ECX, 0, 1, SMLoc(), SMLoc()));
     Op->addMemOperands(Inst, 5);
     Inst.addOperand(MCOperand::CreateImm(0));
     EmitInstruction(Out, Inst);
   }
   MCSymbol *DoneSym = Ctx.CreateTempSymbol();
   const MCExpr *DoneExpr = MCSymbolRefExpr::Create(DoneSym, Ctx);
   EmitInstruction(Out, MCInstBuilder(X86::JE_4).addExpr(DoneExpr));
 
   EmitCallAsanReport(Ctx, Out, AccessSize, IsWrite, X86::EAX);
   EmitLabel(Out, DoneSym);
 
   EmitInstruction(Out, MCInstBuilder(X86::POPF32));
   EmitInstruction(Out, MCInstBuilder(X86::POP32r).addReg(X86::ECX));
   EmitInstruction(Out, MCInstBuilder(X86::POP32r).addReg(X86::EAX));
 }
 
+void X86AddressSanitizer32::InstrumentMOVSImpl(
+    unsigned AccessSize, MCContext &Ctx, MCStreamer &Out) {
+  EmitInstruction(Out, MCInstBuilder(X86::PUSHF32));
+
+  // No need to test when ECX is equals to zero.
+  MCSymbol *DoneSym = Ctx.CreateTempSymbol();
+  const MCExpr *DoneExpr = MCSymbolRefExpr::Create(DoneSym, Ctx);
+  EmitInstruction(
+      Out, MCInstBuilder(X86::TEST32rr).addReg(X86::ECX).addReg(X86::ECX));
+  EmitInstruction(Out, MCInstBuilder(X86::JE_4).addExpr(DoneExpr));
+
+  // Instrument first and last elements in src and dst range.
+  InstrumentMOVSBase(X86::EDI /* DstReg */, X86::ESI /* SrcReg */,
+                     X86::ECX /* CntReg */, AccessSize, Ctx, Out);
+
+  EmitLabel(Out, DoneSym);
+  EmitInstruction(Out, MCInstBuilder(X86::POPF32));
+}
+
 class X86AddressSanitizer64 : public X86AddressSanitizer {
 public:
   static const long kShadowOffset = 0x7fff8000;
 
   X86AddressSanitizer64(const MCSubtargetInfo &STI)
       : X86AddressSanitizer(STI) {}
   virtual ~X86AddressSanitizer64() {}
 
   virtual void InstrumentMemOperandSmallImpl(
       X86Operand &Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx,
       MCStreamer &Out) override;
   virtual void InstrumentMemOperandLargeImpl(
       X86Operand &Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx,
       MCStreamer &Out) override;
+  virtual void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
+                                  MCStreamer &Out) override;
 
 private:
   void EmitAdjustRSP(MCContext &Ctx, MCStreamer &Out, long Offset) {
     MCInst Inst;
     Inst.setOpcode(X86::LEA64r);
     Inst.addOperand(MCOperand::CreateReg(X86::RSP));
 
     const MCExpr *Disp = MCConstantExpr::Create(Offset, Ctx);
     std::unique_ptr<X86Operand> Op(
         X86Operand::CreateMem(0, Disp, X86::RSP, 0, 1, SMLoc(), SMLoc()));
     Op->addMemOperands(Inst, 5);
     EmitInstruction(Out, Inst);
   }
 
   void EmitCallAsanReport(MCContext &Ctx, MCStreamer &Out, unsigned AccessSize,
                           bool IsWrite) {
     EmitInstruction(Out, MCInstBuilder(X86::CLD));
     EmitInstruction(Out, MCInstBuilder(X86::MMX_EMMS));
 
     EmitInstruction(Out, MCInstBuilder(X86::AND64ri8).addReg(X86::RSP)
                              .addReg(X86::RSP).addImm(-16));
 
-    const std::string& Fn = FuncName(AccessSize, IsWrite);
+    const std::string &Fn = FuncName(AccessSize, IsWrite);
     MCSymbol *FnSym = Ctx.GetOrCreateSymbol(StringRef(Fn));
     const MCSymbolRefExpr *FnExpr =
         MCSymbolRefExpr::Create(FnSym, MCSymbolRefExpr::VK_PLT, Ctx);
     EmitInstruction(Out, MCInstBuilder(X86::CALL64pcrel32).addExpr(FnExpr));
   }
 };
 
 void X86AddressSanitizer64::InstrumentMemOperandSmallImpl(
void X86AddressSanitizer64::InstrumentMemOperandLargeImpl(
   EmitCallAsanReport(Ctx, Out, AccessSize, IsWrite);
   EmitLabel(Out, DoneSym);
 
   EmitInstruction(Out, MCInstBuilder(X86::POPF64));
   EmitInstruction(Out, MCInstBuilder(X86::POP64r).addReg(X86::RAX));
   EmitAdjustRSP(Ctx, Out, 128);
 }
 
+void X86AddressSanitizer64::InstrumentMOVSImpl(
+    unsigned AccessSize, MCContext &Ctx, MCStreamer &Out) {
+  EmitInstruction(Out, MCInstBuilder(X86::PUSHF64));
+
+  // No need to test when RCX is equals to zero.
+  MCSymbol *DoneSym = Ctx.CreateTempSymbol();
+  const MCExpr *DoneExpr = MCSymbolRefExpr::Create(DoneSym, Ctx);
+  EmitInstruction(
+      Out, MCInstBuilder(X86::TEST64rr).addReg(X86::RCX).addReg(X86::RCX));
+  EmitInstruction(Out, MCInstBuilder(X86::JE_4).addExpr(DoneExpr));
+
+  // Instrument first and last elements in src and dst range.
+  InstrumentMOVSBase(X86::RDI /* DstReg */, X86::RSI /* SrcReg */,
+                     X86::RCX /* CntReg */, AccessSize, Ctx, Out);
+
+  EmitLabel(Out, DoneSym);
+  EmitInstruction(Out, MCInstBuilder(X86::POPF64));
+}
+
 } // End anonymous namespace
 
-X86AsmInstrumentation::X86AsmInstrumentation() {}
+X86AsmInstrumentation::X86AsmInstrumentation(const MCSubtargetInfo &STI)
+    : STI(STI) {}
+
 X86AsmInstrumentation::~X86AsmInstrumentation() {}
 
-void X86AsmInstrumentation::InstrumentInstruction(
+void X86AsmInstrumentation::InstrumentAndEmitInstruction(
     const MCInst &Inst, OperandVector &Operands, MCContext &Ctx,
-    const MCInstrInfo &MII, MCStreamer &Out) {}
+    const MCInstrInfo &MII, MCStreamer &Out) {
+  EmitInstruction(Out, Inst);
+}
+
+void X86AsmInstrumentation::EmitInstruction(MCStreamer &Out,
+                                            const MCInst &Inst) {
+  Out.EmitInstruction(Inst, STI);
+}
 
 X86AsmInstrumentation *
 CreateX86AsmInstrumentation(const MCTargetOptions &MCOptions,
                             const MCContext &Ctx, const MCSubtargetInfo &STI) {
   Triple T(STI.getTargetTriple());
   const bool hasCompilerRTSupport = T.isOSLinux();
   if (ClAsanInstrumentAssembly && hasCompilerRTSupport &&
       MCOptions.SanitizeAddress) {
     if ((STI.getFeatureBits() & X86::Mode32Bit) != 0)
       return new X86AddressSanitizer32(STI);
     if ((STI.getFeatureBits() & X86::Mode64Bit) != 0)
       return new X86AddressSanitizer64(STI);
   }
-  return new X86AsmInstrumentation();
+  return new X86AsmInstrumentation(STI);
 }
 
 } // End llvm namespace

lib/Target/X86/AsmParser/X86AsmParser.cpp

bool X86AsmParser::processInstruction(MCInst &Inst, const OperandVector &Ops) {
   }
   }
 }
 
 static const char *getSubtargetFeatureName(unsigned Val);
 
 void X86AsmParser::EmitInstruction(MCInst &Inst, OperandVector &Operands,
                                    MCStreamer &Out) {
-  Instrumentation->InstrumentInstruction(Inst, Operands, getContext(), MII,
-                                         Out);
-  Out.EmitInstruction(Inst, STI);
+  Instrumentation->InstrumentAndEmitInstruction(Inst, Operands, getContext(),
+                                                MII, Out);
 }
 
 bool X86AsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
                                            OperandVector &Operands,
                                            MCStreamer &Out, unsigned &ErrorInfo,
                                            bool MatchingInlineAsm) {
   assert(!Operands.empty() && "Unexpect empty operand list!");
   X86Operand &Op = static_cast<X86Operand &>(*Operands[0]);

test/Instrumentation/AddressSanitizer/X86/asm_mov_no_instrumentation.s

 # RUN: llvm-mc %s -triple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+sse2 | FileCheck %s
 
   .text
   .globl  mov1b
   .align  16, 0x90
   .type mov1b,@function
 # CHECK-LABEL: mov1b
+# CHECK: movb (%rsi), %al
+# CHECK: movb %al, (%rdi)
 # CHECK-NOT: callq __asan_report_load1@PLT
 # CHECK-NOT: callq __asan_report_store1@PLT
 mov1b:                                  # @mov1b
   .cfi_startproc
 # BB#0:
   #APP
   movb  (%rsi), %al
   movb  %al, (%rdi)

test/Instrumentation/AddressSanitizer/X86/asm_rep_movs.ll

+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+sse2 -asm-instrumentation=address -asan-instrument-assembly | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+; CHECK-LABEL: rep_movs_1b
+; CHECK: pushfq
+; CHECK-NEXT: testq %rcx, %rcx
+; CHECK-NEXT: je [[B:.*]]
+
+; CHECK: leaq (%rsi), {{.*}}
+; CHECK: callq __asan_report_load1@PLT
+
+; CHECK: leaq -1(%rsi,%rcx), {{.*}}
+; CHECK: callq __asan_report_load1@PLT
+
+; CHECK: leaq (%rdi), {{.*}}
+; CHECK: callq __asan_report_store1@PLT
+
+; CHECK: leaq -1(%rdi,%rcx), {{.*}}
+; CHECK: callq __asan_report_store1@PLT
+
+; CHECK: [[B]]:
+; CHECK-NEXT: popfq
+
+; CHECK: rep
+; CHECK-NEXT: movsb (%rsi), %es:(%rdi)
+
+; Function Attrs: nounwind sanitize_address uwtable
+define void @rep_movs_1b(i8* %dst, i8* %src, i64 %n) #0 {
+entry:
+  tail call void asm sideeffect "rep movsb \0A\09", "{si},{di},{cx},~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %src, i8* %dst, i64 %n) #1
+  ret void
+}
+
+; CHECK-LABEL: rep_movs_8b
+; CHECK: pushfq
+; CHECK-NEXT: testq %rcx, %rcx
+; CHECK-NEXT: je [[Q:.*]]
+
+; CHECK: leaq (%rsi), {{.*}}
+; CHECK: callq __asan_report_load8@PLT
+
+; CHECK: leaq -1(%rsi,%rcx,8), {{.*}}
+; CHECK: callq __asan_report_load8@PLT
+
+; CHECK: leaq (%rdi), {{.*}}
+; CHECK: callq __asan_report_store8@PLT
+
+; CHECK: leaq -1(%rdi,%rcx,8), {{.*}}
+; CHECK: callq __asan_report_store8@PLT
+
+; CHECK: [[Q]]:
+; CHECK-NEXT: popfq
+
+; CHECK: rep
+; CHECK-NEXT: movsq (%rsi), %es:(%rdi)
+
+; Function Attrs: nounwind sanitize_address uwtable
+define void @rep_movs_8b(i64* %dst, i64* %src, i64 %n) #0 {
+entry:
+  tail call void asm sideeffect "rep movsq \0A\09", "{si},{di},{cx},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %src, i64* %dst, i64 %n) #1
+  ret void
+}
+
+attributes #0 = { nounwind sanitize_address uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #1 = { nounwind }