[GISel][x86] X86 part for D37640

[igorb]

Summary

X86 part for https://reviews.llvm.org/D37640

[aditya_nandakumar]

Hi Igor, thanks for this patch. I still see these three tests failing.
Failing Tests (3):

LLVM :: CodeGen/X86/GlobalISel/memop-scalar-x32.ll
LLVM :: CodeGen/X86/GlobalISel/memop-scalar.ll
LLVM :: CodeGen/X86/GlobalISel/trunc.ll

[igorb]

Hi Aditya,
I implemented missing functionality in https://reviews.llvm.org/rL312903
Could you please rebase.

Regards,
Igor

[aditya_nandakumar]

Thanks Igor. I see this failing - CodeGen/X86/GlobalISel/phi.ll with the latest rebase on TOT.
Could you take a look at that please?
Thanks

[igorb]

• rebase

[igorb]

Fixed CodeGen/X86/GlobalISel/phi.ll failing.

[aditya_nandakumar]

Thanks. That worked and I've merged in the changes.

[igorb]

merged.

lib/Target/X86/X86CallLowering.cpp

void assignValueToAddress(unsigned ValVReg, unsigned Addr, uint64_t Size,
                             MachinePointerInfo &MPO, CCValAssign &VA) override {
 
     auto MMO = MIRBuilder.getMF().getMachineMemOperand(
         MPO, MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant, Size,
         0);
     MIRBuilder.buildLoad(ValVReg, Addr, *MMO);
   }
 
+  void assignValueToReg(unsigned ValVReg, unsigned PhysReg,
+                        CCValAssign &VA) override {
+    markPhysRegUsed(PhysReg);
+    switch (VA.getLocInfo()) {
+    default:
+      MIRBuilder.buildCopy(ValVReg, PhysReg);
+      break;
+    case CCValAssign::LocInfo::SExt:
+    case CCValAssign::LocInfo::ZExt:
+    case CCValAssign::LocInfo::AExt: {
+      auto Copy = MIRBuilder.buildCopy(LLT{VA.getLocVT()}, PhysReg);
+      MIRBuilder.buildTrunc(ValVReg, Copy);
+      break;
+    }
+    }
+  }
+
+  /// How the physical register gets marked varies between formal
+  /// parameters (it's a basic-block live-in), and a call instruction
+  /// (it's an implicit-def of the BL).
+  virtual void markPhysRegUsed(unsigned PhysReg) = 0;
+
 protected:
   const DataLayout &DL;
 };
 
 struct FormalArgHandler : public IncomingValueHandler {
   FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI,
                    CCAssignFn *AssignFn)
       : IncomingValueHandler(MIRBuilder, MRI, AssignFn) {}
 
-  void assignValueToReg(unsigned ValVReg, unsigned PhysReg,
-                        CCValAssign &VA) override {
+  void markPhysRegUsed(unsigned PhysReg) override {
     MIRBuilder.getMBB().addLiveIn(PhysReg);
-    MIRBuilder.buildCopy(ValVReg, PhysReg);
   }
 };
 
 struct CallReturnHandler : public IncomingValueHandler {
   CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI,
                     CCAssignFn *AssignFn, MachineInstrBuilder &MIB)
       : IncomingValueHandler(MIRBuilder, MRI, AssignFn), MIB(MIB) {}
 
-  void assignValueToReg(unsigned ValVReg, unsigned PhysReg,
-                        CCValAssign &VA) override {
+  void markPhysRegUsed(unsigned PhysReg) override {
     MIB.addDef(PhysReg, RegState::Implicit);
-    MIRBuilder.buildCopy(ValVReg, PhysReg);
   }
 
 protected:
   MachineInstrBuilder &MIB;
 };
 
 } // namespace
 

test/CodeGen/X86/GlobalISel/add-scalar.ll

 ; X32-NEXT:    retl
   %ret = add i32 %arg1, %arg2
   ret i32 %ret
 }
 
 define i16 @test_add_i16(i16 %arg1, i16 %arg2) {
 ; X64-LABEL: test_add_i16:
 ; X64:       # BB#0:
-; X64-NEXT:    # kill: %DI<def> %DI<kill> %RDI<def>
-; X64-NEXT:    # kill: %SI<def> %SI<kill> %RSI<def>
+; X64-NEXT:    # kill: %EDI<def> %EDI<kill> %RDI<def>
+; X64-NEXT:    # kill: %ESI<def> %ESI<kill> %RSI<def>
 ; X64-NEXT:    leal (%rsi,%rdi), %eax
 ; X64-NEXT:    # kill: %AX<def> %AX<kill> %EAX<kill>
 ; X64-NEXT:    retq
 ;
 ; X32-LABEL: test_add_i16:
 ; X32:       # BB#0:
 ; X32-NEXT:    movzwl 8(%esp), %eax
 ; X32-NEXT:    addw 4(%esp), %ax

test/CodeGen/X86/GlobalISel/callingconv.ll

 
 declare void @take_char(i8)
 define void @test_abi_exts_call(i8* %addr) {
 ; X32-LABEL: test_abi_exts_call:
 ; X32:       # BB#0:
 ; X32-NEXT:    pushl %ebx
 ; X32-NEXT:  .Lcfi7:
 ; X32-NEXT:    .cfi_def_cfa_offset 8
-; X32-NEXT:    subl $8, %esp
+; X32-NEXT:    pushl %esi
 ; X32-NEXT:  .Lcfi8:
-; X32-NEXT:    .cfi_def_cfa_offset 16
+; X32-NEXT:    .cfi_def_cfa_offset 12
+; X32-NEXT:    pushl %eax
 ; X32-NEXT:  .Lcfi9:
+; X32-NEXT:    .cfi_def_cfa_offset 16
+; X32-NEXT:  .Lcfi10:
+; X32-NEXT:    .cfi_offset %esi, -12
+; X32-NEXT:  .Lcfi11:
 ; X32-NEXT:    .cfi_offset %ebx, -8
 ; X32-NEXT:    movl 16(%esp), %eax
 ; X32-NEXT:    movb (%eax), %bl
-; X32-NEXT:    movb %bl, (%esp)
+; X32-NEXT:    movzbl %bl, %esi
+; X32-NEXT:    movl %esi, (%esp)
 ; X32-NEXT:    calll take_char
 ; X32-NEXT:    movsbl %bl, %eax
 ; X32-NEXT:    movl %eax, (%esp)
 ; X32-NEXT:    calll take_char
-; X32-NEXT:    movzbl %bl, %eax
-; X32-NEXT:    movl %eax, (%esp)
+; X32-NEXT:    movl %esi, (%esp)
 ; X32-NEXT:    calll take_char
-; X32-NEXT:    addl $8, %esp
+; X32-NEXT:    addl $4, %esp
+; X32-NEXT:    popl %esi
 ; X32-NEXT:    popl %ebx
 ; X32-NEXT:    retl
 ;
 ; X64-LABEL: test_abi_exts_call:
 ; X64:       # BB#0:
 ; X64-NEXT:    pushq %rbx
 ; X64-NEXT:  .Lcfi6:
 ; X64-NEXT:    .cfi_def_cfa_offset 16
 ; X64-NEXT:  .Lcfi7:
 ; X64-NEXT:    .cfi_offset %rbx, -16
-; X64-NEXT:    movb (%rdi), %bl
+; X64-NEXT:    movb (%rdi), %al
+; X64-NEXT:    movzbl %al, %ebx
 ; X64-NEXT:    movl %ebx, %edi
 ; X64-NEXT:    callq take_char
-; X64-NEXT:    movsbl %bl, %ebx
-; X64-NEXT:    movl %ebx, %edi
+; X64-NEXT:    movsbl %bl, %edi
 ; X64-NEXT:    callq take_char
-; X64-NEXT:    movzbl %bl, %edi
+; X64-NEXT:    movl %ebx, %edi
 ; X64-NEXT:    callq take_char
 ; X64-NEXT:    popq %rbx
 ; X64-NEXT:    retq
   %val = load i8, i8* %addr
   call void @take_char(i8 %val)
   call void @take_char(i8 signext %val)
   call void @take_char(i8 zeroext %val)
  ret void
 }
 
 declare void @variadic_callee(i8*, ...)
 define void @test_variadic_call_1(i8** %addr_ptr, i32* %val_ptr) {
 ; X32-LABEL: test_variadic_call_1:
 ; X32:       # BB#0:
 ; X32-NEXT:    subl $12, %esp
-; X32-NEXT:  .Lcfi10:
+; X32-NEXT:  .Lcfi12:
 ; X32-NEXT:    .cfi_def_cfa_offset 16
 ; X32-NEXT:    movl 16(%esp), %eax
 ; X32-NEXT:    movl 20(%esp), %ecx
 ; X32-NEXT:    movl (%eax), %eax
 ; X32-NEXT:    movl (%ecx), %ecx
 ; X32-NEXT:    movl %eax, (%esp)
 ; X32-NEXT:    movl %ecx, 4(%esp)
 ; X32-NEXT:    calll variadic_callee
; X64-NEXT:    retq
   call void (i8*, ...) @variadic_callee(i8* %addr, i32 %val)
   ret void
 }
 
 define void @test_variadic_call_2(i8** %addr_ptr, double* %val_ptr) {
 ; X32-LABEL: test_variadic_call_2:
 ; X32:       # BB#0:
 ; X32-NEXT:    subl $12, %esp
-; X32-NEXT:  .Lcfi11:
+; X32-NEXT:  .Lcfi13:
 ; X32-NEXT:    .cfi_def_cfa_offset 16
 ; X32-NEXT:    movl 16(%esp), %eax
 ; X32-NEXT:    movl 20(%esp), %ecx
 ; X32-NEXT:    movl (%eax), %eax
 ; X32-NEXT:    movl (%ecx), %edx
 ; X32-NEXT:    movl 4(%ecx), %ecx
 ; X32-NEXT:    movl %eax, (%esp)
 ; X32-NEXT:    movl $4, %eax

test/CodeGen/X86/GlobalISel/ext-x86-64.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=x86_64-linux-gnu    -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
 
 ; TODO merge with ext.ll after i64 sext supported on 32bit platform
 
 define i64 @test_zext_i1(i8 %a) {
 ; X64-LABEL: test_zext_i1:
 ; X64:       # BB#0:
-; X64-NEXT:    # kill: %DIL<def> %DIL<kill> %RDI<def>
+; X64-NEXT:    # kill: %EDI<def> %EDI<kill> %RDI<def>
 ; X64-NEXT:    andq $1, %rdi
 ; X64-NEXT:    movq %rdi, %rax
 ; X64-NEXT:    retq
   %val = trunc i8 %a to i1
   %r = zext i1 %val to i64
   ret i64 %r
 }
 

test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll

 ; X64: fixedStack:
 ; X64:  id: [[STACK8:[0-9]+]], type: default, offset: 8, size: 1, alignment: 8,
 ; X64-NEXT: isImmutable: true,
 
 ; X64:  id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 1, alignment: 16,
 ; X64-NEXT: isImmutable: true,
 
 ; X64: liveins: %ecx, %edi, %edx, %esi, %r8d, %r9d
-; X64:      [[ARG1:%[0-9]+]](s8) = COPY %edi
-; X64-NEXT: %{{[0-9]+}}(s8) = COPY %esi
-; X64-NEXT: %{{[0-9]+}}(s8) = COPY %edx
-; X64-NEXT: %{{[0-9]+}}(s8) = COPY %ecx
-; X64-NEXT: %{{[0-9]+}}(s8) = COPY %r8d
-; X64-NEXT: %{{[0-9]+}}(s8) = COPY %r9d
+; X64:      [[ARG1_TMP:%[0-9]+]](s32) = COPY %edi
+; X64:      [[ARG1:%[0-9]+]](s8) = G_TRUNC [[ARG1_TMP]](s32)
+; X64-NEXT: %{{[0-9]+}}(s32) = COPY %esi
+; X64-NEXT: %{{[0-9]+}}(s8) = G_TRUNC %{{[0-9]+}}(s32)
+; X64-NEXT: %{{[0-9]+}}(s32) = COPY %edx
+; X64-NEXT: %{{[0-9]+}}(s8) = G_TRUNC %{{[0-9]+}}(s32)
+; X64-NEXT: %{{[0-9]+}}(s32) = COPY %ecx
+; X64-NEXT: %{{[0-9]+}}(s8) = G_TRUNC %{{[0-9]+}}(s32)
+; X64-NEXT: %{{[0-9]+}}(s32) = COPY %r8d
+; X64-NEXT: %{{[0-9]+}}(s8) = G_TRUNC %{{[0-9]+}}(s32)
+; X64-NEXT: %{{[0-9]+}}(s32) = COPY %r9d
+; X64-NEXT: %{{[0-9]+}}(s8) = G_TRUNC %{{[0-9]+}}(s32)
 ; X64-NEXT: [[ARG7_ADDR:%[0-9]+]](p0) = G_FRAME_INDEX %fixed-stack.[[STACK0]]
 ; X64-NEXT: [[ARG7:%[0-9]+]](s8) = G_LOAD [[ARG7_ADDR]](p0) :: (invariant load 1 from %fixed-stack.[[STACK0]], align 0)
 ; X64-NEXT: [[ARG8_ADDR:%[0-9]+]](p0) = G_FRAME_INDEX %fixed-stack.[[STACK8]]
 ; X64-NEXT: [[ARG8:%[0-9]+]](s8) = G_LOAD [[ARG8_ADDR]](p0) :: (invariant load 1 from %fixed-stack.[[STACK8]], align 0)
 
 ; X32: fixedStack:
 ; X32:  id: [[STACK28:[0-9]+]], type: default, offset: 28, size: 1, alignment: 4,
 ; X32-NEXT: isImmutable: true,

 ; X32-NEXT:       isImmutable: true, 
 ; X32:       %1(p0) = G_FRAME_INDEX %fixed-stack.0
 ; X32-NEXT:  %0(p0) = G_LOAD %1(p0) :: (invariant load 4 from %fixed-stack.0, align 0)
 ; X32-NEXT:  %2(s8) = G_LOAD %0(p0) :: (load 1 from %ir.addr)
 ; X32-NEXT:  ADJCALLSTACKDOWN32 4, 0, 0, implicit-def %esp, implicit-def %eflags, implicit %esp
 ; X32-NEXT:  %3(p0) = COPY %esp
 ; X32-NEXT:  %4(s32) = G_CONSTANT i32 0
 ; X32-NEXT:  %5(p0) = G_GEP %3, %4(s32)
-; X32-NEXT:  G_STORE %2(s8), %5(p0) :: (store 4 into stack, align 0)
+; X32-NEXT:  %6(s32) = G_ANYEXT %2(s8)
+; X32-NEXT:  G_STORE %6(s32), %5(p0) :: (store 4 into stack, align 0)
 ; X32-NEXT:  CALLpcrel32 @take_char, csr_32, implicit %esp
 ; X32-NEXT:  ADJCALLSTACKUP32 4, 0, implicit-def %esp, implicit-def %eflags, implicit %esp
 ; X32-NEXT:  ADJCALLSTACKDOWN32 4, 0, 0, implicit-def %esp, implicit-def %eflags, implicit %esp
-; X32-NEXT:  %6(p0) = COPY %esp
-; X32-NEXT:  %7(s32) = G_CONSTANT i32 0
-; X32-NEXT:  %8(p0) = G_GEP %6, %7(s32)
-; X32-NEXT:  %9(s32) = G_SEXT %2(s8)
-; X32-NEXT:  G_STORE %9(s32), %8(p0) :: (store 4 into stack, align 0)
+; X32-NEXT:  %7(p0) = COPY %esp
+; X32-NEXT:  %8(s32) = G_CONSTANT i32 0
+; X32-NEXT:  %9(p0) = G_GEP %7, %8(s32)
+; X32-NEXT:  %10(s32) = G_SEXT %2(s8)
+; X32-NEXT:  G_STORE %10(s32), %9(p0) :: (store 4 into stack, align 0)
 ; X32-NEXT:  CALLpcrel32 @take_char, csr_32, implicit %esp
 ; X32-NEXT:  ADJCALLSTACKUP32 4, 0, implicit-def %esp, implicit-def %eflags, implicit %esp
 ; X32-NEXT:  ADJCALLSTACKDOWN32 4, 0, 0, implicit-def %esp, implicit-def %eflags, implicit %esp
-; X32-NEXT:  %10(p0) = COPY %esp
-; X32-NEXT:  %11(s32) = G_CONSTANT i32 0
-; X32-NEXT:  %12(p0) = G_GEP %10, %11(s32)
-; X32-NEXT:  %13(s32) = G_ZEXT %2(s8)
-; X32-NEXT:  G_STORE %13(s32), %12(p0) :: (store 4 into stack, align 0)
+; X32-NEXT:  %11(p0) = COPY %esp
+; X32-NEXT:  %12(s32) = G_CONSTANT i32 0
+; X32-NEXT:  %13(p0) = G_GEP %11, %12(s32)
+; X32-NEXT:  %14(s32) = G_ZEXT %2(s8)
+; X32-NEXT:  G_STORE %14(s32), %13(p0) :: (store 4 into stack, align 0)
 ; X32-NEXT:  CALLpcrel32 @take_char, csr_32, implicit %esp
 ; X32-NEXT:  ADJCALLSTACKUP32 4, 0, implicit-def %esp, implicit-def %eflags, implicit %esp
 ; X32-NEXT:  RET 0
 
 ; X64:       %0(p0) = COPY %rdi
 ; X64-NEXT:  %1(s8) = G_LOAD %0(p0) :: (load 1 from %ir.addr)
 ; X64-NEXT:  ADJCALLSTACKDOWN64 0, 0, 0, implicit-def %rsp, implicit-def %eflags, implicit %rsp
-; X64-NEXT:  %edi = COPY %1(s8)
+; X64-NEXT:  %2(s32) = G_ANYEXT %1(s8)
+; X64-NEXT:  %edi = COPY %2(s32)
 ; X64-NEXT:  CALL64pcrel32 @take_char, csr_64, implicit %rsp, implicit %edi
 ; X64-NEXT:  ADJCALLSTACKUP64 0, 0, implicit-def %rsp, implicit-def %eflags, implicit %rsp
 ; X64-NEXT:  ADJCALLSTACKDOWN64 0, 0, 0, implicit-def %rsp, implicit-def %eflags, implicit %rsp
-; X64-NEXT:  %2(s32) = G_SEXT %1(s8)
-; X64-NEXT:  %edi = COPY %2(s32)
+; X64-NEXT:  %3(s32) = G_SEXT %1(s8)
+; X64-NEXT:  %edi = COPY %3(s32)
 ; X64-NEXT:  CALL64pcrel32 @take_char, csr_64, implicit %rsp, implicit %edi
 ; X64-NEXT:  ADJCALLSTACKUP64 0, 0, implicit-def %rsp, implicit-def %eflags, implicit %rsp
 ; X64-NEXT:  ADJCALLSTACKDOWN64 0, 0, 0, implicit-def %rsp, implicit-def %eflags, implicit %rsp
-; X64-NEXT:  %3(s32) = G_ZEXT %1(s8)
-; X64-NEXT:  %edi = COPY %3(s32)
+; X64-NEXT:  %4(s32) = G_ZEXT %1(s8)
+; X64-NEXT:  %edi = COPY %4(s32)
 ; X64-NEXT:  CALL64pcrel32 @take_char, csr_64, implicit %rsp, implicit %edi
 ; X64-NEXT:  ADJCALLSTACKUP64 0, 0, implicit-def %rsp, implicit-def %eflags, implicit %rsp
 ; X64-NEXT:  RET 0
 
   %val = load i8, i8* %addr
   call void @take_char(i8 %val)
   call void @take_char(i8 signext %val)
   call void @take_char(i8 zeroext %val)