[mips] Add support for .cpload.

[matheusalmeida]

Summary

Add support for .cpload.

EDIT: CC'ing Daniel.

[jacksprat]

Comments inline.

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

2564

If we are to use the magic to compare a string with "==" shouldn't this routine move to a switch/case?

lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp

343

I am concerned that this is all happening in TargetStream. Do we really want macros to be handled by this class object?

I would have thought that this would have been done in AsmParser and the final instructions would end up going through MC output.

Find out what the list thinks.

[matheusalmeida]

Comments inline.

I'm not going to commit this work straight away. I believe my understanding of how PIC works on Mips is right but there might be some corner case that I missed that is not clear on the ABI but it's implemented by GAS (like PIC/CPIC ehdr flags).

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

2564

I suppose I could move this code into a new function (e.g. parseCpload) mainly because the function parseDirective will get bigger and bigger but I don't see why having a switch/case would help here. Do you mean using a StringSwitch ?

lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp

343

The AsmParser shouldn't be handling macro expansions nor handling some directives like .cpload. It's perfectly valid for CodeGen to emit macros (e.g. la) or assembly directives like .cpload[1]. If we were to implement macro expansions and handling these directives in the AsmParser, we would need to replicate that functionality in the target streamer because that's the correct way for CodeGen to interact with the MC layer. We don't want that =)

The list agrees with this view. See http://comments.gmane.org/gmane.comp.compilers.llvm.devel/70692

[1] I know this is not the case for our current backend but I'm also aware that we used to do that. See http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20120507/142706.html

[matheusalmeida]

Superseded by D3480.

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

bool MipsAsmParser::parseDirectiveOption() {
   Warning(Parser.getTok().getLoc(), "unknown option in .option directive");
   Parser.eatToEndOfStatement();
   return false;
 }
 
 bool MipsAsmParser::ParseDirective(AsmToken DirectiveID) {
   StringRef IDVal = DirectiveID.getString();
 
+  if (IDVal == ".cpload") {
+    if (Parser.getTok().isNot(AsmToken::Dollar))
+      return reportParseError("unexpected token after .cpload");
+
+    Parser.Lex();
+
+    unsigned RegNo = tryParseRegister(isMips64());
+
+    if (RegNo == (unsigned)-1)
+      return reportParseError("invalid register number");
+
+    Parser.Lex();
+
+    getTargetStreamer().emitDirectiveCpload(RegNo);
+
+    return false;
+  }
+
   if (IDVal == ".ent") {
     // Ignore this directive for now.
     Parser.Lex();
     return false;
   }
 
   if (IDVal == ".end") {
     // Ignore this directive for now.

lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp

 
 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
                                       int FPUTopSavedRegOff) {
   OS << "\t.fmask\t";
   printHex32(FPUBitmask, OS);
   OS << "," << FPUTopSavedRegOff << '\n';
 }
 
+void MipsTargetAsmStreamer::emitDirectiveCpload(unsigned RegNo) {
+  OS << "\t.cpload\t$"
+     << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
+}
+
 // This part is for ELF object output.
 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
                                              const MCSubtargetInfo &STI)
     : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
   MCAssembler &MCA = getStreamer().getAssembler();
   uint64_t Features = STI.getFeatureBits();
   Triple T(STI.getTargetTriple());
   Pic = (MCA.getContext().getObjectFileInfo()->getRelocM() ==  Reloc::PIC_) ?

 
 void MipsTargetELFStreamer::emitDirectiveSetMips32R2() {
   // No action required for ELF output.
 }
 
 void MipsTargetELFStreamer::emitDirectiveSetDsp() {
   // No action required for ELF output.
 }
+
+void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) {
+  //.cpload $reg
+  // This directive expands to
+  // lui gp,_gp_disp
+  // addui gp,gp,_gp_disp
+  // addu gp,gp,reg
+  // when support for position independant code is enabled.
+  if (!Pic || !(STI.getFeatureBits() & Mips::FeatureO32))
+    return;
+
+  MCAssembler &MCA = getStreamer().getAssembler();
+  MCInst LUi, ADDiu;
+  StringRef GP_DispName("_gp_disp");
+  MCSymbol *GP_Disp = MCA.getContext().GetOrCreateSymbol(GP_DispName);
+  MCSymbolData &GP_DispData = MCA.getOrCreateSymbolData(*GP_Disp);
+  const MCSymbolRefExpr *HiSymExpr, *LoSymExpr;
+
+  (void)GP_DispData; //Silence unused variable.
+
+  LUi.setOpcode(Mips::LUi);
+  LUi.addOperand(MCOperand::CreateReg(Mips::GP));
+  HiSymExpr = MCSymbolRefExpr::Create("_gp_disp",
+                                      MCSymbolRefExpr::VK_Mips_ABS_HI,
+                                      getStreamer().getAssembler().getContext());
+  LUi.addOperand(MCOperand::CreateExpr(HiSymExpr));
+  getStreamer().EmitInstruction(LUi, STI);
+
+  ADDiu.setOpcode(Mips::ADDiu);
+  ADDiu.addOperand(MCOperand::CreateReg(Mips::GP));
+  ADDiu.addOperand(MCOperand::CreateReg(Mips::GP));
+  LoSymExpr = MCSymbolRefExpr::Create("_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO,
+                                      getStreamer().getAssembler().getContext());
+  ADDiu.addOperand(MCOperand::CreateExpr(LoSymExpr));
+  getStreamer().EmitInstruction(ADDiu, STI);
+
+  MCInst ADDu;
+  ADDu.setOpcode(Mips::ADDu);
+  ADDu.addOperand(MCOperand::CreateReg(Mips::GP));
+  ADDu.addOperand(MCOperand::CreateReg(Mips::GP));
+  ADDu.addOperand(MCOperand::CreateReg(RegNo));
+  getStreamer().EmitInstruction(ADDu, STI);
+}

lib/Target/Mips/MipsTargetStreamer.h

public:
   virtual void emitDirectiveOptionPic2() = 0;
   virtual void emitFrame(unsigned StackReg, unsigned StackSize,
                          unsigned ReturnReg) = 0;
   virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) = 0;
   virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) = 0;
 
   virtual void emitDirectiveSetMips32R2() = 0;
   virtual void emitDirectiveSetDsp() = 0;
+
+  //PIC support
+  virtual void emitDirectiveCpload(unsigned RegNo) = 0;
 };
 
 // This part is for ascii assembly output
 class MipsTargetAsmStreamer : public MipsTargetStreamer {
   formatted_raw_ostream &OS;
 
 public:
   MipsTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS);
public:
   virtual void emitDirectiveOptionPic2();
   virtual void emitFrame(unsigned StackReg, unsigned StackSize,
                          unsigned ReturnReg);
   virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff);
   virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff);
 
   virtual void emitDirectiveSetMips32R2();
   virtual void emitDirectiveSetDsp();
+
+  //PIC support
+  virtual void emitDirectiveCpload(unsigned RegNo);
 };
 
 // This part is for ELF object output
 class MipsTargetELFStreamer : public MipsTargetStreamer {
   bool MicroMipsEnabled;
   const MCSubtargetInfo &STI;
   bool Pic;
 
public:
   virtual void emitDirectiveOptionPic2();
   virtual void emitFrame(unsigned StackReg, unsigned StackSize,
                          unsigned ReturnReg);
   virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff);
   virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff);
 
   virtual void emitDirectiveSetMips32R2();
   virtual void emitDirectiveSetDsp();
+
+  //PIC support
+  virtual void emitDirectiveCpload(unsigned RegNo);
 };
 }
 #endif

test/MC/Mips/mips-pic-support.s

+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 | FileCheck %s -check-prefix=ASM
+#
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -filetype=obj -o -| \
+# RUN: llvm-objdump -d -r -arch=mips - | \
+# RUN: FileCheck %s -check-prefix=OBJ
+
+# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -filetype=obj -o -| \
+# RUN: llvm-objdump -d -r -arch=mips - | \
+# RUN: FileCheck %s -check-prefix=OBJ64
+
+# ASM:    .text
+# ASM:    .option pic2
+# ASM:    .set noreorder
+# ASM:    .cpload $25
+# ASM:    .set reorder
+
+# OBJ:    .text
+# OBJ:    lui $gp, 0
+# OBJ: R_MIPS_HI16 _gp_disp
+# OBJ:    addiu $gp, $gp, 0
+# OBJ: R_MIPS_LO16 _gp_disp
+# OBJ:    addu $gp, $gp, $25
+
+# OBJ64: .text
+# OBJ64-NOT: lui $gp, 0
+# OBJ64-NOT: addiu $gp, $gp, 0
+# OBJ64-NOT: addu $gp, $gp, $25
+
+        .text
+        .option pic2
+        .set noreorder
+        .cpload $25
+        .set reorder