Fix compile errors in AVR target

[jobnoorman]

Summary

This fixes some compile errors in the AVR target. The errors are related to a signature change of TargetInstrInfo::getInstSizeInBytes that wasn't updated for the AVR target.

[dylanmckay]

Looks good, thanks Job :)

llvm/trunk/lib/Target/AVR/AVRInstrInfo.h

 class AVRInstrInfo : public AVRGenInstrInfo {
 public:
   explicit AVRInstrInfo();
 
   const AVRRegisterInfo &getRegisterInfo() const { return RI; }
   const MCInstrDesc &getBrCond(AVRCC::CondCodes CC) const;
   AVRCC::CondCodes getCondFromBranchOpc(unsigned Opc) const;
   AVRCC::CondCodes getOppositeCondition(AVRCC::CondCodes CC) const;
-  unsigned getInstSizeInBytes(const MachineInstr *MI) const override;
+  unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
 
   void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
                    const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
                    bool KillSrc) const override;
   void storeRegToStackSlot(MachineBasicBlock &MBB,
                            MachineBasicBlock::iterator MI, unsigned SrcReg,
                            bool isKill, int FrameIndex,
                            const TargetRegisterClass *RC,

llvm/trunk/lib/Target/AVR/AVRInstrInfo.cpp

bool AVRInstrInfo::ReverseBranchCondition(
   assert(Cond.size() == 1 && "Invalid AVR branch condition!");
 
   AVRCC::CondCodes CC = static_cast<AVRCC::CondCodes>(Cond[0].getImm());
   Cond[0].setImm(getOppositeCondition(CC));
 
   return false;
 }
 
-unsigned AVRInstrInfo::getInstSizeInBytes(const MachineInstr *MI) const {
-  unsigned Opcode = MI->getOpcode();
+unsigned AVRInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
+  unsigned Opcode = MI.getOpcode();
 
   switch (Opcode) {
   // A regular instruction
   default: {
     const MCInstrDesc &Desc = get(Opcode);
     return Desc.getSize();
   }
   case TargetOpcode::EH_LABEL:
   case TargetOpcode::IMPLICIT_DEF:
   case TargetOpcode::KILL:
   case TargetOpcode::DBG_VALUE:
     return 0;
   case TargetOpcode::INLINEASM: {
-    const MachineFunction *MF = MI->getParent()->getParent();
+    const MachineFunction *MF = MI.getParent()->getParent();
     const AVRTargetMachine &TM = static_cast<const AVRTargetMachine&>(MF->getTarget());
     const TargetInstrInfo &TII = *TM.getSubtargetImpl()->getInstrInfo();
-    return TII.getInlineAsmLength(MI->getOperand(0).getSymbolName(),
+    return TII.getInlineAsmLength(MI.getOperand(0).getSymbolName(),
                                   *TM.getMCAsmInfo());
   }
   }
 }
 
 } // end of namespace llvm