[PPC64] Add v1i128 Vector Type

[kbarton]

Summary

Add support for quadword vector instructions added in POWER8.
In order to implement these instructions it is necessary to introduce the v1i128 vector type in LLVM. The PowerPC ABI specifies parameters of type v1i128 are to be passed in a single vector register, while parameters of type i128 are passed in pairs of GPRs. Thus it is necessary to be able to differentiate between v1i128 and i128 in LLVM.

There will be a subsequent patch following soon that uses the v1i128 type for the add and subtract quadword instructions introduced in POWER8.

[wschmidt]

Just a couple of nits. I haven't tried to add a new type, so I don't know where the pitfalls are -- will let others speak to that.

As Uli mentioned last week, you'll also have to deal with the same type issues in the front end in order to handle the ABI issues -- so more type hierarchies to deal with there...

lib/Target/PowerPC/PPCISelLowering.cpp

626 ↗

(On Diff #22513)

SUB?

test/CodeGen/PowerPC/vec_add_sub_quadword.ll

1 ↗

(On Diff #22513)

128?

[kbarton]

lib/Target/PowerPC/PPCISelLowering.cpp

626 ↗

(On Diff #22513)

This is a good point!
SUB is working because there is a general statement above that makes ADD/SUB legal for all vector types.
However, this reminds me that we are probably marking a lot of instructions legal for v1i128 that need to be marked as expand.

[kbarton]

New patch with some changes - including the addition of the get methods in Constants.h (which use the __uint128_t type).
I've also removed the PPC-specific changes from this patch, as we decided it makes more sense to submit them in a separate (follow-on) patch.

[seurer]

Very "nitty" style nit (for which I always get flagged): put periods at the end of comments.

[hfinkel]

include/llvm/CodeGen/MachineValueType.h

29

Don't add blank line.

include/llvm/IR/Constants.h

676 ↗

(On Diff #23420)

We have don't have a standard __uint128_t type, so you can't use it.

Also, you don't define these anywhere. Do you need them?

[kbarton]

include/llvm/IR/Constants.h

676 ↗

(On Diff #23420)

This is one of the changes that I had questions about.
I found this while I was looking through svn history of other patches that had added types to LLVM. I haven't tried to add any tests that contain 128bit constants, but I would expect these methods to be used in that scenario (that's purely speculation on my part).

I'm OK with not modifying this, since it is not needed right now to compile/run. I added it originally for completeness.

[kbarton]

Removed the get(LLVMContext &Context, ArrayRef<__uint128_t> Elts) constructors in Constants.h.

[hfinkel]

LGTM. But please break this into two pieces when you commit: the IR/Core pieces for i128 and the CodeGen bits for v1i128 with distinct commit messages explaining why each is needed.

[kbarton]

i128 patch: Committed revision 235196.
v1i128 patch: Committed revision 235198.

include/llvm/CodeGen/MachineValueType.h

 
 namespace llvm {
 
   class Type;
 
   /// MVT - Machine Value Type. Every type that is supported natively by some
   /// processor targeted by LLVM occurs here. This means that any legal value
   /// type can be represented by an MVT.
-  class MVT {
   public:
     enum SimpleValueType {
       // INVALID_SIMPLE_VALUE_TYPE - Simple value types less than zero are
       // considered extended value types.
       INVALID_SIMPLE_VALUE_TYPE = -1,
 
       // If you change this numbering, you must change the values in
       // ValueTypes.td as well!
enum SimpleValueType {
       v4i32          =  34,   //  4 x i32
       v8i32          =  35,   //  8 x i32
       v16i32         =  36,   // 16 x i32
       v1i64          =  37,   //  1 x i64
       v2i64          =  38,   //  2 x i64
       v4i64          =  39,   //  4 x i64
       v8i64          =  40,   //  8 x i64
       v16i64         =  41,   // 16 x i64
+      v1i128         =  42,   //  1 x i128
       
       FIRST_INTEGER_VECTOR_VALUETYPE = v2i1,
-      LAST_INTEGER_VECTOR_VALUETYPE = v16i64,
+      LAST_INTEGER_VECTOR_VALUETYPE = v1i128,
 
-      v2f16          =  42,   //  2 x f16
-      v4f16          =  43,   //  4 x f16
-      v8f16          =  44,   //  8 x f16
-      v1f32          =  45,   //  1 x f32
-      v2f32          =  46,   //  2 x f32
-      v4f32          =  47,   //  4 x f32
-      v8f32          =  48,   //  8 x f32
-      v16f32         =  49,   // 16 x f32
-      v1f64          =  50,   //  1 x f64
-      v2f64          =  51,   //  2 x f64
-      v4f64          =  52,   //  4 x f64
-      v8f64          =  53,   //  8 x f64
+      v2f16          =  43,   //  2 x f16
+      v4f16          =  44,   //  4 x f16
+      v8f16          =  45,   //  8 x f16
+      v1f32          =  46,   //  1 x f32
+      v2f32          =  47,   //  2 x f32
+      v4f32          =  48,   //  4 x f32
+      v8f32          =  49,   //  8 x f32
+      v16f32         =  50,   // 16 x f32
+      v1f64          =  51,   //  1 x f64
+      v2f64          =  52,   //  2 x f64
+      v4f64          =  53,   //  4 x f64
+      v8f64          =  54,   //  8 x f64
 
       FIRST_FP_VECTOR_VALUETYPE = v2f16,
       LAST_FP_VECTOR_VALUETYPE = v8f64,
 
       FIRST_VECTOR_VALUETYPE = v2i1,
       LAST_VECTOR_VALUETYPE  = v8f64,
 
-      x86mmx         =  54,   // This is an X86 MMX value
+      x86mmx         =  55,   // This is an X86 MMX value
 
-      Glue           =  55,   // This glues nodes together during pre-RA sched
+      Glue           =  56,   // This glues nodes together during pre-RA sched
 
-      isVoid         =  56,   // This has no value
+      isVoid         =  57,   // This has no value
 
-      Untyped        =  57,   // This value takes a register, but has
+      Untyped        =  58,   // This value takes a register, but has
                               // unspecified type.  The register class
                               // will be determined by the opcode.
 
       FIRST_VALUETYPE = 0,    // This is always the beginning of the list.
-      LAST_VALUETYPE =  58,   // This always remains at the end of the list.
+      LAST_VALUETYPE =  59,   // This always remains at the end of the list.
 
       // This is the current maximum for LAST_VALUETYPE.
       // MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors
       // This value must be a multiple of 32.
       MAX_ALLOWED_VALUETYPE = 64,
 
       // Metadata - This is MDNode or MDString.
       Metadata       = 250,
bool is64BitVector() const {
       return (SimpleTy == MVT::v8i8  || SimpleTy == MVT::v4i16 ||
               SimpleTy == MVT::v2i32 || SimpleTy == MVT::v1i64 ||
               SimpleTy == MVT::v4f16 || SimpleTy == MVT::v2f32 ||
               SimpleTy == MVT::v1f64);
     }
 
     /// is128BitVector - Return true if this is a 128-bit vector type.
     bool is128BitVector() const {
-      return (SimpleTy == MVT::v16i8 || SimpleTy == MVT::v8i16 ||
-              SimpleTy == MVT::v4i32 || SimpleTy == MVT::v2i64 ||
-              SimpleTy == MVT::v8f16 || SimpleTy == MVT::v4f32 ||
-              SimpleTy == MVT::v2f64);
+      return (SimpleTy == MVT::v16i8  || SimpleTy == MVT::v8i16 ||
+              SimpleTy == MVT::v4i32  || SimpleTy == MVT::v2i64 ||
+              SimpleTy == MVT::v1i128 || SimpleTy == MVT::v8f16 ||
+              SimpleTy == MVT::v4f32  || SimpleTy == MVT::v2f64);
     }
 
     /// is256BitVector - Return true if this is a 256-bit vector type.
     bool is256BitVector() const {
       return (SimpleTy == MVT::v8f32 || SimpleTy == MVT::v4f64  ||
               SimpleTy == MVT::v32i8 || SimpleTy == MVT::v16i16 ||
               SimpleTy == MVT::v8i32 || SimpleTy == MVT::v4i64);
     }
MVT getVectorElementType() const {
       case v4i32:
       case v8i32:
       case v16i32: return i32;
       case v1i64:
       case v2i64:
       case v4i64:
       case v8i64:
       case v16i64: return i64;
+      case v1i128: return i128;
       case v2f16:
       case v4f16:
       case v8f16: return f16;
       case v1f32:
       case v2f32:
       case v4f32:
       case v8f32:
       case v16f32: return f32;
unsigned getVectorNumElements() const {
       case v2i64:
       case v2f16:
       case v2f32:
       case v2f64: return 2;
       case v1i8:
       case v1i16:
       case v1i32:
       case v1i64:
+      case v1i128:
       case v1f32:
       case v1f64: return 1;
       }
     }
 
     unsigned getSizeInBits() const {
       switch (SimpleTy) {
       default:
unsigned getSizeInBits() const {
       case f80 :  return 80;
       case f128:
       case ppcf128:
       case i128:
       case v16i8:
       case v8i16:
       case v4i32:
       case v2i64:
+      case v1i128:
       case v8f16:
       case v4f32:
       case v2f64: return 128;
       case v32i8:
       case v16i16:
       case v8i32:
       case v4i64:
       case v8f32:
static MVT getVectorVT(MVT VT, unsigned NumElements) {
         break;
       case MVT::i64:
         if (NumElements == 1)  return MVT::v1i64;
         if (NumElements == 2)  return MVT::v2i64;
         if (NumElements == 4)  return MVT::v4i64;
         if (NumElements == 8)  return MVT::v8i64;
         if (NumElements == 16) return MVT::v16i64;
         break;
+      case MVT::i128:
+        if (NumElements == 1)  return MVT::v1i128;
+        break;
       case MVT::f16:
         if (NumElements == 2)  return MVT::v2f16;
         if (NumElements == 4)  return MVT::v4f16;
         if (NumElements == 8)  return MVT::v8f16;
         break;
       case MVT::f32:
         if (NumElements == 1)  return MVT::v1f32;
         if (NumElements == 2)  return MVT::v2f32;

include/llvm/CodeGen/ValueTypes.td

 def v4i32  : ValueType<128, 34>;   //  4 x i32 vector value
 def v8i32  : ValueType<256, 35>;   //  8 x i32 vector value
 def v16i32 : ValueType<512, 36>;   // 16 x i32 vector value
 def v1i64  : ValueType<64 , 37>;   //  1 x i64 vector value
 def v2i64  : ValueType<128, 38>;   //  2 x i64 vector value
 def v4i64  : ValueType<256, 39>;   //  4 x i64 vector value
 def v8i64  : ValueType<512, 40>;   //  8 x i64 vector value
 def v16i64 : ValueType<1024,41>;   // 16 x i64 vector value
+def v1i128 : ValueType<128, 42>;   //  1 x i128 vector value
 
-def v2f16  : ValueType<32 , 42>;   //  2 x f16 vector value
-def v4f16  : ValueType<64 , 43>;   //  4 x f16 vector value
-def v8f16  : ValueType<128, 44>;   //  8 x f16 vector value
-def v1f32  : ValueType<32 , 45>;   //  1 x f32 vector value
-def v2f32  : ValueType<64 , 46>;   //  2 x f32 vector value
-def v4f32  : ValueType<128, 47>;   //  4 x f32 vector value
-def v8f32  : ValueType<256, 48>;   //  8 x f32 vector value
-def v16f32 : ValueType<512, 49>;   // 16 x f32 vector value
-def v1f64  : ValueType<64, 50>;    //  1 x f64 vector value
-def v2f64  : ValueType<128, 51>;   //  2 x f64 vector value
-def v4f64  : ValueType<256, 52>;   //  4 x f64 vector value
-def v8f64  : ValueType<512, 53>;   //  8 x f64 vector value
-
-
-def x86mmx : ValueType<64 , 54>;   // X86 MMX value
-def FlagVT : ValueType<0  , 55>;   // Pre-RA sched glue
-def isVoid : ValueType<0  , 56>;   // Produces no value
-def untyped: ValueType<8  , 57>;   // Produces an untyped value
+def v2f16  : ValueType<32 , 43>;   //  2 x f16 vector value
+def v4f16  : ValueType<64 , 44>;   //  4 x f16 vector value
+def v8f16  : ValueType<128, 45>;   //  8 x f16 vector value
+def v1f32  : ValueType<32 , 46>;   //  1 x f32 vector value
+def v2f32  : ValueType<64 , 47>;   //  2 x f32 vector value
+def v4f32  : ValueType<128, 48>;   //  4 x f32 vector value
+def v8f32  : ValueType<256, 49>;   //  8 x f32 vector value
+def v16f32 : ValueType<512, 50>;   // 16 x f32 vector value
+def v1f64  : ValueType<64, 51>;    //  1 x f64 vector value
+def v2f64  : ValueType<128, 52>;   //  2 x f64 vector value
+def v4f64  : ValueType<256, 53>;   //  4 x f64 vector value
+def v8f64  : ValueType<512, 54>;   //  8 x f64 vector value
+
+
+def x86mmx : ValueType<64 , 55>;   // X86 MMX value
+def FlagVT : ValueType<0  , 56>;   // Pre-RA sched glue
+def isVoid : ValueType<0  , 57>;   // Produces no value
+def untyped: ValueType<8  , 58>;   // Produces an untyped value
 def MetadataVT: ValueType<0, 250>; // Metadata
 
 // Pseudo valuetype mapped to the current pointer size to any address space.
 // Should only be used in TableGen.
 def iPTRAny   : ValueType<0, 251>;
 
 // Pseudo valuetype to represent "vector of any size"
 def vAny   : ValueType<0  , 252>;

include/llvm/IR/IRBuilder.h

IntegerType *getInt32Ty() {
     return Type::getInt32Ty(Context);
   }
 
   /// \brief Fetch the type representing a 64-bit integer.
   IntegerType *getInt64Ty() {
     return Type::getInt64Ty(Context);
   }
 
+  /// \brief Fetch the type representing a 128-bit integer.
+  IntegerType *getInt128Ty() {
+    return Type::getInt128Ty(Context);
+  }
+  
   /// \brief Fetch the type representing an N-bit integer.
   IntegerType *getIntNTy(unsigned N) {
     return Type::getIntNTy(Context, N);
   }
 
   /// \brief Fetch the type representing a 16-bit floating point value.
   Type *getHalfTy() {
     return Type::getHalfTy(Context);

include/llvm/IR/Type.h

public:
   static Type *getPPC_FP128Ty(LLVMContext &C);
   static Type *getX86_MMXTy(LLVMContext &C);
   static IntegerType *getIntNTy(LLVMContext &C, unsigned N);
   static IntegerType *getInt1Ty(LLVMContext &C);
   static IntegerType *getInt8Ty(LLVMContext &C);
   static IntegerType *getInt16Ty(LLVMContext &C);
   static IntegerType *getInt32Ty(LLVMContext &C);
   static IntegerType *getInt64Ty(LLVMContext &C);
+  static IntegerType *getInt128Ty(LLVMContext &C);
   
   //===--------------------------------------------------------------------===//
   // Convenience methods for getting pointer types with one of the above builtin
   // types as pointee.
   //
   static PointerType *getHalfPtrTy(LLVMContext &C, unsigned AS = 0);
   static PointerType *getFloatPtrTy(LLVMContext &C, unsigned AS = 0);
   static PointerType *getDoublePtrTy(LLVMContext &C, unsigned AS = 0);
   static PointerType *getX86_FP80PtrTy(LLVMContext &C, unsigned AS = 0);

lib/IR/Core.cpp

LLVMTypeRef LLVMInt16TypeInContext(LLVMContextRef C) {
   return (LLVMTypeRef) Type::getInt16Ty(*unwrap(C));
 }
 LLVMTypeRef LLVMInt32TypeInContext(LLVMContextRef C) {
   return (LLVMTypeRef) Type::getInt32Ty(*unwrap(C));
 }
 LLVMTypeRef LLVMInt64TypeInContext(LLVMContextRef C) {
   return (LLVMTypeRef) Type::getInt64Ty(*unwrap(C));
 }
+LLVMTypeRef LLVMInt128TypeInContext(LLVMContextRef C) {
+  return (LLVMTypeRef) Type::getInt128Ty(*unwrap(C));
+}
 LLVMTypeRef LLVMIntTypeInContext(LLVMContextRef C, unsigned NumBits) {
   return wrap(IntegerType::get(*unwrap(C), NumBits));
 }
 
 LLVMTypeRef LLVMInt1Type(void)  {
   return LLVMInt1TypeInContext(LLVMGetGlobalContext());
 }
 LLVMTypeRef LLVMInt8Type(void)  {
   return LLVMInt8TypeInContext(LLVMGetGlobalContext());
 }
 LLVMTypeRef LLVMInt16Type(void) {
   return LLVMInt16TypeInContext(LLVMGetGlobalContext());
 }
 LLVMTypeRef LLVMInt32Type(void) {
   return LLVMInt32TypeInContext(LLVMGetGlobalContext());
 }
 LLVMTypeRef LLVMInt64Type(void) {
   return LLVMInt64TypeInContext(LLVMGetGlobalContext());
 }
+LLVMTypeRef LLVMInt128Type(void) {
+  return LLVMInt128TypeInContext(LLVMGetGlobalContext());
+}
 LLVMTypeRef LLVMIntType(unsigned NumBits) {
   return LLVMIntTypeInContext(LLVMGetGlobalContext(), NumBits);
 }
 
 unsigned LLVMGetIntTypeWidth(LLVMTypeRef IntegerTy) {
   return unwrap<IntegerType>(IntegerTy)->getBitWidth();
 }
 

lib/IR/LLVMContextImpl.h

#include "llvm/IR/Metadata.def"
   ConstantUniqueMap<InlineAsm> InlineAsms;
 
   ConstantInt *TheTrueVal;
   ConstantInt *TheFalseVal;
 
   // Basic type instances.
   Type VoidTy, LabelTy, HalfTy, FloatTy, DoubleTy, MetadataTy;
   Type X86_FP80Ty, FP128Ty, PPC_FP128Ty, X86_MMXTy;
-  IntegerType Int1Ty, Int8Ty, Int16Ty, Int32Ty, Int64Ty;
+  IntegerType Int1Ty, Int8Ty, Int16Ty, Int32Ty, Int64Ty, Int128Ty;
 
   
   /// TypeAllocator - All dynamically allocated types are allocated from this.
   /// They live forever until the context is torn down.
   BumpPtrAllocator TypeAllocator;
   
   DenseMap<unsigned, IntegerType*> IntegerTypes;
 

lib/IR/LLVMContextImpl.cpp

: TheTrueVal(nullptr), TheFalseVal(nullptr),
     X86_FP80Ty(C, Type::X86_FP80TyID),
     FP128Ty(C, Type::FP128TyID),
     PPC_FP128Ty(C, Type::PPC_FP128TyID),
     X86_MMXTy(C, Type::X86_MMXTyID),
     Int1Ty(C, 1),
     Int8Ty(C, 8),
     Int16Ty(C, 16),
     Int32Ty(C, 32),
-    Int64Ty(C, 64) {
+    Int64Ty(C, 64),
+    Int128Ty(C, 128) {
   InlineAsmDiagHandler = nullptr;
   InlineAsmDiagContext = nullptr;
   DiagnosticHandler = nullptr;
   DiagnosticContext = nullptr;
   RespectDiagnosticFilters = false;
   YieldCallback = nullptr;
   YieldOpaqueHandle = nullptr;
   NamedStructTypesUniqueID = 0;

lib/IR/Type.cpp

 Type *Type::getPPC_FP128Ty(LLVMContext &C) { return &C.pImpl->PPC_FP128Ty; }
 Type *Type::getX86_MMXTy(LLVMContext &C) { return &C.pImpl->X86_MMXTy; }
 
 IntegerType *Type::getInt1Ty(LLVMContext &C) { return &C.pImpl->Int1Ty; }
 IntegerType *Type::getInt8Ty(LLVMContext &C) { return &C.pImpl->Int8Ty; }
 IntegerType *Type::getInt16Ty(LLVMContext &C) { return &C.pImpl->Int16Ty; }
 IntegerType *Type::getInt32Ty(LLVMContext &C) { return &C.pImpl->Int32Ty; }
 IntegerType *Type::getInt64Ty(LLVMContext &C) { return &C.pImpl->Int64Ty; }
+IntegerType *Type::getInt128Ty(LLVMContext &C) { return &C.pImpl->Int128Ty; }
 
 IntegerType *Type::getIntNTy(LLVMContext &C, unsigned N) {
   return IntegerType::get(C, N);
 }
 
 PointerType *Type::getHalfPtrTy(LLVMContext &C, unsigned AS) {
   return getHalfTy(C)->getPointerTo(AS);
 }

lib/IR/ValueTypes.cpp

std::string EVT::getEVTString() const {
   case MVT::v4i32:   return "v4i32";
   case MVT::v8i32:   return "v8i32";
   case MVT::v16i32:  return "v16i32";
   case MVT::v1i64:   return "v1i64";
   case MVT::v2i64:   return "v2i64";
   case MVT::v4i64:   return "v4i64";
   case MVT::v8i64:   return "v8i64";
   case MVT::v16i64:  return "v16i64";
+  case MVT::v1i128:  return "v1i128";
   case MVT::v1f32:   return "v1f32";
   case MVT::v2f32:   return "v2f32";
   case MVT::v2f16:   return "v2f16";
   case MVT::v4f16:   return "v4f16";
   case MVT::v8f16:   return "v8f16";
   case MVT::v4f32:   return "v4f32";
   case MVT::v8f32:   return "v8f32";
   case MVT::v16f32:  return "v16f32";
Type *EVT::getTypeForEVT(LLVMContext &Context) const {
   case MVT::v4i32:   return VectorType::get(Type::getInt32Ty(Context), 4);
   case MVT::v8i32:   return VectorType::get(Type::getInt32Ty(Context), 8);
   case MVT::v16i32:  return VectorType::get(Type::getInt32Ty(Context), 16);
   case MVT::v1i64:   return VectorType::get(Type::getInt64Ty(Context), 1);
   case MVT::v2i64:   return VectorType::get(Type::getInt64Ty(Context), 2);
   case MVT::v4i64:   return VectorType::get(Type::getInt64Ty(Context), 4);
   case MVT::v8i64:   return VectorType::get(Type::getInt64Ty(Context), 8);
   case MVT::v16i64:  return VectorType::get(Type::getInt64Ty(Context), 16);
+  case MVT::v1i128:  return VectorType::get(Type::getInt128Ty(Context), 1);
   case MVT::v2f16:   return VectorType::get(Type::getHalfTy(Context), 2);
   case MVT::v4f16:   return VectorType::get(Type::getHalfTy(Context), 4);
   case MVT::v8f16:   return VectorType::get(Type::getHalfTy(Context), 8);
   case MVT::v1f32:   return VectorType::get(Type::getFloatTy(Context), 1);
   case MVT::v2f32:   return VectorType::get(Type::getFloatTy(Context), 2);
   case MVT::v4f32:   return VectorType::get(Type::getFloatTy(Context), 4);
   case MVT::v8f32:   return VectorType::get(Type::getFloatTy(Context), 8);
   case MVT::v16f32:   return VectorType::get(Type::getFloatTy(Context), 16);

test/TableGen/intrinsic-varargs.td

class Intrinsic<string name, list<LLVMType> param_types = []> {
   bit isTarget = 0;
   string TargetPrefix = "";
   list<LLVMType> RetTypes = [];
   list<LLVMType> ParamTypes = param_types;
   list<IntrinsicProperty> Properties = [];
 }
 
 // isVoid needs to match the definition in ValueTypes.td
-def isVoid : ValueType<0, 56>;   // Produces no value
+def isVoid : ValueType<0, 57>;   // Produces no value
 def llvm_vararg_ty : LLVMType<isVoid>;   // this means vararg here
 
 // CHECK: /* 0 */ 0, 28, 0,
 def int_foo : Intrinsic<"llvm.foo", [llvm_vararg_ty]>;

utils/TableGen/CodeGenTarget.cpp

std::string llvm::getEnumName(MVT::SimpleValueType T) {
   case MVT::v4i32:    return "MVT::v4i32";
   case MVT::v8i32:    return "MVT::v8i32";
   case MVT::v16i32:   return "MVT::v16i32";
   case MVT::v1i64:    return "MVT::v1i64";
   case MVT::v2i64:    return "MVT::v2i64";
   case MVT::v4i64:    return "MVT::v4i64";
   case MVT::v8i64:    return "MVT::v8i64";
   case MVT::v16i64:   return "MVT::v16i64";
+  case MVT::v1i128:   return "MVT::v1i128";
   case MVT::v2f16:    return "MVT::v2f16";
   case MVT::v4f16:    return "MVT::v4f16";
   case MVT::v8f16:    return "MVT::v8f16";
   case MVT::v1f32:    return "MVT::v1f32";
   case MVT::v2f32:    return "MVT::v2f32";
   case MVT::v4f32:    return "MVT::v4f32";
   case MVT::v8f32:    return "MVT::v8f32";
   case MVT::v16f32:   return "MVT::v16f32";