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Differential D7772

[PPC64] Fix problem with commutability of VORC instruction
ClosedPublic

Authored by kbarton on Feb 19 2015, 2:41 PM.

Details

Reviewers
wschmidt
seurer
hfinkel
nemanjai
Summary

I incorrectly marked the VORC instruction as isCommutable when I added it.
This fix removes the VORC instruction definition from the isCommutable block.

Diff Detail

Event Timeline

kbarton updated this revision to Diff 20343.Feb 19 2015, 2:41 PM
kbarton retitled this revision from to [PPC64] Fix problem with commutability of VORC instruction.
kbarton updated this object.
kbarton edited the test plan for this revision. (Show Details)
kbarton added reviewers: hfinkel, wschmidt, seurer, nemanjai.
kbarton added a subscriber: Unknown Object (MLST).
hfinkel accepted this revision.Feb 19 2015, 3:41 PM
hfinkel edited edge metadata.

LGTM.

This revision is now accepted and ready to land.Feb 19 2015, 3:41 PM
kbarton closed this revision.Feb 20 2015, 7:57 AM

Committed revision 230020.

Revision Contents

PathSize
lib/
Target/
PowerPC/
3 lines
test/
CodeGen/
PowerPC/
13 lines

Diff 20343

lib/Target/PowerPC/PPCInstrAltivec.td

Show First 20 Lines • Show All 980 Lines • ▼ Show 20 Lines
// more fine-grained control than option 1. This would be beneficial // more fine-grained control than option 1. This would be beneficial
// if we find situations where Altivec is really preferred over VSX. // if we find situations where Altivec is really preferred over VSX.
def VEQV : VXForm_1<1668, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), def VEQV : VXForm_1<1668, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),
"veqv $vD, $vA, $vB", IIC_VecGeneral, "veqv $vD, $vA, $vB", IIC_VecGeneral,
[(set v4i32:$vD, (vnot_ppc (xor v4i32:$vA, v4i32:$vB)))]>; [(set v4i32:$vD, (vnot_ppc (xor v4i32:$vA, v4i32:$vB)))]>;
def VNAND : VXForm_1<1412, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), def VNAND : VXForm_1<1412, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),
"vnand $vD, $vA, $vB", IIC_VecGeneral, "vnand $vD, $vA, $vB", IIC_VecGeneral,
[(set v4i32:$vD, (vnot_ppc (and v4i32:$vA, v4i32:$vB)))]>; [(set v4i32:$vD, (vnot_ppc (and v4i32:$vA, v4i32:$vB)))]>;
} // isCommutable
def VORC : VXForm_1<1348, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), def VORC : VXForm_1<1348, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),
"vorc $vD, $vA, $vB", IIC_VecGeneral, "vorc $vD, $vA, $vB", IIC_VecGeneral,
[(set v4i32:$vD, (or v4i32:$vA, [(set v4i32:$vD, (or v4i32:$vA,
(vnot_ppc v4i32:$vB)))]>; (vnot_ppc v4i32:$vB)))]>;
} // isCommutable
} // end HasP8Altivec } // end HasP8Altivec

test/CodeGen/PowerPC/vec_veqv_vnand_vorc.ll

Show All 11 Lines
; Test x vnand y ; Test x vnand y
define <4 x i32> @test_vnand(<4 x i32> %x, <4 x i32> %y) nounwind { define <4 x i32> @test_vnand(<4 x i32> %x, <4 x i32> %y) nounwind {
%tmp = and <4 x i32> %x, %y %tmp = and <4 x i32> %x, %y
%ret_val = xor <4 x i32> %tmp, <i32 -1, i32 -1, i32 -1, i32 -1> %ret_val = xor <4 x i32> %tmp, <i32 -1, i32 -1, i32 -1, i32 -1>
ret <4 x i32> %ret_val ret <4 x i32> %ret_val
; CHECK: vnand 2, 2, 3 ; CHECK: vnand 2, 2, 3
} }
; Test x vorc y ; Test x vorc y and variants
define <4 x i32> @test_vorc(<4 x i32> %x, <4 x i32> %y) nounwind { define <4 x i32> @test_vorc(<4 x i32> %x, <4 x i32> %y) nounwind {
%tmp = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1> %tmp1 = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
%ret_val = or <4 x i32> %x, %tmp %tmp2 = or <4 x i32> %x, %tmp1
ret <4 x i32> %ret_val ; CHECK: vorc 3, 2, 3
%tmp3 = xor <4 x i32> %tmp2, <i32 -1, i32 -1, i32 -1, i32 -1>
%tmp4 = or <4 x i32> %tmp3, %x
; CHECK: vorc 2, 2, 3 ; CHECK: vorc 2, 2, 3
ret <4 x i32> %tmp4
} }