undefined behavior warning fix.

[tra]

Summary

The issue is that ubsan spotted a case where we extract 21 bits from a negative signed addend value in order to encode it into binary representation of reloc.

While behavior is harmless in this case, technically it does fall under undefined behavior. The patch extracts relevant bits into an unsigned variable first and then uses that unsigned value to shift bits around.

[t.p.northover]

Hi Artem,

+ uint64_t AddressBits = Addend & 0x1FFFFF000;

Isn't this constant too big for an int? I'd expect 0x1FFFFF000LL.

Cheers.

Tim.

[tra]

http://reviews.llvm.org/rL225568 fixed the issue.

lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h

case MachO::ARM64_RELOC_PAGE21: {
       auto *p = reinterpret_cast<support::aligned_ulittle32_t *>(LocalAddress);
       assert((*p & 0x9F000000) == 0x90000000 && "Expected adrp instruction.");
 
       // Check that the addend fits into 21 bits (+ 12 lower bits).
       assert((Addend & 0xFFF) == 0 && "ADRP target is not page aligned.");
       assert(isInt<33>(Addend) && "Invalid page reloc value.");
 
       // Encode the addend into the instruction.
-      uint32_t ImmLoValue = (uint32_t)(Addend << 17) & 0x60000000;
-      uint32_t ImmHiValue = (uint32_t)(Addend >> 9) & 0x00FFFFE0;
+      uint64_t AddressBits = Addend & 0x1FFFFF000;
+      uint32_t ImmLoValue = (uint32_t)(AddressBits << 17) & 0x60000000;
+      uint32_t ImmHiValue = (uint32_t)(AddressBits >> 9) & 0x00FFFFE0;
       *p = (*p & 0x9F00001F) | ImmHiValue | ImmLoValue;
       break;
     }
     case MachO::ARM64_RELOC_GOT_LOAD_PAGEOFF12: {
       // Verify that the relocation points to one of the expected load / store
       // instructions.
       auto *p = reinterpret_cast<support::aligned_ulittle32_t *>(LocalAddress);
       assert((*p & 0x3B000000) == 0x39000000 &&