X86: Work around a bfd ld quirk wrt GOTTPOFF relocation processing

[majnemer]

Summary

bfd ld has a quirk which surfaces when transitioning a initial-exec
model relocation to a local-exec style code sequence.

However, it expects the R_X86_64_GOTTPOFF relocation to target a movq or
addq instruction and will fatally error if we have shrunk the load to a
movl or addl.

Work around this by prohibiting the truncation of such loads.

This fixes PR22083.

N.B. It could be argued that this isn't a bug in bfd ld because the
"ELF Handling for Thread-Local Storage" declares that GOTTPOFF be used
with addq and movq exclusively. However, bfd ld is happy to 'Do The
Right Thing' (TM) in X32 mode and gold has no qualms acting on a
movl/addl.

[echristo]

I'd completely forgotten about this.

LGTM.

-eric

llvm/trunk/lib/Target/X86/X86ISelLowering.h

public:
     /// in order to save space and / or reduce runtime.
     bool ShouldShrinkFPConstant(EVT VT) const override {
       // Don't shrink FP constpool if SSE2 is available since cvtss2sd is more
       // expensive than a straight movsd. On the other hand, it's important to
       // shrink long double fp constant since fldt is very slow.
       return !X86ScalarSSEf64 || VT == MVT::f80;
     }
 
+    /// Return true if we believe it is correct and profitable to reduce the
+    /// load node to a smaller type.
+    bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy,
+                               EVT NewVT) const override;
+
     const X86Subtarget* getSubtarget() const {
       return Subtarget;
     }
 
     /// Return true if the specified scalar FP type is computed in an SSE
     /// register, not on the X87 floating point stack.
     bool isScalarFPTypeInSSEReg(EVT VT) const {
       return (VT == MVT::f64 && X86ScalarSSEf64) || // f64 is when SSE2

llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

 bool X86TargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {
   for (unsigned i = 0, e = LegalFPImmediates.size(); i != e; ++i) {
     if (Imm.bitwiseIsEqual(LegalFPImmediates[i]))
       return true;
   }
   return false;
 }
 
+bool X86TargetLowering::shouldReduceLoadWidth(SDNode *Load,
+                                              ISD::LoadExtType ExtTy,
+                                              EVT NewVT) const {
+  // "ELF Handling for Thread-Local Storage" specifies that R_X86_64_GOTTPOFF
+  // relocation target a movq or addq instruction: don't let the load shrink.
+  SDValue BasePtr = cast<LoadSDNode>(Load)->getBasePtr();
+  if (BasePtr.getOpcode() == X86ISD::WrapperRIP)
+    if (const auto *GA = dyn_cast<GlobalAddressSDNode>(BasePtr.getOperand(0)))
+      return GA->getTargetFlags() != X86II::MO_GOTTPOFF;
+  return true;
+}
+
 /// \brief Returns true if it is beneficial to convert a load of a constant
 /// to just the constant itself.
 bool X86TargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm,
                                                           Type *Ty) const {
   assert(Ty->isIntegerTy());
 
   unsigned BitSize = Ty->getPrimitiveSizeInBits();
   if (BitSize == 0 || BitSize > 64)

llvm/trunk/test/CodeGen/X86/tls-models.ll

entry:
   ; X64_PIC-LABEL: f6:
   ; X64_PIC: internal_ie@GOTTPOFF
   ; X32_PIC-LABEL: f6:
   ; X32_PIC: internal_ie@GOTNTPOFF
   ; DARWIN-LABEL:  f6:
   ; DARWIN:  _internal_ie@TLVP
 }
 
+define i32 @PR22083() {
+entry:
+  ret i32 ptrtoint (i32* @external_ie to i32)
+  ; X64-LABEL:     PR22083:
+  ; X64:     movq    external_ie@GOTTPOFF(%rip), %rax
+  ; X64_PIC-LABEL: PR22083:
+  ; X64_PIC: movq    external_ie@GOTTPOFF(%rip), %rax
+}
 
 ; ----- localexec specified -----
 
 define i32* @f7() {
 entry:
   ret i32* @external_le
 
   ; Non-PIC and PIC code will use local exec as specified.