Power-specific fastisel test case updates for VSX

[seurer]

Summary

These 5 Power-specific test cases fail with VSX support turned on. Originally they failed because fastisel does not support VSX registers and when one was encountered some "unexpected register class" assertions were triggered. Now they fail because fastisel returns that it could not handle things (see http://reviews.llvm.org/D5362) and they specify the -fast-isel-abort option. All this patch does is to specify -mattr=-vsx as a new option. Eventually we will want to remove this when fastisel fully supports VSX.

[wschmidt]

typo: "-fast-isel-abourt" in all the tests. Otherwise this is fine from my standpoint.

[wschmidt]

These changes are harmless and will help keep the failure list down as we work on enabling VSX. As discussed in http://reviews.llvm.org/D5362, true VSX support for FastISel is planned, at which time VSX-specific tests (or variants of these tests) will be added. The patch LGTM -- I'll plan to commit on Bill Seurer's behalf tomorrow night if nobody objects.

[wschmidt]

I committed this as r220172 today. I took the liberty of reflowing the comments because they were wider than 80 columns -- very naughty! /fingerwag

/home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fast-isel-call.ll

-; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
+; FIXME: FastISel currently returns false if it hits code that uses VSX registers and
+;  with -fast-isel-abort turned on the test case will then fail.  When fastisel better
+;  supports VSX fix up this test case.
+;
+; RUN: llc < %s -O0 -verify-machineinstrs -mattr=-vsx -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
 
 define i32 @t1(i8 signext %a) nounwind {
   %1 = sext i8 %a to i32
   ret i32 %1
 }
 
 define i32 @t2(i8 zeroext %a) nounwind {
   %1 = zext i8 %a to i32

/home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fast-isel-cmp-imm.ll

-; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
-
+; FIXME: FastISel currently returns false if it hits code that uses VSX registers and
+;  with -fast-isel-abort turned on the test case will then fail.  When fastisel better
+;  supports VSX fix up this test case.
+;
+; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s --check-prefix=ELF64
 define void @t1a(float %a) uwtable ssp {
 entry:
 ; ELF64: t1a
   %cmp = fcmp oeq float %a, 0.000000e+00
 ; ELF64: addis
 ; ELF64: lfs
 ; ELF64: fcmpu
   br i1 %cmp, label %if.then, label %if.end

/home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fast-isel-conversion.ll

-; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
-; RUN: llc < %s -O0 -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=970 | FileCheck %s --check-prefix=PPC970
+; FIXME: FastISel currently returns false if it hits code that uses VSX registers and
+;  with -fast-isel-abort turned on the test case will then fail.  When fastisel better
+;  supports VSX fix up this test case.
+;
+; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s --check-prefix=ELF64
+; RUN: llc < %s -O0 -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=970 -mattr=-vsx | FileCheck %s --check-prefix=PPC970
 
 ;; Tests for 970 don't use -fast-isel-abort because we intentionally punt
 ;; to SelectionDAG in some cases.
 
 ; Test sitofp
 
 define void @sitofp_single_i64(i64 %a, float %b) nounwind ssp {
 entry:

/home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fast-isel-load-store.ll

-; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
+; FIXME: FastISel currently returns false if it hits code that uses VSX registers and
+;  with -fast-isel-abort turned on the test case will then fail.  When fastisel better
+;  supports VSX fix up this test case.
+;
+; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel -fast-isel-abort -mattr=-vsx -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
 
 ; This test verifies that load/store instructions are properly generated,
 ; and that they pass MI verification.
 
 @a = global i8 1, align 1
 @b = global i16 2, align 2
 @c = global i32 4, align 4
 @d = global i64 8, align 8

/home/seurer/llvm/llvm-oneoff/test/CodeGen/PowerPC/fast-isel-ret.ll

-; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
+; FIXME: FastISel currently returns false if it hits code that uses VSX registers and
+;  with -fast-isel-abort turned on the test case will then fail.  When fastisel better
+;  supports VSX fix up this test case.
+;
+; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s --check-prefix=ELF64
 
 define zeroext i1 @rettrue() nounwind uwtable ssp {
 entry:
 ; ELF64-LABEL: rettrue
 ; ELF64: li 3, 1
 ; ELF64: blr
   ret i1 true
 }