[mips][microMIPS] Implement JALRS16 instruction

[jkolek]

Summary

Implement 16-bit microMIPS jump instruction with short delay slot JALRS16.

[dsanders]

I'm not sure the encoding and mnemonics are correct. Can you double check?

lib/Target/Mips/MicroMipsInstrInfo.td

107–115 ↗

(On Diff #12843)

No changes required at the moment but something to consider for the long-run: Do we really need to define a 16-bit version of this class? Currently the answer is clearly "yes" (because we need a different base class) but we could turn this into "no" with the definition style used by DSP/MSA/R6. microMIPS has consistently used the older definition style so this will be something to deal with when we migrate the older code.

137 ↗

(On Diff #12843)

0x09 doesn't look right to me. I think it's 0x0f.

Also, shouldn't the "jalrs" be "jalrs16"?

[sstankovic]

LGTM, with a change in the comment for the class JumpLinkRegSMM16 (there is one unnecessary hyphen).

Closed by commit rL219493 (authored by zjovanovic).

llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp

 static const MCInstrDesc &getInstDesc(unsigned Opcode) {
   return MipsInsts[Opcode];
 }
 
 static bool hasShortDelaySlot(unsigned Opcode) {
   switch (Opcode) {
     case Mips::JALS_MM:
     case Mips::JALRS_MM:
+    case Mips::JALRS16_MM:
     case Mips::BGEZALS_MM:
     case Mips::BLTZALS_MM:
       return true;
     default:
       return false;
   }
 }
 

llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td

MicroMipsInst16<(outs), (ins uimm5_lsl2:$imm), "jraddiusp\t$imm",
                   [], IIBranch, FrmR> {
   let isTerminator = 1;
   let isBarrier = 1;
   let hasDelaySlot = 1;
   let isBranch = 1;
   let isIndirectBranch = 1;
 }
 
+// 16-bit Jump and Link (Call) - Short Delay Slot
+class JumpLinkRegSMM16<string opstr, RegisterOperand RO> :
+  MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
+           [], IIBranch, FrmR> {
+  let isCall = 1;
+  let hasDelaySlot = 1;
+  let Defs = [RA];
+}
+
 // MicroMIPS Jump and Link (Call) - Short Delay Slot
 let isCall = 1, hasDelaySlot = 1, Defs = [RA] in {
   class JumpLinkMM<string opstr, DAGOperand opnd> :
     InstSE<(outs), (ins opnd:$target), !strconcat(opstr, "\t$target"),
            [], IIBranch, FrmJ, opstr> {
     let DecoderMethod = "DecodeJumpTargetMM";
   }
 
   class JumpLinkRegMM<string opstr, RegisterOperand RO>:
     InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"),
             [], IIBranch, FrmR>;
 
   class BranchCompareToZeroLinkMM<string opstr, DAGOperand opnd,
                                   RegisterOperand RO> :
     InstSE<(outs), (ins RO:$rs, opnd:$offset),
            !strconcat(opstr, "\t$rs, $offset"), [], IIBranch, FrmI, opstr>;
 }
 
 def MFHI16_MM : MoveFromHILOMM<"mfhi", GPR32Opnd, AC0>, MFHILO_FM_MM16<0x10>;
 def MFLO16_MM : MoveFromHILOMM<"mflo", GPR32Opnd, AC0>, MFHILO_FM_MM16<0x12>;
 def MOVE16_MM : MoveMM16<"move", GPR32Opnd>, MOVE_FM_MM16<0x03>;
 def JALR16_MM : JumpLinkRegMM16<"jalr", GPR32Opnd>, JALR_FM_MM16<0x0e>;
+def JALRS16_MM : JumpLinkRegSMM16<"jalrs16", GPR32Opnd>, JALR_FM_MM16<0x0f>;
 def JRADDIUSP : JumpRAddiuStackMM16, JRADDIUSP_FM_MM16<0x18>;
 
 class WaitMM<string opstr> :
   InstSE<(outs), (ins uimm10:$code_), !strconcat(opstr, "\t$code_"), [],
          NoItinerary, FrmOther, opstr>;
 
 let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in {
   /// Compact Branch Instructions

llvm/trunk/test/MC/Mips/micromips-16-bit-instructions.s

 # Little endian
 #------------------------------------------------------------------------------
 # CHECK-EL: mfhi    $9              # encoding: [0x09,0x46]
 # CHECK-EL: mflo    $9              # encoding: [0x49,0x46]
 # CHECK-EL: move    $25, $1         # encoding: [0x21,0x0f]
 # CHECK-EL: jalr    $9              # encoding: [0xc9,0x45]
 # CHECK-EL: jraddiusp 20            # encoding: [0x05,0x47]
 # CHECK-EL: nop                     # encoding: [0x00,0x00,0x00,0x00]
+# CHECK-EL: jalrs16 $9              # encoding: [0xe9,0x45]
+# CHECK-EL: move    $zero, $zero    # encoding: [0x00,0x0c]
 #------------------------------------------------------------------------------
 # Big endian
 #------------------------------------------------------------------------------
 # CHECK-EB: mfhi    $9              # encoding: [0x46,0x09]
 # CHECK-EB: mflo    $9              # encoding: [0x46,0x49]
 # CHECK-EB: move    $25, $1         # encoding: [0x0f,0x21]
 # CHECK-EB: jalr    $9              # encoding: [0x45,0xc9]
 # CHECK-EB: jraddiusp 20            # encoding: [0x47,0x05]
 # CHECK-EB: nop                     # encoding: [0x00,0x00,0x00,0x00]
+# CHECK-EB: jalrs16 $9              # encoding: [0x45,0xe9]
+# CHECK-EB: move    $zero, $zero    # encoding: [0x0c,0x00]
 
     mfhi    $9
     mflo    $9
     move    $25, $1
     jalr    $9
     jraddiusp 20
+    jalrs16 $9