Fix for assertion when compiling for Thumb1, with a processor with a VFP unit

[olista01]

Summary

This is a fix for http://llvm.org/bugs/show_bug.cgi?id=19935, which is caused by the fastcc calling convention being converted to AAPCS-VFP when targeting the Thumb1 instruction set, which cannot access the floating-point registers.

[olista01]

Fixed typo in filename.

[t.p.northover]

Hi Oliver,

I've not checked, but does this require a corresponding Clang change? It decides whether to emit an explicit calling-convention marker based on its understanding of what LLVM will use by default. I *think* getLLVMDefaultCC is the relevant function.

Cheers.

Tim.

[rengolin]

Wouldn't it be simpler (and more explicit) to early return with:

if (Subtarget->isThumb1Only())
  return CallingConv::ARM_AAPCS;

?

[olista01]

Does this require a corresponding Clang change?

Clang already does not seem to take into account whether a VFP unit is present, so I don't think that this patch requires a clang change.

However, a bit of experimentation shows that it is possible to make things go very wrong by specifying a hard-float calling convention with an architecture which does not support it. The problems are not limited to clang making assumptions about llvm's default calling convention. There should probably be some logic in clang to make sure the user is not trying to do something architecturally impossible, but that is a bigger issue than this patch.

Wouldn't it be simpler (and more explicit) to early return?

There is still one case in which we return CallingConv::ARM_APCS rather than CallingConv::ARM_AAPCS, so I don't think this would simplify things.

[sgundapa]

The assertions in my validations are gone with this patch.
Can some one merge this to mainline if you are not planning to update this patch further ?

[olista01]

Thanks, committed revision 210889.

lib/Target/ARM/ARMISelLowering.cpp

ARMTargetLowering::getEffectiveCallingConv(CallingConv::ID CC,
   case CallingConv::ARM_APCS:
   case CallingConv::GHC:
     return CC;
   case CallingConv::ARM_AAPCS_VFP:
     return isVarArg ? CallingConv::ARM_AAPCS : CallingConv::ARM_AAPCS_VFP;
   case CallingConv::C:
     if (!Subtarget->isAAPCS_ABI())
       return CallingConv::ARM_APCS;
-    else if (Subtarget->hasVFP2() &&
+    else if (Subtarget->hasVFP2() && !Subtarget->isThumb1Only() &&
              getTargetMachine().Options.FloatABIType == FloatABI::Hard &&
              !isVarArg)
       return CallingConv::ARM_AAPCS_VFP;
     else
       return CallingConv::ARM_AAPCS;
   case CallingConv::Fast:
     if (!Subtarget->isAAPCS_ABI()) {
-      if (Subtarget->hasVFP2() && !isVarArg)
+      if (Subtarget->hasVFP2() && !Subtarget->isThumb1Only() && !isVarArg)
         return CallingConv::Fast;
       return CallingConv::ARM_APCS;
-    } else if (Subtarget->hasVFP2() && !isVarArg)
+    } else if (Subtarget->hasVFP2() && !Subtarget->isThumb1Only() && !isVarArg)
       return CallingConv::ARM_AAPCS_VFP;
     else
       return CallingConv::ARM_AAPCS;
   }
 }
 
 /// CCAssignFnForNode - Selects the correct CCAssignFn for the given
 /// CallingConvention.

test/CodeGen/Thumb/fastcc.ll

+; RUN: llc < %s -mcpu=arm926ej-s -mattr=+vfp2
+
+; This is a regression test, to ensure that fastcc functions are correctly
+; handled when compiling for a processor which has a floating-point unit which
+; is not accessible from the selected instruction set.
+
+target datalayout = "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:64-v128:64:128-a:0:32-n32-S64"
+target triple = "thumbv5e-none-linux-gnueabi"
+
+; Function Attrs: optsize
+define fastcc void @_foo(float %walpha) #0 {
+entry:
+  br label %for.body13
+
+for.body13:                                       ; preds = %for.body13, %entry
+  br i1 undef, label %for.end182.critedge, label %for.body13
+
+for.end182.critedge:                              ; preds = %for.body13
+  %conv183 = fpext float %walpha to double
+  %mul184 = fmul double %conv183, 8.200000e-01
+  %conv185 = fptrunc double %mul184 to float
+  %conv188 = fpext float %conv185 to double
+  %mul189 = fmul double %conv188, 6.000000e-01
+  %conv190 = fptrunc double %mul189 to float
+  br label %for.body193
+
+for.body193:                                      ; preds = %for.body193, %for.end182.critedge
+  %mul195 = fmul float %conv190, undef
+  br label %for.body193
+}
+
+attributes #0 = { optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+
+!llvm.ident = !{!0}
+
+!0 = metadata !{metadata !"clang version 3.5.0 "}