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[mips][mips64r6] Add R_MIPS_PC19_S2
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Authored by zoran.jovanovic on May 22 2014, 2:18 AM.

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Summary

Implemented R_MIPS_PC19_S2 relocation.

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rL LLVM

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zoran.jovanovic retitled this revision from to [mips][mips64r6] Add R_MIPS_PC19_S2.
zoran.jovanovic updated this object.
zoran.jovanovic edited the test plan for this revision. (Show Details)
zoran.jovanovic added reviewers: dsanders, vmedic.
zoran.jovanovic added a subscriber: jkolek.

Fixed one comment, one error message nad added check for relocation address and symbol value.

Fixed option in test case.

dsanders added inline comments.May 23 2014, 5:04 AM
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
1961–1981 ↗(On Diff #9746)

There should only be one kind of immediate (including symbols and relocations) in the parser. Adding more causes erratic behaviour that depends on the order instructions appear in the matcher table.

Instead of adding additional parsers you should use custom predicates and/or renderers to restrict and/or convert the immediates parsed by the generic parser.

lib/Target/Mips/MipsInstrInfo.td
321 ↗(On Diff #9746)

Delete this line. The generic parser should correctly parse constants and expressions.

lib/Target/Mips/AsmParser/MipsAsmParser.cpp
1961–1981 ↗(On Diff #9746)

Current implementation does not have method that parses immediate or symbol as instruction operand, thus it seems appropriate to implement one for pc relative instructions.
Very similar situation is with target operand of branch or jump instructions, where operand can be immediate, symbol or register, and additional parser is introduced there (MipsAsmParser::ParseJumpTarget). I did the same for operands of pc relative instructions.
I do agree that name of the method is not appropriate because both 18 and 19 bit pc relative operands will be parsed with it. I did change the name to ParsePCRelImm in following patch for R_MIPS_PC18_S3 relocation (http://reviews.llvm.org/D3890). I can do that in this patch or change name completely to avoid referencing 'pc relative'.

dsanders added inline comments.May 29 2014, 3:01 AM
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
1961–1981 ↗(On Diff #9746)

Current implementation does not have method that parses immediate or > symbol as instruction operand, thus it seems appropriate to implement > one for pc relative instructions.

Yes it does, it's ParseJumpTarget. 'ParseJumpTarget' is not meant to correspond to 'jumptarget' in the tablegen definitions (although admittedly this influenced the name since ParseImmOrAnyRegisterOrSymbol is rather long). It is meant to accept any input that could be used with the target of any branch-like/jump-like/call-like instruction.

Just to illustrate the problem with having multiple parsers that accept the same input tokens: One obvious bug in ParsePCRelImm is that it will parse $sp as a symbol named '$sp' rather than as a register. If this parser function is called first it will commit the assembly matcher to treating it as a symbol, even when trying to match another instruction that could accept a GPR (MipsOperand::isGPRAsmReg() will return false because the operand is a k_Immediate).

Even if you fixed that bug by adding the missing ParseAnyRegister call to ParsePCRelImm, having two identical functions will eventually lead to them diverging.

dsanders requested changes to this revision.Jun 2 2014, 2:39 AM
dsanders edited edge metadata.
This revision now requires changes to proceed.Jun 2 2014, 2:39 AM
zoran.jovanovic edited edge metadata.

New implementation which does not introduce new parser method.

dsanders accepted this revision.Jun 9 2014, 3:22 AM
dsanders edited edge metadata.

Thanks. LGTM

This revision is now accepted and ready to land.Jun 9 2014, 3:22 AM
zoran.jovanovic updated this revision to Diff 10353.

Closed by commit rL210773 (authored by zjovanovic).