This is an archive of the discontinued LLVM Phabricator instance.

AMDGPU: Enable trackLivenessAfterRegAlloc
ClosedPublic

Authored by arsenm on Jul 1 2016, 12:33 PM.

Reviewers

• tstellarAMD

Summary

This has caught a number of bugs.

arsenm retitled this revision from to AMDGPU: Enable trackLivenessAfterRegAlloc.

arsenm updated this object.

arsenm added a subscriber: llvm-commits.

LGTM.

This revision is now accepted and ready to land.Jul 8 2016, 5:47 PM

r275131

Path

Size

lib/

Target/

AMDGPU/

1 line

5 lines

Show First 20 Lines • Show All 51 Lines • ▼ Show 20 Lines	unsigned getRegPressureSetLimit(const MachineFunction &MF,
unsigned Idx) const override;		unsigned Idx) const override;


bool requiresRegisterScavenging(const MachineFunction &Fn) const override;		bool requiresRegisterScavenging(const MachineFunction &Fn) const override;


bool requiresFrameIndexScavenging(const MachineFunction &MF) const override;		bool requiresFrameIndexScavenging(const MachineFunction &MF) const override;
bool requiresVirtualBaseRegisters(const MachineFunction &Fn) const override;		bool requiresVirtualBaseRegisters(const MachineFunction &Fn) const override;
		bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;

int64_t getFrameIndexInstrOffset(const MachineInstr *MI,		int64_t getFrameIndexInstrOffset(const MachineInstr *MI,
int Idx) const override;		int Idx) const override;

bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override;		bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override;

void materializeFrameBaseRegister(MachineBasicBlock *MBB,		void materializeFrameBaseRegister(MachineBasicBlock *MBB,
unsigned BaseReg, int FrameIdx,		unsigned BaseReg, int FrameIdx,
▲ Show 20 Lines • Show All 137 Lines • Show Last 20 Lines

	Show First 20 Lines • Show All 239 Lines • ▼ Show 20 Lines
	}			}

	bool SIRegisterInfo::requiresVirtualBaseRegisters(			bool SIRegisterInfo::requiresVirtualBaseRegisters(
	const MachineFunction &) const {			const MachineFunction &) const {
	// There are no special dedicated stack or frame pointers.			// There are no special dedicated stack or frame pointers.
	return true;			return true;
	}			}

				bool SIRegisterInfo::trackLivenessAfterRegAlloc(const MachineFunction &MF) const {
				// Enable this so BranchFolder can be run before register allocation.
				return true;
				}

	int64_t SIRegisterInfo::getFrameIndexInstrOffset(const MachineInstr *MI,			int64_t SIRegisterInfo::getFrameIndexInstrOffset(const MachineInstr *MI,
	int Idx) const {			int Idx) const {
	if (!SIInstrInfo::isMUBUF(*MI))			if (!SIInstrInfo::isMUBUF(*MI))
	return 0;			return 0;

	assert(Idx == AMDGPU::getNamedOperandIdx(MI->getOpcode(),			assert(Idx == AMDGPU::getNamedOperandIdx(MI->getOpcode(),
	AMDGPU::OpName::vaddr) &&			AMDGPU::OpName::vaddr) &&
	"Should never see frame index on non-address operand");			"Should never see frame index on non-address operand");
	▲ Show 20 Lines • Show All 746 Lines • Show Last 20 Lines