AMDGPU: Remove disable-irstructurizer subtarget feature

[arsenm]

Summary

The only real reason to use it is for testing, so replace
it with a command line option instead of a potentially function
dependent feature.

[• tstellarAMD]

LGTM.

[arsenm]

r273653

lib/Target/AMDGPU/AMDGPU.td

 >;
 
 def FeatureDumpCodeLower : SubtargetFeature <"dumpcode",
   "DumpCode",
   "true",
   "Dump MachineInstrs in the CodeEmitter"
 >;
 
-def FeatureIRStructurizer : SubtargetFeature <"disable-irstructurizer",
-  "EnableIRStructurizer",
-  "false",
-  "Disable IR Structurizer"
->;
-
 def FeaturePromoteAlloca : SubtargetFeature <"promote-alloca",
   "EnablePromoteAlloca",
   "true",
   "Enable promote alloca pass"
 >;
 
 // XXX - This should probably be removed once enabled by default
 def FeatureEnableLoadStoreOpt : SubtargetFeature <"load-store-opt",

lib/Target/AMDGPU/AMDGPUSubtarget.h

protected:
   bool FPExceptions;
   bool FlatForGlobal;
   bool EnableXNACK;
   bool DebuggerInsertNops;
   bool DebuggerReserveRegs;
 
   // Used as options.
   bool EnableVGPRSpilling;
-  bool EnableIRStructurizer;
   bool EnablePromoteAlloca;
   bool EnableIfCvt;
   bool EnableLoadStoreOpt;
   bool EnableUnsafeDSOffsetFolding;
   bool EnableSIScheduler;
   bool DumpCode;
 
   // Subtarget statically properties set by tablegen
public:
   bool hasBORROW() const {
     return (getGeneration() >= EVERGREEN);
   }
 
   bool hasCaymanISA() const {
     return CaymanISA;
   }
 
-  bool IsIRStructurizerEnabled() const {
-    return EnableIRStructurizer;
-  }
-
   bool isPromoteAllocaEnabled() const {
     return EnablePromoteAlloca;
   }
 
   bool isIfCvtEnabled() const {
     return EnableIfCvt;
   }
 

lib/Target/AMDGPU/AMDGPUSubtarget.cpp

: AMDGPUGenSubtargetInfo(TT, GPU, FS),
     FP64Denormals(false),
     FPExceptions(false),
     FlatForGlobal(false),
     EnableXNACK(false),
     DebuggerInsertNops(false),
     DebuggerReserveRegs(false),
 
     EnableVGPRSpilling(false),
-    EnableIRStructurizer(true),
     EnablePromoteAlloca(false),
     EnableIfCvt(true),
     EnableLoadStoreOpt(false),
     EnableUnsafeDSOffsetFolding(false),
     EnableSIScheduler(false),
     DumpCode(false),
 
     FP64(false),

lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

 #include "llvm/Support/TargetRegistry.h"
 #include "llvm/Support/raw_os_ostream.h"
 #include "llvm/Transforms/IPO.h"
 #include "llvm/Transforms/Scalar.h"
 #include "llvm/Transforms/Scalar/GVN.h"
 
 using namespace llvm;
 
+static cl::opt<bool> EnableR600StructurizeCFG(
+  "r600-ir-structurize",
+  cl::desc("Use StructurizeCFG IR pass"),
+  cl::init(true));
+
 extern "C" void LLVMInitializeAMDGPUTarget() {
   // Register the target
   RegisterTargetMachine<R600TargetMachine> X(TheAMDGPUTarget);
   RegisterTargetMachine<GCNTargetMachine> Y(TheGCNTarget);
 
   PassRegistry *PR = PassRegistry::getPassRegistry();
   initializeSILowerI1CopiesPass(*PR);
   initializeSIFixSGPRCopiesPass(*PR);

 }
 
 //===----------------------------------------------------------------------===//
 // R600 Pass Setup
 //===----------------------------------------------------------------------===//
 
 bool R600PassConfig::addPreISel() {
   AMDGPUPassConfig::addPreISel();
-  const AMDGPUSubtarget &ST = *getAMDGPUTargetMachine().getSubtargetImpl();
-  if (ST.IsIRStructurizerEnabled())
+
+  if (EnableR600StructurizeCFG)
     addPass(createStructurizeCFGPass());
   addPass(createR600TextureIntrinsicsReplacer());
   return false;
 }
 
 void R600PassConfig::addPreRegAlloc() {
   addPass(createR600VectorRegMerger(*TM));
 }

test/CodeGen/AMDGPU/predicates.ll

-; RUN: llc -spec-exec-max-speculation-cost=0 -march=r600 -mattr=disable-irstructurizer -mcpu=redwood < %s | FileCheck %s
+; RUN: llc -spec-exec-max-speculation-cost=0 -march=r600 -r600-ir-structurize=0 -mcpu=redwood < %s | FileCheck %s
 
 ; These tests make sure the compiler is optimizing branches using predicates
 ; when it is legal to do so.
 
 ; CHECK-LABEL: {{^}}simple_if:
 ; CHECK: PRED_SET{{[EGN][ET]*}}_INT * Pred,
 ; CHECK: LSHL * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, Pred_sel
 define void @simple_if(i32 addrspace(1)* %out, i32 %in) {

test/CodeGen/AMDGPU/structurize.ll

-; RUN: llc < %s -march=r600 -mcpu=redwood -mattr=disable-irstructurizer | FileCheck %s
+; RUN: llc < %s -march=r600 -mcpu=redwood -r600-ir-structurize=0 | FileCheck %s
 ; Test case for a crash in the AMDILCFGStructurizer from a CFG like this:
 ;
 ;                            entry
 ;                           /     \
 ;               diamond_head       branch_from
 ;                 /      \           |
 ;    diamond_false        diamond_true
 ;                 \      /