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Add load/store co-processor intrinsics
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Authored by rs on May 24 2016, 3:46 AM.

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rs updated this revision to Diff 58214.May 24 2016, 3:46 AM
rs retitled this revision from to Add load/store co-processor intrinsics.
rs updated this object.
rs added a reviewer: rengolin.
rs added a subscriber: cfe-commits.
rs added a comment.May 24 2016, 3:57 AM

LLVM part of the patch is here http://reviews.llvm.org/D20564

Just one suggestion for the tests here:

test/Sema/builtins-arm.c
50 ↗(On Diff #58214)

Perhaps some no-error lines too? Otherwise we might regress to producing a warning (e.g. about pointer conversions or whatever) without knowing as CodeGen would still pass.

rs updated this revision to Diff 58314.May 24 2016, 2:00 PM
rs marked an inline comment as done.May 24 2016, 2:06 PM

Tim thanks for reviewing this patch. I've uploaded a new one with your suggested change. If I don't respond to any further comments after today it'll be because I'm on holiday and won't be back till next week.

t.p.northover accepted this revision.May 24 2016, 3:42 PM
t.p.northover added a reviewer: t.p.northover.

Thanks Ranjeet. LGTM!

Tim.

This revision is now accepted and ready to land.May 24 2016, 3:42 PM
This revision was automatically updated to reflect the committed changes.